123dd1cbfSKim Phillips/* 223dd1cbfSKim Phillips * MPC8377E RDB Device Tree Source 323dd1cbfSKim Phillips * 423dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 523dd1cbfSKim Phillips * 623dd1cbfSKim Phillips * This program is free software; you can redistribute it and/or modify it 723dd1cbfSKim Phillips * under the terms of the GNU General Public License as published by the 823dd1cbfSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 923dd1cbfSKim Phillips * option) any later version. 1023dd1cbfSKim Phillips */ 1123dd1cbfSKim Phillips 1223dd1cbfSKim Phillips/dts-v1/; 1323dd1cbfSKim Phillips 1423dd1cbfSKim Phillips/ { 153b29dadeSKim Phillips compatible = "fsl,mpc8377rdb"; 1623dd1cbfSKim Phillips #address-cells = <1>; 1723dd1cbfSKim Phillips #size-cells = <1>; 1823dd1cbfSKim Phillips 1923dd1cbfSKim Phillips aliases { 2023dd1cbfSKim Phillips ethernet0 = &enet0; 2123dd1cbfSKim Phillips ethernet1 = &enet1; 2223dd1cbfSKim Phillips serial0 = &serial0; 2323dd1cbfSKim Phillips serial1 = &serial1; 2423dd1cbfSKim Phillips pci0 = &pci0; 2523dd1cbfSKim Phillips }; 2623dd1cbfSKim Phillips 2723dd1cbfSKim Phillips cpus { 2823dd1cbfSKim Phillips #address-cells = <1>; 2923dd1cbfSKim Phillips #size-cells = <0>; 3023dd1cbfSKim Phillips 3123dd1cbfSKim Phillips PowerPC,8377@0 { 3223dd1cbfSKim Phillips device_type = "cpu"; 33cda13dd1SPaul Gortmaker reg = <0x0>; 3423dd1cbfSKim Phillips d-cache-line-size = <32>; 3523dd1cbfSKim Phillips i-cache-line-size = <32>; 3623dd1cbfSKim Phillips d-cache-size = <32768>; 3723dd1cbfSKim Phillips i-cache-size = <32768>; 3823dd1cbfSKim Phillips timebase-frequency = <0>; 3923dd1cbfSKim Phillips bus-frequency = <0>; 4023dd1cbfSKim Phillips clock-frequency = <0>; 4123dd1cbfSKim Phillips }; 4223dd1cbfSKim Phillips }; 4323dd1cbfSKim Phillips 4423dd1cbfSKim Phillips memory { 4523dd1cbfSKim Phillips device_type = "memory"; 4623dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 4723dd1cbfSKim Phillips }; 4823dd1cbfSKim Phillips 4923dd1cbfSKim Phillips localbus@e0005000 { 5023dd1cbfSKim Phillips #address-cells = <2>; 5123dd1cbfSKim Phillips #size-cells = <1>; 5223dd1cbfSKim Phillips compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; 5323dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 54cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 5623dd1cbfSKim Phillips 5723dd1cbfSKim Phillips // CS0 and CS1 are swapped when 5823dd1cbfSKim Phillips // booting from nand, but the 5923dd1cbfSKim Phillips // addresses are the same. 60cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 61cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00008000 62cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 63cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6423dd1cbfSKim Phillips 6523dd1cbfSKim Phillips flash@0,0 { 6623dd1cbfSKim Phillips #address-cells = <1>; 6723dd1cbfSKim Phillips #size-cells = <1>; 6823dd1cbfSKim Phillips compatible = "cfi-flash"; 69cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 7023dd1cbfSKim Phillips bank-width = <2>; 7123dd1cbfSKim Phillips device-width = <1>; 7223dd1cbfSKim Phillips }; 7323dd1cbfSKim Phillips 7423dd1cbfSKim Phillips nand@1,0 { 7523dd1cbfSKim Phillips #address-cells = <1>; 7623dd1cbfSKim Phillips #size-cells = <1>; 7723dd1cbfSKim Phillips compatible = "fsl,mpc8377-fcm-nand", 7823dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 79cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x8000>; 8023dd1cbfSKim Phillips 8123dd1cbfSKim Phillips u-boot@0 { 8223dd1cbfSKim Phillips reg = <0x0 0x100000>; 8323dd1cbfSKim Phillips read-only; 8423dd1cbfSKim Phillips }; 8523dd1cbfSKim Phillips 8623dd1cbfSKim Phillips kernel@100000 { 8723dd1cbfSKim Phillips reg = <0x100000 0x300000>; 8823dd1cbfSKim Phillips }; 8923dd1cbfSKim Phillips fs@400000 { 9023dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 9123dd1cbfSKim Phillips }; 9223dd1cbfSKim Phillips }; 9323dd1cbfSKim Phillips }; 9423dd1cbfSKim Phillips 9523dd1cbfSKim Phillips immr@e0000000 { 9623dd1cbfSKim Phillips #address-cells = <1>; 9723dd1cbfSKim Phillips #size-cells = <1>; 9823dd1cbfSKim Phillips device_type = "soc"; 9923dd1cbfSKim Phillips compatible = "simple-bus"; 100cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 10123dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 10223dd1cbfSKim Phillips bus-frequency = <0>; 10323dd1cbfSKim Phillips 10423dd1cbfSKim Phillips wdt@200 { 10523dd1cbfSKim Phillips device_type = "watchdog"; 10623dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 10723dd1cbfSKim Phillips reg = <0x200 0x100>; 10823dd1cbfSKim Phillips }; 10923dd1cbfSKim Phillips 11023dd1cbfSKim Phillips i2c@3000 { 11123dd1cbfSKim Phillips #address-cells = <1>; 11223dd1cbfSKim Phillips #size-cells = <0>; 11323dd1cbfSKim Phillips cell-index = <0>; 11423dd1cbfSKim Phillips compatible = "fsl-i2c"; 11523dd1cbfSKim Phillips reg = <0x3000 0x100>; 116cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 11723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 11823dd1cbfSKim Phillips dfsrr; 11923dd1cbfSKim Phillips rtc@68 { 12023dd1cbfSKim Phillips device_type = "rtc"; 12123dd1cbfSKim Phillips compatible = "dallas,ds1339"; 12223dd1cbfSKim Phillips reg = <0x68>; 12323dd1cbfSKim Phillips }; 12444274698SAnton Vorontsov 12544274698SAnton Vorontsov mcu_pio: mcu@a { 12644274698SAnton Vorontsov #gpio-cells = <2>; 12744274698SAnton Vorontsov compatible = "fsl,mc9s08qg8-mpc8377erdb", 12844274698SAnton Vorontsov "fsl,mcu-mpc8349emitx"; 12944274698SAnton Vorontsov reg = <0x0a>; 13044274698SAnton Vorontsov gpio-controller; 13144274698SAnton Vorontsov }; 13223dd1cbfSKim Phillips }; 13323dd1cbfSKim Phillips 13423dd1cbfSKim Phillips i2c@3100 { 13523dd1cbfSKim Phillips #address-cells = <1>; 13623dd1cbfSKim Phillips #size-cells = <0>; 13723dd1cbfSKim Phillips cell-index = <1>; 13823dd1cbfSKim Phillips compatible = "fsl-i2c"; 13923dd1cbfSKim Phillips reg = <0x3100 0x100>; 140cda13dd1SPaul Gortmaker interrupts = <15 0x8>; 14123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 14223dd1cbfSKim Phillips dfsrr; 14323dd1cbfSKim Phillips }; 14423dd1cbfSKim Phillips 14523dd1cbfSKim Phillips spi@7000 { 14623dd1cbfSKim Phillips cell-index = <0>; 14723dd1cbfSKim Phillips compatible = "fsl,spi"; 14823dd1cbfSKim Phillips reg = <0x7000 0x1000>; 149cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 15023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 15123dd1cbfSKim Phillips mode = "cpu"; 15223dd1cbfSKim Phillips }; 15323dd1cbfSKim Phillips 154dee80553SKumar Gala dma@82a8 { 155dee80553SKumar Gala #address-cells = <1>; 156dee80553SKumar Gala #size-cells = <1>; 157dee80553SKumar Gala compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; 158dee80553SKumar Gala reg = <0x82a8 4>; 159dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 160dee80553SKumar Gala interrupt-parent = <&ipic>; 161dee80553SKumar Gala interrupts = <71 8>; 162dee80553SKumar Gala cell-index = <0>; 163dee80553SKumar Gala dma-channel@0 { 164dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 165dee80553SKumar Gala reg = <0 0x80>; 166aeb42762SKumar Gala cell-index = <0>; 167dee80553SKumar Gala interrupt-parent = <&ipic>; 168dee80553SKumar Gala interrupts = <71 8>; 169dee80553SKumar Gala }; 170dee80553SKumar Gala dma-channel@80 { 171dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 172dee80553SKumar Gala reg = <0x80 0x80>; 173aeb42762SKumar Gala cell-index = <1>; 174dee80553SKumar Gala interrupt-parent = <&ipic>; 175dee80553SKumar Gala interrupts = <71 8>; 176dee80553SKumar Gala }; 177dee80553SKumar Gala dma-channel@100 { 178dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 179dee80553SKumar Gala reg = <0x100 0x80>; 180aeb42762SKumar Gala cell-index = <2>; 181dee80553SKumar Gala interrupt-parent = <&ipic>; 182dee80553SKumar Gala interrupts = <71 8>; 183dee80553SKumar Gala }; 184dee80553SKumar Gala dma-channel@180 { 185dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 186dee80553SKumar Gala reg = <0x180 0x28>; 187aeb42762SKumar Gala cell-index = <3>; 188dee80553SKumar Gala interrupt-parent = <&ipic>; 189dee80553SKumar Gala interrupts = <71 8>; 190dee80553SKumar Gala }; 191dee80553SKumar Gala }; 192dee80553SKumar Gala 19323dd1cbfSKim Phillips usb@23000 { 19423dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 19523dd1cbfSKim Phillips reg = <0x23000 0x1000>; 19623dd1cbfSKim Phillips #address-cells = <1>; 19723dd1cbfSKim Phillips #size-cells = <0>; 19823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 199cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 2008e8ff3a3SAnton Vorontsov phy_type = "ulpi"; 20123dd1cbfSKim Phillips }; 20223dd1cbfSKim Phillips 20323dd1cbfSKim Phillips mdio@24520 { 20423dd1cbfSKim Phillips #address-cells = <1>; 20523dd1cbfSKim Phillips #size-cells = <0>; 20623dd1cbfSKim Phillips compatible = "fsl,gianfar-mdio"; 20723dd1cbfSKim Phillips reg = <0x24520 0x20>; 20823dd1cbfSKim Phillips phy2: ethernet-phy@2 { 20923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 210cda13dd1SPaul Gortmaker interrupts = <17 0x8>; 211cda13dd1SPaul Gortmaker reg = <0x2>; 21223dd1cbfSKim Phillips device_type = "ethernet-phy"; 21323dd1cbfSKim Phillips }; 214b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 215b31a1d8bSAndy Fleming reg = <0x11>; 216b31a1d8bSAndy Fleming device_type = "tbi-phy"; 21723dd1cbfSKim Phillips }; 218b31a1d8bSAndy Fleming }; 219b31a1d8bSAndy Fleming 220b31a1d8bSAndy Fleming mdio@25520 { 221b31a1d8bSAndy Fleming #address-cells = <1>; 222b31a1d8bSAndy Fleming #size-cells = <0>; 223b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 224b31a1d8bSAndy Fleming reg = <0x25520 0x20>; 225b31a1d8bSAndy Fleming 226b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 227b31a1d8bSAndy Fleming reg = <0x11>; 228b31a1d8bSAndy Fleming device_type = "tbi-phy"; 229b31a1d8bSAndy Fleming }; 230b31a1d8bSAndy Fleming }; 231b31a1d8bSAndy Fleming 23223dd1cbfSKim Phillips 23323dd1cbfSKim Phillips enet0: ethernet@24000 { 23423dd1cbfSKim Phillips cell-index = <0>; 23523dd1cbfSKim Phillips device_type = "network"; 23623dd1cbfSKim Phillips model = "eTSEC"; 23723dd1cbfSKim Phillips compatible = "gianfar"; 23823dd1cbfSKim Phillips reg = <0x24000 0x1000>; 23923dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 240cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8 34 0x8>; 24123dd1cbfSKim Phillips phy-connection-type = "mii"; 24223dd1cbfSKim Phillips interrupt-parent = <&ipic>; 243b31a1d8bSAndy Fleming tbi-handle = <&tbi0>; 24423dd1cbfSKim Phillips phy-handle = <&phy2>; 24523dd1cbfSKim Phillips }; 24623dd1cbfSKim Phillips 24723dd1cbfSKim Phillips enet1: ethernet@25000 { 24823dd1cbfSKim Phillips cell-index = <1>; 24923dd1cbfSKim Phillips device_type = "network"; 25023dd1cbfSKim Phillips model = "eTSEC"; 25123dd1cbfSKim Phillips compatible = "gianfar"; 25223dd1cbfSKim Phillips reg = <0x25000 0x1000>; 25323dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 254cda13dd1SPaul Gortmaker interrupts = <35 0x8 36 0x8 37 0x8>; 25523dd1cbfSKim Phillips phy-connection-type = "mii"; 25623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 257f17c6323SAnton Vorontsov fixed-link = <1 1 1000 0 0>; 258b31a1d8bSAndy Fleming tbi-handle = <&tbi1>; 25923dd1cbfSKim Phillips }; 26023dd1cbfSKim Phillips 26123dd1cbfSKim Phillips serial0: serial@4500 { 26223dd1cbfSKim Phillips cell-index = <0>; 26323dd1cbfSKim Phillips device_type = "serial"; 26423dd1cbfSKim Phillips compatible = "ns16550"; 26523dd1cbfSKim Phillips reg = <0x4500 0x100>; 26623dd1cbfSKim Phillips clock-frequency = <0>; 267cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 26823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 26923dd1cbfSKim Phillips }; 27023dd1cbfSKim Phillips 27123dd1cbfSKim Phillips serial1: serial@4600 { 27223dd1cbfSKim Phillips cell-index = <1>; 27323dd1cbfSKim Phillips device_type = "serial"; 27423dd1cbfSKim Phillips compatible = "ns16550"; 27523dd1cbfSKim Phillips reg = <0x4600 0x100>; 27623dd1cbfSKim Phillips clock-frequency = <0>; 277cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 27823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 27923dd1cbfSKim Phillips }; 28023dd1cbfSKim Phillips 28123dd1cbfSKim Phillips crypto@30000 { 2823fd44736SKim Phillips compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 2833fd44736SKim Phillips "fsl,sec2.1", "fsl,sec2.0"; 28423dd1cbfSKim Phillips reg = <0x30000 0x10000>; 285cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 28623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 2873fd44736SKim Phillips fsl,num-channels = <4>; 2883fd44736SKim Phillips fsl,channel-fifo-len = <24>; 2893fd44736SKim Phillips fsl,exec-units-mask = <0x9fe>; 2903fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0ebf>; 29123dd1cbfSKim Phillips }; 29223dd1cbfSKim Phillips 29323dd1cbfSKim Phillips sata@18000 { 29423dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 29523dd1cbfSKim Phillips reg = <0x18000 0x1000>; 296cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 29723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 29823dd1cbfSKim Phillips }; 29923dd1cbfSKim Phillips 30023dd1cbfSKim Phillips sata@19000 { 30123dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 30223dd1cbfSKim Phillips reg = <0x19000 0x1000>; 303cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 30423dd1cbfSKim Phillips interrupt-parent = <&ipic>; 30523dd1cbfSKim Phillips }; 30623dd1cbfSKim Phillips 30723dd1cbfSKim Phillips /* IPIC 30823dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 30923dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 31023dd1cbfSKim Phillips * sense == 8: Level, low assertion 31123dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 31223dd1cbfSKim Phillips */ 31323dd1cbfSKim Phillips ipic: interrupt-controller@700 { 31423dd1cbfSKim Phillips compatible = "fsl,ipic"; 31523dd1cbfSKim Phillips interrupt-controller; 31623dd1cbfSKim Phillips #address-cells = <0>; 31723dd1cbfSKim Phillips #interrupt-cells = <2>; 31823dd1cbfSKim Phillips reg = <0x700 0x100>; 31923dd1cbfSKim Phillips }; 32023dd1cbfSKim Phillips }; 32123dd1cbfSKim Phillips 32223dd1cbfSKim Phillips pci0: pci@e0008500 { 32323dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 32423dd1cbfSKim Phillips interrupt-map = < 32523dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 32623dd1cbfSKim Phillips 32723dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 328cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 22 0x8 32923dd1cbfSKim Phillips 33023dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 331cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 21 0x8 332cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 22 0x8 333cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 23 0x8 33423dd1cbfSKim Phillips 33523dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 336cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x1 &ipic 23 0x8 337cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x2 &ipic 21 0x8 338cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 33923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 340cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 34123dd1cbfSKim Phillips bus-range = <0 0>; 342cda13dd1SPaul Gortmaker ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 343cda13dd1SPaul Gortmaker 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 344cda13dd1SPaul Gortmaker 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 34523dd1cbfSKim Phillips clock-frequency = <66666666>; 34623dd1cbfSKim Phillips #interrupt-cells = <1>; 34723dd1cbfSKim Phillips #size-cells = <2>; 34823dd1cbfSKim Phillips #address-cells = <3>; 3495b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 3505b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 35123dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 35223dd1cbfSKim Phillips device_type = "pci"; 35323dd1cbfSKim Phillips }; 35423dd1cbfSKim Phillips}; 355