123dd1cbfSKim Phillips/* 223dd1cbfSKim Phillips * MPC8377E RDB Device Tree Source 323dd1cbfSKim Phillips * 423dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 523dd1cbfSKim Phillips * 623dd1cbfSKim Phillips * This program is free software; you can redistribute it and/or modify it 723dd1cbfSKim Phillips * under the terms of the GNU General Public License as published by the 823dd1cbfSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 923dd1cbfSKim Phillips * option) any later version. 1023dd1cbfSKim Phillips */ 1123dd1cbfSKim Phillips 1223dd1cbfSKim Phillips/dts-v1/; 1323dd1cbfSKim Phillips 1423dd1cbfSKim Phillips/ { 153b29dadeSKim Phillips compatible = "fsl,mpc8377rdb"; 1623dd1cbfSKim Phillips #address-cells = <1>; 1723dd1cbfSKim Phillips #size-cells = <1>; 1823dd1cbfSKim Phillips 1923dd1cbfSKim Phillips aliases { 2023dd1cbfSKim Phillips ethernet0 = &enet0; 2123dd1cbfSKim Phillips ethernet1 = &enet1; 2223dd1cbfSKim Phillips serial0 = &serial0; 2323dd1cbfSKim Phillips serial1 = &serial1; 2423dd1cbfSKim Phillips pci0 = &pci0; 250585a155SAnton Vorontsov pci1 = &pci1; 260585a155SAnton Vorontsov pci2 = &pci2; 2723dd1cbfSKim Phillips }; 2823dd1cbfSKim Phillips 2923dd1cbfSKim Phillips cpus { 3023dd1cbfSKim Phillips #address-cells = <1>; 3123dd1cbfSKim Phillips #size-cells = <0>; 3223dd1cbfSKim Phillips 3323dd1cbfSKim Phillips PowerPC,8377@0 { 3423dd1cbfSKim Phillips device_type = "cpu"; 35cda13dd1SPaul Gortmaker reg = <0x0>; 3623dd1cbfSKim Phillips d-cache-line-size = <32>; 3723dd1cbfSKim Phillips i-cache-line-size = <32>; 3823dd1cbfSKim Phillips d-cache-size = <32768>; 3923dd1cbfSKim Phillips i-cache-size = <32768>; 4023dd1cbfSKim Phillips timebase-frequency = <0>; 4123dd1cbfSKim Phillips bus-frequency = <0>; 4223dd1cbfSKim Phillips clock-frequency = <0>; 4323dd1cbfSKim Phillips }; 4423dd1cbfSKim Phillips }; 4523dd1cbfSKim Phillips 4623dd1cbfSKim Phillips memory { 4723dd1cbfSKim Phillips device_type = "memory"; 4823dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 4923dd1cbfSKim Phillips }; 5023dd1cbfSKim Phillips 5123dd1cbfSKim Phillips localbus@e0005000 { 5223dd1cbfSKim Phillips #address-cells = <2>; 5323dd1cbfSKim Phillips #size-cells = <1>; 5423dd1cbfSKim Phillips compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; 5523dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 56cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 5823dd1cbfSKim Phillips 5923dd1cbfSKim Phillips // CS0 and CS1 are swapped when 6023dd1cbfSKim Phillips // booting from nand, but the 6123dd1cbfSKim Phillips // addresses are the same. 62cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 63cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00008000 64cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 65cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6623dd1cbfSKim Phillips 6723dd1cbfSKim Phillips flash@0,0 { 6823dd1cbfSKim Phillips #address-cells = <1>; 6923dd1cbfSKim Phillips #size-cells = <1>; 7023dd1cbfSKim Phillips compatible = "cfi-flash"; 71cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 7223dd1cbfSKim Phillips bank-width = <2>; 7323dd1cbfSKim Phillips device-width = <1>; 7423dd1cbfSKim Phillips }; 7523dd1cbfSKim Phillips 7623dd1cbfSKim Phillips nand@1,0 { 7723dd1cbfSKim Phillips #address-cells = <1>; 7823dd1cbfSKim Phillips #size-cells = <1>; 7923dd1cbfSKim Phillips compatible = "fsl,mpc8377-fcm-nand", 8023dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 81cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x8000>; 8223dd1cbfSKim Phillips 8323dd1cbfSKim Phillips u-boot@0 { 8423dd1cbfSKim Phillips reg = <0x0 0x100000>; 8523dd1cbfSKim Phillips read-only; 8623dd1cbfSKim Phillips }; 8723dd1cbfSKim Phillips 8823dd1cbfSKim Phillips kernel@100000 { 8923dd1cbfSKim Phillips reg = <0x100000 0x300000>; 9023dd1cbfSKim Phillips }; 9123dd1cbfSKim Phillips fs@400000 { 9223dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 9323dd1cbfSKim Phillips }; 9423dd1cbfSKim Phillips }; 9523dd1cbfSKim Phillips }; 9623dd1cbfSKim Phillips 9723dd1cbfSKim Phillips immr@e0000000 { 9823dd1cbfSKim Phillips #address-cells = <1>; 9923dd1cbfSKim Phillips #size-cells = <1>; 10023dd1cbfSKim Phillips device_type = "soc"; 10123dd1cbfSKim Phillips compatible = "simple-bus"; 102cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 10323dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 10423dd1cbfSKim Phillips bus-frequency = <0>; 10523dd1cbfSKim Phillips 10623dd1cbfSKim Phillips wdt@200 { 10723dd1cbfSKim Phillips device_type = "watchdog"; 10823dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 10923dd1cbfSKim Phillips reg = <0x200 0x100>; 11023dd1cbfSKim Phillips }; 11123dd1cbfSKim Phillips 1129e7d95c1SReynes Philippe gpio1: gpio-controller@c00 { 1139e7d95c1SReynes Philippe #gpio-cells = <2>; 1149e7d95c1SReynes Philippe compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; 1159e7d95c1SReynes Philippe reg = <0xc00 0x100>; 1169e7d95c1SReynes Philippe interrupts = <74 0x8>; 1179e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1189e7d95c1SReynes Philippe gpio-controller; 1199e7d95c1SReynes Philippe }; 1209e7d95c1SReynes Philippe 1219e7d95c1SReynes Philippe gpio2: gpio-controller@d00 { 1229e7d95c1SReynes Philippe #gpio-cells = <2>; 1239e7d95c1SReynes Philippe compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; 1249e7d95c1SReynes Philippe reg = <0xd00 0x100>; 1259e7d95c1SReynes Philippe interrupts = <75 0x8>; 1269e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1279e7d95c1SReynes Philippe gpio-controller; 1289e7d95c1SReynes Philippe }; 1299e7d95c1SReynes Philippe 13023dd1cbfSKim Phillips i2c@3000 { 13123dd1cbfSKim Phillips #address-cells = <1>; 13223dd1cbfSKim Phillips #size-cells = <0>; 13323dd1cbfSKim Phillips cell-index = <0>; 13423dd1cbfSKim Phillips compatible = "fsl-i2c"; 13523dd1cbfSKim Phillips reg = <0x3000 0x100>; 136cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 13723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 13823dd1cbfSKim Phillips dfsrr; 139f7a0be45SReynes Philippe 140960d82aaSReynes Philippe dtt@48 { 141960d82aaSReynes Philippe compatible = "national,lm75"; 142960d82aaSReynes Philippe reg = <0x48>; 143960d82aaSReynes Philippe }; 144960d82aaSReynes Philippe 145f7a0be45SReynes Philippe at24@50 { 146f7a0be45SReynes Philippe compatible = "at24,24c256"; 147f7a0be45SReynes Philippe reg = <0x50>; 148f7a0be45SReynes Philippe }; 149f7a0be45SReynes Philippe 15023dd1cbfSKim Phillips rtc@68 { 15123dd1cbfSKim Phillips compatible = "dallas,ds1339"; 15223dd1cbfSKim Phillips reg = <0x68>; 15323dd1cbfSKim Phillips }; 15444274698SAnton Vorontsov 15544274698SAnton Vorontsov mcu_pio: mcu@a { 15644274698SAnton Vorontsov #gpio-cells = <2>; 15744274698SAnton Vorontsov compatible = "fsl,mc9s08qg8-mpc8377erdb", 15844274698SAnton Vorontsov "fsl,mcu-mpc8349emitx"; 15944274698SAnton Vorontsov reg = <0x0a>; 16044274698SAnton Vorontsov gpio-controller; 16144274698SAnton Vorontsov }; 16223dd1cbfSKim Phillips }; 16323dd1cbfSKim Phillips 16423dd1cbfSKim Phillips i2c@3100 { 16523dd1cbfSKim Phillips #address-cells = <1>; 16623dd1cbfSKim Phillips #size-cells = <0>; 16723dd1cbfSKim Phillips cell-index = <1>; 16823dd1cbfSKim Phillips compatible = "fsl-i2c"; 16923dd1cbfSKim Phillips reg = <0x3100 0x100>; 170cda13dd1SPaul Gortmaker interrupts = <15 0x8>; 17123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 17223dd1cbfSKim Phillips dfsrr; 17323dd1cbfSKim Phillips }; 17423dd1cbfSKim Phillips 17523dd1cbfSKim Phillips spi@7000 { 17623dd1cbfSKim Phillips cell-index = <0>; 17723dd1cbfSKim Phillips compatible = "fsl,spi"; 17823dd1cbfSKim Phillips reg = <0x7000 0x1000>; 179cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 18023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 18123dd1cbfSKim Phillips mode = "cpu"; 18223dd1cbfSKim Phillips }; 18323dd1cbfSKim Phillips 184dee80553SKumar Gala dma@82a8 { 185dee80553SKumar Gala #address-cells = <1>; 186dee80553SKumar Gala #size-cells = <1>; 187dee80553SKumar Gala compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; 188dee80553SKumar Gala reg = <0x82a8 4>; 189dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 190dee80553SKumar Gala interrupt-parent = <&ipic>; 191dee80553SKumar Gala interrupts = <71 8>; 192dee80553SKumar Gala cell-index = <0>; 193dee80553SKumar Gala dma-channel@0 { 194dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 195dee80553SKumar Gala reg = <0 0x80>; 196aeb42762SKumar Gala cell-index = <0>; 197dee80553SKumar Gala interrupt-parent = <&ipic>; 198dee80553SKumar Gala interrupts = <71 8>; 199dee80553SKumar Gala }; 200dee80553SKumar Gala dma-channel@80 { 201dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 202dee80553SKumar Gala reg = <0x80 0x80>; 203aeb42762SKumar Gala cell-index = <1>; 204dee80553SKumar Gala interrupt-parent = <&ipic>; 205dee80553SKumar Gala interrupts = <71 8>; 206dee80553SKumar Gala }; 207dee80553SKumar Gala dma-channel@100 { 208dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 209dee80553SKumar Gala reg = <0x100 0x80>; 210aeb42762SKumar Gala cell-index = <2>; 211dee80553SKumar Gala interrupt-parent = <&ipic>; 212dee80553SKumar Gala interrupts = <71 8>; 213dee80553SKumar Gala }; 214dee80553SKumar Gala dma-channel@180 { 215dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 216dee80553SKumar Gala reg = <0x180 0x28>; 217aeb42762SKumar Gala cell-index = <3>; 218dee80553SKumar Gala interrupt-parent = <&ipic>; 219dee80553SKumar Gala interrupts = <71 8>; 220dee80553SKumar Gala }; 221dee80553SKumar Gala }; 222dee80553SKumar Gala 22323dd1cbfSKim Phillips usb@23000 { 22423dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 22523dd1cbfSKim Phillips reg = <0x23000 0x1000>; 22623dd1cbfSKim Phillips #address-cells = <1>; 22723dd1cbfSKim Phillips #size-cells = <0>; 22823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 229cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 2308e8ff3a3SAnton Vorontsov phy_type = "ulpi"; 23123dd1cbfSKim Phillips }; 23223dd1cbfSKim Phillips 23323dd1cbfSKim Phillips mdio@24520 { 23423dd1cbfSKim Phillips #address-cells = <1>; 23523dd1cbfSKim Phillips #size-cells = <0>; 23623dd1cbfSKim Phillips compatible = "fsl,gianfar-mdio"; 23723dd1cbfSKim Phillips reg = <0x24520 0x20>; 23823dd1cbfSKim Phillips phy2: ethernet-phy@2 { 23923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 240cda13dd1SPaul Gortmaker interrupts = <17 0x8>; 241cda13dd1SPaul Gortmaker reg = <0x2>; 24223dd1cbfSKim Phillips device_type = "ethernet-phy"; 24323dd1cbfSKim Phillips }; 244b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 245b31a1d8bSAndy Fleming reg = <0x11>; 246b31a1d8bSAndy Fleming device_type = "tbi-phy"; 24723dd1cbfSKim Phillips }; 248b31a1d8bSAndy Fleming }; 249b31a1d8bSAndy Fleming 250b31a1d8bSAndy Fleming mdio@25520 { 251b31a1d8bSAndy Fleming #address-cells = <1>; 252b31a1d8bSAndy Fleming #size-cells = <0>; 253b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 254b31a1d8bSAndy Fleming reg = <0x25520 0x20>; 255b31a1d8bSAndy Fleming 256b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 257b31a1d8bSAndy Fleming reg = <0x11>; 258b31a1d8bSAndy Fleming device_type = "tbi-phy"; 259b31a1d8bSAndy Fleming }; 260b31a1d8bSAndy Fleming }; 261b31a1d8bSAndy Fleming 26223dd1cbfSKim Phillips 26323dd1cbfSKim Phillips enet0: ethernet@24000 { 26423dd1cbfSKim Phillips cell-index = <0>; 26523dd1cbfSKim Phillips device_type = "network"; 26623dd1cbfSKim Phillips model = "eTSEC"; 26723dd1cbfSKim Phillips compatible = "gianfar"; 26823dd1cbfSKim Phillips reg = <0x24000 0x1000>; 26923dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 270cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8 34 0x8>; 27123dd1cbfSKim Phillips phy-connection-type = "mii"; 27223dd1cbfSKim Phillips interrupt-parent = <&ipic>; 273b31a1d8bSAndy Fleming tbi-handle = <&tbi0>; 27423dd1cbfSKim Phillips phy-handle = <&phy2>; 27523dd1cbfSKim Phillips }; 27623dd1cbfSKim Phillips 27723dd1cbfSKim Phillips enet1: ethernet@25000 { 27823dd1cbfSKim Phillips cell-index = <1>; 27923dd1cbfSKim Phillips device_type = "network"; 28023dd1cbfSKim Phillips model = "eTSEC"; 28123dd1cbfSKim Phillips compatible = "gianfar"; 28223dd1cbfSKim Phillips reg = <0x25000 0x1000>; 28323dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 284cda13dd1SPaul Gortmaker interrupts = <35 0x8 36 0x8 37 0x8>; 28523dd1cbfSKim Phillips phy-connection-type = "mii"; 28623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 287f17c6323SAnton Vorontsov fixed-link = <1 1 1000 0 0>; 288b31a1d8bSAndy Fleming tbi-handle = <&tbi1>; 28923dd1cbfSKim Phillips }; 29023dd1cbfSKim Phillips 29123dd1cbfSKim Phillips serial0: serial@4500 { 29223dd1cbfSKim Phillips cell-index = <0>; 29323dd1cbfSKim Phillips device_type = "serial"; 29423dd1cbfSKim Phillips compatible = "ns16550"; 29523dd1cbfSKim Phillips reg = <0x4500 0x100>; 29623dd1cbfSKim Phillips clock-frequency = <0>; 297cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 29823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 29923dd1cbfSKim Phillips }; 30023dd1cbfSKim Phillips 30123dd1cbfSKim Phillips serial1: serial@4600 { 30223dd1cbfSKim Phillips cell-index = <1>; 30323dd1cbfSKim Phillips device_type = "serial"; 30423dd1cbfSKim Phillips compatible = "ns16550"; 30523dd1cbfSKim Phillips reg = <0x4600 0x100>; 30623dd1cbfSKim Phillips clock-frequency = <0>; 307cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 30823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 30923dd1cbfSKim Phillips }; 31023dd1cbfSKim Phillips 31123dd1cbfSKim Phillips crypto@30000 { 3123fd44736SKim Phillips compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 3133fd44736SKim Phillips "fsl,sec2.1", "fsl,sec2.0"; 31423dd1cbfSKim Phillips reg = <0x30000 0x10000>; 315cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 31623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 3173fd44736SKim Phillips fsl,num-channels = <4>; 3183fd44736SKim Phillips fsl,channel-fifo-len = <24>; 3193fd44736SKim Phillips fsl,exec-units-mask = <0x9fe>; 3203fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0ebf>; 32123dd1cbfSKim Phillips }; 32223dd1cbfSKim Phillips 32323dd1cbfSKim Phillips sata@18000 { 32423dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 32523dd1cbfSKim Phillips reg = <0x18000 0x1000>; 326cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 32723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 32823dd1cbfSKim Phillips }; 32923dd1cbfSKim Phillips 33023dd1cbfSKim Phillips sata@19000 { 33123dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 33223dd1cbfSKim Phillips reg = <0x19000 0x1000>; 333cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 33423dd1cbfSKim Phillips interrupt-parent = <&ipic>; 33523dd1cbfSKim Phillips }; 33623dd1cbfSKim Phillips 33723dd1cbfSKim Phillips /* IPIC 33823dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 33923dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 34023dd1cbfSKim Phillips * sense == 8: Level, low assertion 34123dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 34223dd1cbfSKim Phillips */ 34323dd1cbfSKim Phillips ipic: interrupt-controller@700 { 34423dd1cbfSKim Phillips compatible = "fsl,ipic"; 34523dd1cbfSKim Phillips interrupt-controller; 34623dd1cbfSKim Phillips #address-cells = <0>; 34723dd1cbfSKim Phillips #interrupt-cells = <2>; 34823dd1cbfSKim Phillips reg = <0x700 0x100>; 34923dd1cbfSKim Phillips }; 35023dd1cbfSKim Phillips }; 35123dd1cbfSKim Phillips 35223dd1cbfSKim Phillips pci0: pci@e0008500 { 35323dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 35423dd1cbfSKim Phillips interrupt-map = < 35523dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 35623dd1cbfSKim Phillips 35723dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 358cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 22 0x8 35923dd1cbfSKim Phillips 36023dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 361cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 21 0x8 362cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 22 0x8 363cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 23 0x8 36423dd1cbfSKim Phillips 36523dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 366cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x1 &ipic 23 0x8 367cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x2 &ipic 21 0x8 368cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 36923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 370cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 37123dd1cbfSKim Phillips bus-range = <0 0>; 372cda13dd1SPaul Gortmaker ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 373cda13dd1SPaul Gortmaker 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 374cda13dd1SPaul Gortmaker 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 37523dd1cbfSKim Phillips clock-frequency = <66666666>; 37623dd1cbfSKim Phillips #interrupt-cells = <1>; 37723dd1cbfSKim Phillips #size-cells = <2>; 37823dd1cbfSKim Phillips #address-cells = <3>; 3795b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 3805b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 38123dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 38223dd1cbfSKim Phillips device_type = "pci"; 38323dd1cbfSKim Phillips }; 3840585a155SAnton Vorontsov 3850585a155SAnton Vorontsov pci1: pcie@e0009000 { 3860585a155SAnton Vorontsov #address-cells = <3>; 3870585a155SAnton Vorontsov #size-cells = <2>; 3880585a155SAnton Vorontsov #interrupt-cells = <1>; 3890585a155SAnton Vorontsov device_type = "pci"; 3900585a155SAnton Vorontsov compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; 3910585a155SAnton Vorontsov reg = <0xe0009000 0x00001000>; 3920585a155SAnton Vorontsov ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 3930585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; 3940585a155SAnton Vorontsov bus-range = <0 255>; 3950585a155SAnton Vorontsov interrupt-map-mask = <0xf800 0 0 7>; 3960585a155SAnton Vorontsov interrupt-map = <0 0 0 1 &ipic 1 8 3970585a155SAnton Vorontsov 0 0 0 2 &ipic 1 8 3980585a155SAnton Vorontsov 0 0 0 3 &ipic 1 8 3990585a155SAnton Vorontsov 0 0 0 4 &ipic 1 8>; 4000585a155SAnton Vorontsov clock-frequency = <0>; 4010585a155SAnton Vorontsov 4020585a155SAnton Vorontsov pcie@0 { 4030585a155SAnton Vorontsov #address-cells = <3>; 4040585a155SAnton Vorontsov #size-cells = <2>; 4050585a155SAnton Vorontsov device_type = "pci"; 4060585a155SAnton Vorontsov reg = <0 0 0 0 0>; 4070585a155SAnton Vorontsov ranges = <0x02000000 0 0xa8000000 4080585a155SAnton Vorontsov 0x02000000 0 0xa8000000 4090585a155SAnton Vorontsov 0 0x10000000 4100585a155SAnton Vorontsov 0x01000000 0 0x00000000 4110585a155SAnton Vorontsov 0x01000000 0 0x00000000 4120585a155SAnton Vorontsov 0 0x00800000>; 4130585a155SAnton Vorontsov }; 4140585a155SAnton Vorontsov }; 4150585a155SAnton Vorontsov 4160585a155SAnton Vorontsov pci2: pcie@e000a000 { 4170585a155SAnton Vorontsov #address-cells = <3>; 4180585a155SAnton Vorontsov #size-cells = <2>; 4190585a155SAnton Vorontsov #interrupt-cells = <1>; 4200585a155SAnton Vorontsov device_type = "pci"; 4210585a155SAnton Vorontsov compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; 4220585a155SAnton Vorontsov reg = <0xe000a000 0x00001000>; 4230585a155SAnton Vorontsov ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 4240585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; 4250585a155SAnton Vorontsov bus-range = <0 255>; 4260585a155SAnton Vorontsov interrupt-map-mask = <0xf800 0 0 7>; 4270585a155SAnton Vorontsov interrupt-map = <0 0 0 1 &ipic 2 8 4280585a155SAnton Vorontsov 0 0 0 2 &ipic 2 8 4290585a155SAnton Vorontsov 0 0 0 3 &ipic 2 8 4300585a155SAnton Vorontsov 0 0 0 4 &ipic 2 8>; 4310585a155SAnton Vorontsov clock-frequency = <0>; 4320585a155SAnton Vorontsov 4330585a155SAnton Vorontsov pcie@0 { 4340585a155SAnton Vorontsov #address-cells = <3>; 4350585a155SAnton Vorontsov #size-cells = <2>; 4360585a155SAnton Vorontsov device_type = "pci"; 4370585a155SAnton Vorontsov reg = <0 0 0 0 0>; 4380585a155SAnton Vorontsov ranges = <0x02000000 0 0xc8000000 4390585a155SAnton Vorontsov 0x02000000 0 0xc8000000 4400585a155SAnton Vorontsov 0 0x10000000 4410585a155SAnton Vorontsov 0x01000000 0 0x00000000 4420585a155SAnton Vorontsov 0x01000000 0 0x00000000 4430585a155SAnton Vorontsov 0 0x00800000>; 4440585a155SAnton Vorontsov }; 4450585a155SAnton Vorontsov }; 44623dd1cbfSKim Phillips}; 447