123dd1cbfSKim Phillips/* 223dd1cbfSKim Phillips * MPC8377E RDB Device Tree Source 323dd1cbfSKim Phillips * 423dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 523dd1cbfSKim Phillips * 623dd1cbfSKim Phillips * This program is free software; you can redistribute it and/or modify it 723dd1cbfSKim Phillips * under the terms of the GNU General Public License as published by the 823dd1cbfSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 923dd1cbfSKim Phillips * option) any later version. 1023dd1cbfSKim Phillips */ 1123dd1cbfSKim Phillips 1223dd1cbfSKim Phillips/dts-v1/; 1323dd1cbfSKim Phillips 1423dd1cbfSKim Phillips/ { 153b29dadeSKim Phillips compatible = "fsl,mpc8377rdb"; 1623dd1cbfSKim Phillips #address-cells = <1>; 1723dd1cbfSKim Phillips #size-cells = <1>; 1823dd1cbfSKim Phillips 1923dd1cbfSKim Phillips aliases { 2023dd1cbfSKim Phillips ethernet0 = &enet0; 2123dd1cbfSKim Phillips ethernet1 = &enet1; 2223dd1cbfSKim Phillips serial0 = &serial0; 2323dd1cbfSKim Phillips serial1 = &serial1; 2423dd1cbfSKim Phillips pci0 = &pci0; 250585a155SAnton Vorontsov pci1 = &pci1; 260585a155SAnton Vorontsov pci2 = &pci2; 2723dd1cbfSKim Phillips }; 2823dd1cbfSKim Phillips 2923dd1cbfSKim Phillips cpus { 3023dd1cbfSKim Phillips #address-cells = <1>; 3123dd1cbfSKim Phillips #size-cells = <0>; 3223dd1cbfSKim Phillips 3323dd1cbfSKim Phillips PowerPC,8377@0 { 3423dd1cbfSKim Phillips device_type = "cpu"; 35cda13dd1SPaul Gortmaker reg = <0x0>; 3623dd1cbfSKim Phillips d-cache-line-size = <32>; 3723dd1cbfSKim Phillips i-cache-line-size = <32>; 3823dd1cbfSKim Phillips d-cache-size = <32768>; 3923dd1cbfSKim Phillips i-cache-size = <32768>; 4023dd1cbfSKim Phillips timebase-frequency = <0>; 4123dd1cbfSKim Phillips bus-frequency = <0>; 4223dd1cbfSKim Phillips clock-frequency = <0>; 4323dd1cbfSKim Phillips }; 4423dd1cbfSKim Phillips }; 4523dd1cbfSKim Phillips 4623dd1cbfSKim Phillips memory { 4723dd1cbfSKim Phillips device_type = "memory"; 4823dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 4923dd1cbfSKim Phillips }; 5023dd1cbfSKim Phillips 5123dd1cbfSKim Phillips localbus@e0005000 { 5223dd1cbfSKim Phillips #address-cells = <2>; 5323dd1cbfSKim Phillips #size-cells = <1>; 5423dd1cbfSKim Phillips compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; 5523dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 56cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 5823dd1cbfSKim Phillips 5923dd1cbfSKim Phillips // CS0 and CS1 are swapped when 6023dd1cbfSKim Phillips // booting from nand, but the 6123dd1cbfSKim Phillips // addresses are the same. 62cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 63cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00008000 64cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 65cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6623dd1cbfSKim Phillips 6723dd1cbfSKim Phillips flash@0,0 { 6823dd1cbfSKim Phillips #address-cells = <1>; 6923dd1cbfSKim Phillips #size-cells = <1>; 7023dd1cbfSKim Phillips compatible = "cfi-flash"; 71cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 7223dd1cbfSKim Phillips bank-width = <2>; 7323dd1cbfSKim Phillips device-width = <1>; 7423dd1cbfSKim Phillips }; 7523dd1cbfSKim Phillips 7623dd1cbfSKim Phillips nand@1,0 { 7723dd1cbfSKim Phillips #address-cells = <1>; 7823dd1cbfSKim Phillips #size-cells = <1>; 7923dd1cbfSKim Phillips compatible = "fsl,mpc8377-fcm-nand", 8023dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 81cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x8000>; 8223dd1cbfSKim Phillips 8323dd1cbfSKim Phillips u-boot@0 { 8423dd1cbfSKim Phillips reg = <0x0 0x100000>; 8523dd1cbfSKim Phillips read-only; 8623dd1cbfSKim Phillips }; 8723dd1cbfSKim Phillips 8823dd1cbfSKim Phillips kernel@100000 { 8923dd1cbfSKim Phillips reg = <0x100000 0x300000>; 9023dd1cbfSKim Phillips }; 9123dd1cbfSKim Phillips fs@400000 { 9223dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 9323dd1cbfSKim Phillips }; 9423dd1cbfSKim Phillips }; 9523dd1cbfSKim Phillips }; 9623dd1cbfSKim Phillips 9723dd1cbfSKim Phillips immr@e0000000 { 9823dd1cbfSKim Phillips #address-cells = <1>; 9923dd1cbfSKim Phillips #size-cells = <1>; 10023dd1cbfSKim Phillips device_type = "soc"; 10123dd1cbfSKim Phillips compatible = "simple-bus"; 102cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 10323dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 10423dd1cbfSKim Phillips bus-frequency = <0>; 10523dd1cbfSKim Phillips 10623dd1cbfSKim Phillips wdt@200 { 10723dd1cbfSKim Phillips device_type = "watchdog"; 10823dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 10923dd1cbfSKim Phillips reg = <0x200 0x100>; 11023dd1cbfSKim Phillips }; 11123dd1cbfSKim Phillips 1129e7d95c1SReynes Philippe gpio1: gpio-controller@c00 { 1139e7d95c1SReynes Philippe #gpio-cells = <2>; 1149e7d95c1SReynes Philippe compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; 1159e7d95c1SReynes Philippe reg = <0xc00 0x100>; 1169e7d95c1SReynes Philippe interrupts = <74 0x8>; 1179e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1189e7d95c1SReynes Philippe gpio-controller; 1199e7d95c1SReynes Philippe }; 1209e7d95c1SReynes Philippe 1219e7d95c1SReynes Philippe gpio2: gpio-controller@d00 { 1229e7d95c1SReynes Philippe #gpio-cells = <2>; 1239e7d95c1SReynes Philippe compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; 1249e7d95c1SReynes Philippe reg = <0xd00 0x100>; 1259e7d95c1SReynes Philippe interrupts = <75 0x8>; 1269e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1279e7d95c1SReynes Philippe gpio-controller; 1289e7d95c1SReynes Philippe }; 1299e7d95c1SReynes Philippe 130125a00d7SAnton Vorontsov sleep-nexus { 131125a00d7SAnton Vorontsov #address-cells = <1>; 132125a00d7SAnton Vorontsov #size-cells = <1>; 133125a00d7SAnton Vorontsov compatible = "simple-bus"; 134125a00d7SAnton Vorontsov sleep = <&pmc 0x0c000000>; 135125a00d7SAnton Vorontsov ranges; 136125a00d7SAnton Vorontsov 13723dd1cbfSKim Phillips i2c@3000 { 13823dd1cbfSKim Phillips #address-cells = <1>; 13923dd1cbfSKim Phillips #size-cells = <0>; 14023dd1cbfSKim Phillips cell-index = <0>; 14123dd1cbfSKim Phillips compatible = "fsl-i2c"; 14223dd1cbfSKim Phillips reg = <0x3000 0x100>; 143cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 14423dd1cbfSKim Phillips interrupt-parent = <&ipic>; 14523dd1cbfSKim Phillips dfsrr; 146f7a0be45SReynes Philippe 147960d82aaSReynes Philippe dtt@48 { 148960d82aaSReynes Philippe compatible = "national,lm75"; 149960d82aaSReynes Philippe reg = <0x48>; 150960d82aaSReynes Philippe }; 151960d82aaSReynes Philippe 152f7a0be45SReynes Philippe at24@50 { 153f7a0be45SReynes Philippe compatible = "at24,24c256"; 154f7a0be45SReynes Philippe reg = <0x50>; 155f7a0be45SReynes Philippe }; 156f7a0be45SReynes Philippe 15723dd1cbfSKim Phillips rtc@68 { 15823dd1cbfSKim Phillips compatible = "dallas,ds1339"; 15923dd1cbfSKim Phillips reg = <0x68>; 16023dd1cbfSKim Phillips }; 16144274698SAnton Vorontsov 16244274698SAnton Vorontsov mcu_pio: mcu@a { 16344274698SAnton Vorontsov #gpio-cells = <2>; 16444274698SAnton Vorontsov compatible = "fsl,mc9s08qg8-mpc8377erdb", 16544274698SAnton Vorontsov "fsl,mcu-mpc8349emitx"; 16644274698SAnton Vorontsov reg = <0x0a>; 16744274698SAnton Vorontsov gpio-controller; 16844274698SAnton Vorontsov }; 16923dd1cbfSKim Phillips }; 17023dd1cbfSKim Phillips 171125a00d7SAnton Vorontsov sdhci@2e000 { 172125a00d7SAnton Vorontsov compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; 173125a00d7SAnton Vorontsov reg = <0x2e000 0x1000>; 174125a00d7SAnton Vorontsov interrupts = <42 0x8>; 175125a00d7SAnton Vorontsov interrupt-parent = <&ipic>; 176125a00d7SAnton Vorontsov /* Filled in by U-Boot */ 177125a00d7SAnton Vorontsov clock-frequency = <0>; 178125a00d7SAnton Vorontsov }; 179125a00d7SAnton Vorontsov }; 180125a00d7SAnton Vorontsov 18123dd1cbfSKim Phillips i2c@3100 { 18223dd1cbfSKim Phillips #address-cells = <1>; 18323dd1cbfSKim Phillips #size-cells = <0>; 18423dd1cbfSKim Phillips cell-index = <1>; 18523dd1cbfSKim Phillips compatible = "fsl-i2c"; 18623dd1cbfSKim Phillips reg = <0x3100 0x100>; 187cda13dd1SPaul Gortmaker interrupts = <15 0x8>; 18823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 18923dd1cbfSKim Phillips dfsrr; 19023dd1cbfSKim Phillips }; 19123dd1cbfSKim Phillips 19223dd1cbfSKim Phillips spi@7000 { 19323dd1cbfSKim Phillips cell-index = <0>; 19423dd1cbfSKim Phillips compatible = "fsl,spi"; 19523dd1cbfSKim Phillips reg = <0x7000 0x1000>; 196cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 19723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 19823dd1cbfSKim Phillips mode = "cpu"; 19923dd1cbfSKim Phillips }; 20023dd1cbfSKim Phillips 201dee80553SKumar Gala dma@82a8 { 202dee80553SKumar Gala #address-cells = <1>; 203dee80553SKumar Gala #size-cells = <1>; 204dee80553SKumar Gala compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; 205dee80553SKumar Gala reg = <0x82a8 4>; 206dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 207dee80553SKumar Gala interrupt-parent = <&ipic>; 208dee80553SKumar Gala interrupts = <71 8>; 209dee80553SKumar Gala cell-index = <0>; 210dee80553SKumar Gala dma-channel@0 { 211dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 212dee80553SKumar Gala reg = <0 0x80>; 213aeb42762SKumar Gala cell-index = <0>; 214dee80553SKumar Gala interrupt-parent = <&ipic>; 215dee80553SKumar Gala interrupts = <71 8>; 216dee80553SKumar Gala }; 217dee80553SKumar Gala dma-channel@80 { 218dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 219dee80553SKumar Gala reg = <0x80 0x80>; 220aeb42762SKumar Gala cell-index = <1>; 221dee80553SKumar Gala interrupt-parent = <&ipic>; 222dee80553SKumar Gala interrupts = <71 8>; 223dee80553SKumar Gala }; 224dee80553SKumar Gala dma-channel@100 { 225dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 226dee80553SKumar Gala reg = <0x100 0x80>; 227aeb42762SKumar Gala cell-index = <2>; 228dee80553SKumar Gala interrupt-parent = <&ipic>; 229dee80553SKumar Gala interrupts = <71 8>; 230dee80553SKumar Gala }; 231dee80553SKumar Gala dma-channel@180 { 232dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 233dee80553SKumar Gala reg = <0x180 0x28>; 234aeb42762SKumar Gala cell-index = <3>; 235dee80553SKumar Gala interrupt-parent = <&ipic>; 236dee80553SKumar Gala interrupts = <71 8>; 237dee80553SKumar Gala }; 238dee80553SKumar Gala }; 239dee80553SKumar Gala 24023dd1cbfSKim Phillips usb@23000 { 24123dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 24223dd1cbfSKim Phillips reg = <0x23000 0x1000>; 24323dd1cbfSKim Phillips #address-cells = <1>; 24423dd1cbfSKim Phillips #size-cells = <0>; 24523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 246cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 2478e8ff3a3SAnton Vorontsov phy_type = "ulpi"; 248125a00d7SAnton Vorontsov sleep = <&pmc 0x00c00000>; 24923dd1cbfSKim Phillips }; 25023dd1cbfSKim Phillips 25123dd1cbfSKim Phillips mdio@24520 { 25223dd1cbfSKim Phillips #address-cells = <1>; 25323dd1cbfSKim Phillips #size-cells = <0>; 25423dd1cbfSKim Phillips compatible = "fsl,gianfar-mdio"; 25523dd1cbfSKim Phillips reg = <0x24520 0x20>; 25623dd1cbfSKim Phillips phy2: ethernet-phy@2 { 25723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 258cda13dd1SPaul Gortmaker interrupts = <17 0x8>; 259cda13dd1SPaul Gortmaker reg = <0x2>; 26023dd1cbfSKim Phillips device_type = "ethernet-phy"; 26123dd1cbfSKim Phillips }; 262b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 263b31a1d8bSAndy Fleming reg = <0x11>; 264b31a1d8bSAndy Fleming device_type = "tbi-phy"; 26523dd1cbfSKim Phillips }; 266b31a1d8bSAndy Fleming }; 267b31a1d8bSAndy Fleming 268b31a1d8bSAndy Fleming mdio@25520 { 269b31a1d8bSAndy Fleming #address-cells = <1>; 270b31a1d8bSAndy Fleming #size-cells = <0>; 271b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 272b31a1d8bSAndy Fleming reg = <0x25520 0x20>; 273b31a1d8bSAndy Fleming 274b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 275b31a1d8bSAndy Fleming reg = <0x11>; 276b31a1d8bSAndy Fleming device_type = "tbi-phy"; 277b31a1d8bSAndy Fleming }; 278b31a1d8bSAndy Fleming }; 279b31a1d8bSAndy Fleming 28023dd1cbfSKim Phillips 28123dd1cbfSKim Phillips enet0: ethernet@24000 { 28223dd1cbfSKim Phillips cell-index = <0>; 28323dd1cbfSKim Phillips device_type = "network"; 28423dd1cbfSKim Phillips model = "eTSEC"; 28523dd1cbfSKim Phillips compatible = "gianfar"; 28623dd1cbfSKim Phillips reg = <0x24000 0x1000>; 28723dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 288cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8 34 0x8>; 28923dd1cbfSKim Phillips phy-connection-type = "mii"; 29023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 291b31a1d8bSAndy Fleming tbi-handle = <&tbi0>; 29223dd1cbfSKim Phillips phy-handle = <&phy2>; 293125a00d7SAnton Vorontsov sleep = <&pmc 0xc0000000>; 294125a00d7SAnton Vorontsov fsl,magic-packet; 29523dd1cbfSKim Phillips }; 29623dd1cbfSKim Phillips 29723dd1cbfSKim Phillips enet1: ethernet@25000 { 29823dd1cbfSKim Phillips cell-index = <1>; 29923dd1cbfSKim Phillips device_type = "network"; 30023dd1cbfSKim Phillips model = "eTSEC"; 30123dd1cbfSKim Phillips compatible = "gianfar"; 30223dd1cbfSKim Phillips reg = <0x25000 0x1000>; 30323dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 304cda13dd1SPaul Gortmaker interrupts = <35 0x8 36 0x8 37 0x8>; 30523dd1cbfSKim Phillips phy-connection-type = "mii"; 30623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 307f17c6323SAnton Vorontsov fixed-link = <1 1 1000 0 0>; 308b31a1d8bSAndy Fleming tbi-handle = <&tbi1>; 309125a00d7SAnton Vorontsov sleep = <&pmc 0x30000000>; 310125a00d7SAnton Vorontsov fsl,magic-packet; 31123dd1cbfSKim Phillips }; 31223dd1cbfSKim Phillips 31323dd1cbfSKim Phillips serial0: serial@4500 { 31423dd1cbfSKim Phillips cell-index = <0>; 31523dd1cbfSKim Phillips device_type = "serial"; 31623dd1cbfSKim Phillips compatible = "ns16550"; 31723dd1cbfSKim Phillips reg = <0x4500 0x100>; 31823dd1cbfSKim Phillips clock-frequency = <0>; 319cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 32023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 32123dd1cbfSKim Phillips }; 32223dd1cbfSKim Phillips 32323dd1cbfSKim Phillips serial1: serial@4600 { 32423dd1cbfSKim Phillips cell-index = <1>; 32523dd1cbfSKim Phillips device_type = "serial"; 32623dd1cbfSKim Phillips compatible = "ns16550"; 32723dd1cbfSKim Phillips reg = <0x4600 0x100>; 32823dd1cbfSKim Phillips clock-frequency = <0>; 329cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 33023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 33123dd1cbfSKim Phillips }; 33223dd1cbfSKim Phillips 33323dd1cbfSKim Phillips crypto@30000 { 3343fd44736SKim Phillips compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 3353fd44736SKim Phillips "fsl,sec2.1", "fsl,sec2.0"; 33623dd1cbfSKim Phillips reg = <0x30000 0x10000>; 337cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 33823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 3393fd44736SKim Phillips fsl,num-channels = <4>; 3403fd44736SKim Phillips fsl,channel-fifo-len = <24>; 3413fd44736SKim Phillips fsl,exec-units-mask = <0x9fe>; 3423fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0ebf>; 343125a00d7SAnton Vorontsov sleep = <&pmc 0x03000000>; 344a0e8618cSAnton Vorontsov }; 345a0e8618cSAnton Vorontsov 34623dd1cbfSKim Phillips sata@18000 { 34723dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 34823dd1cbfSKim Phillips reg = <0x18000 0x1000>; 349cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 35023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 351125a00d7SAnton Vorontsov sleep = <&pmc 0x000000c0>; 35223dd1cbfSKim Phillips }; 35323dd1cbfSKim Phillips 35423dd1cbfSKim Phillips sata@19000 { 35523dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 35623dd1cbfSKim Phillips reg = <0x19000 0x1000>; 357cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 35823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 359125a00d7SAnton Vorontsov sleep = <&pmc 0x00000030>; 36023dd1cbfSKim Phillips }; 36123dd1cbfSKim Phillips 36223dd1cbfSKim Phillips /* IPIC 36323dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 36423dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 36523dd1cbfSKim Phillips * sense == 8: Level, low assertion 36623dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 36723dd1cbfSKim Phillips */ 36823dd1cbfSKim Phillips ipic: interrupt-controller@700 { 36923dd1cbfSKim Phillips compatible = "fsl,ipic"; 37023dd1cbfSKim Phillips interrupt-controller; 37123dd1cbfSKim Phillips #address-cells = <0>; 37223dd1cbfSKim Phillips #interrupt-cells = <2>; 37323dd1cbfSKim Phillips reg = <0x700 0x100>; 37423dd1cbfSKim Phillips }; 375125a00d7SAnton Vorontsov 376125a00d7SAnton Vorontsov pmc: power@b00 { 377125a00d7SAnton Vorontsov compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; 378125a00d7SAnton Vorontsov reg = <0xb00 0x100 0xa00 0x100>; 379125a00d7SAnton Vorontsov interrupts = <80 0x8>; 380125a00d7SAnton Vorontsov interrupt-parent = <&ipic>; 381125a00d7SAnton Vorontsov }; 38223dd1cbfSKim Phillips }; 38323dd1cbfSKim Phillips 38423dd1cbfSKim Phillips pci0: pci@e0008500 { 38523dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 38623dd1cbfSKim Phillips interrupt-map = < 38723dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 38823dd1cbfSKim Phillips 38923dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 390cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 22 0x8 39123dd1cbfSKim Phillips 39223dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 393cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 21 0x8 394cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 22 0x8 395cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 23 0x8 39623dd1cbfSKim Phillips 39723dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 398cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x1 &ipic 23 0x8 399cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x2 &ipic 21 0x8 400cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 40123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 402cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 40323dd1cbfSKim Phillips bus-range = <0 0>; 404cda13dd1SPaul Gortmaker ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 405cda13dd1SPaul Gortmaker 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 406cda13dd1SPaul Gortmaker 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 407125a00d7SAnton Vorontsov sleep = <&pmc 0x00010000>; 40823dd1cbfSKim Phillips clock-frequency = <66666666>; 40923dd1cbfSKim Phillips #interrupt-cells = <1>; 41023dd1cbfSKim Phillips #size-cells = <2>; 41123dd1cbfSKim Phillips #address-cells = <3>; 4125b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 4135b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 41423dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 41523dd1cbfSKim Phillips device_type = "pci"; 41623dd1cbfSKim Phillips }; 4170585a155SAnton Vorontsov 4180585a155SAnton Vorontsov pci1: pcie@e0009000 { 4190585a155SAnton Vorontsov #address-cells = <3>; 4200585a155SAnton Vorontsov #size-cells = <2>; 4210585a155SAnton Vorontsov #interrupt-cells = <1>; 4220585a155SAnton Vorontsov device_type = "pci"; 4230585a155SAnton Vorontsov compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; 4240585a155SAnton Vorontsov reg = <0xe0009000 0x00001000>; 4250585a155SAnton Vorontsov ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 4260585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; 4270585a155SAnton Vorontsov bus-range = <0 255>; 4280585a155SAnton Vorontsov interrupt-map-mask = <0xf800 0 0 7>; 4290585a155SAnton Vorontsov interrupt-map = <0 0 0 1 &ipic 1 8 4300585a155SAnton Vorontsov 0 0 0 2 &ipic 1 8 4310585a155SAnton Vorontsov 0 0 0 3 &ipic 1 8 4320585a155SAnton Vorontsov 0 0 0 4 &ipic 1 8>; 433125a00d7SAnton Vorontsov sleep = <&pmc 0x00300000>; 4340585a155SAnton Vorontsov clock-frequency = <0>; 4350585a155SAnton Vorontsov 4360585a155SAnton Vorontsov pcie@0 { 4370585a155SAnton Vorontsov #address-cells = <3>; 4380585a155SAnton Vorontsov #size-cells = <2>; 4390585a155SAnton Vorontsov device_type = "pci"; 4400585a155SAnton Vorontsov reg = <0 0 0 0 0>; 4410585a155SAnton Vorontsov ranges = <0x02000000 0 0xa8000000 4420585a155SAnton Vorontsov 0x02000000 0 0xa8000000 4430585a155SAnton Vorontsov 0 0x10000000 4440585a155SAnton Vorontsov 0x01000000 0 0x00000000 4450585a155SAnton Vorontsov 0x01000000 0 0x00000000 4460585a155SAnton Vorontsov 0 0x00800000>; 4470585a155SAnton Vorontsov }; 4480585a155SAnton Vorontsov }; 4490585a155SAnton Vorontsov 4500585a155SAnton Vorontsov pci2: pcie@e000a000 { 4510585a155SAnton Vorontsov #address-cells = <3>; 4520585a155SAnton Vorontsov #size-cells = <2>; 4530585a155SAnton Vorontsov #interrupt-cells = <1>; 4540585a155SAnton Vorontsov device_type = "pci"; 4550585a155SAnton Vorontsov compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; 4560585a155SAnton Vorontsov reg = <0xe000a000 0x00001000>; 4570585a155SAnton Vorontsov ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 4580585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; 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4800585a155SAnton Vorontsov }; 48123dd1cbfSKim Phillips}; 482