1/*
2 * MPC8349E-mITX Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	model = "MPC8349EMITX";
16	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	aliases {
21		ethernet0 = &enet0;
22		ethernet1 = &enet1;
23		serial0 = &serial0;
24		serial1 = &serial1;
25		pci0 = &pci0;
26		pci1 = &pci1;
27	};
28
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		PowerPC,8349@0 {
34			device_type = "cpu";
35			reg = <0x0>;
36			d-cache-line-size = <32>;
37			i-cache-line-size = <32>;
38			d-cache-size = <32768>;
39			i-cache-size = <32768>;
40			timebase-frequency = <0>;	// from bootloader
41			bus-frequency = <0>;		// from bootloader
42			clock-frequency = <0>;		// from bootloader
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x10000000>;
49	};
50
51	soc8349@e0000000 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		device_type = "soc";
55		compatible = "simple-bus";
56		ranges = <0x0 0xe0000000 0x00100000>;
57		reg = <0xe0000000 0x00000200>;
58		bus-frequency = <0>;                    // from bootloader
59
60		wdt@200 {
61			device_type = "watchdog";
62			compatible = "mpc83xx_wdt";
63			reg = <0x200 0x100>;
64		};
65
66		gpio1: gpio-controller@c00 {
67			#gpio-cells = <2>;
68			compatible = "fsl,mpc8349-gpio";
69			reg = <0xc00 0x100>;
70			interrupts = <74 0x8>;
71			interrupt-parent = <&ipic>;
72			gpio-controller;
73		};
74
75		gpio2: gpio-controller@d00 {
76			#gpio-cells = <2>;
77			compatible = "fsl,mpc8349-gpio";
78			reg = <0xd00 0x100>;
79			interrupts = <75 0x8>;
80			interrupt-parent = <&ipic>;
81			gpio-controller;
82		};
83
84		i2c@3000 {
85			#address-cells = <1>;
86			#size-cells = <0>;
87			cell-index = <0>;
88			compatible = "fsl-i2c";
89			reg = <0x3000 0x100>;
90			interrupts = <14 0x8>;
91			interrupt-parent = <&ipic>;
92			dfsrr;
93
94			eeprom: at24@50 {
95				compatible = "st-micro,24c256";
96				reg = <0x50>;
97			};
98
99		};
100
101		i2c@3100 {
102			#address-cells = <1>;
103			#size-cells = <0>;
104			cell-index = <1>;
105			compatible = "fsl-i2c";
106			reg = <0x3100 0x100>;
107			interrupts = <15 0x8>;
108			interrupt-parent = <&ipic>;
109			dfsrr;
110
111			rtc@68 {
112				compatible = "dallas,ds1339";
113				reg = <0x68>;
114				interrupts = <18 0x8>;
115				interrupt-parent = <&ipic>;
116			};
117
118			pcf1: iexp@38 {
119				#gpio-cells = <2>;
120				compatible = "ti,pcf8574a";
121				reg = <0x38>;
122				gpio-controller;
123			};
124
125			pcf2: iexp@39 {
126				#gpio-cells = <2>;
127				compatible = "ti,pcf8574a";
128				reg = <0x39>;
129				gpio-controller;
130			};
131
132			spd: at24@51 {
133				compatible = "at24,spd";
134				reg = <0x51>;
135			};
136
137			mcu_pio: mcu@a {
138				#gpio-cells = <2>;
139				compatible = "fsl,mc9s08qg8-mpc8349emitx",
140					     "fsl,mcu-mpc8349emitx";
141				reg = <0x0a>;
142				gpio-controller;
143			};
144		};
145
146		spi@7000 {
147			cell-index = <0>;
148			compatible = "fsl,spi";
149			reg = <0x7000 0x1000>;
150			interrupts = <16 0x8>;
151			interrupt-parent = <&ipic>;
152			mode = "cpu";
153		};
154
155		dma@82a8 {
156			#address-cells = <1>;
157			#size-cells = <1>;
158			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
159			reg = <0x82a8 4>;
160			ranges = <0 0x8100 0x1a8>;
161			interrupt-parent = <&ipic>;
162			interrupts = <71 8>;
163			cell-index = <0>;
164			dma-channel@0 {
165				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
166				reg = <0 0x80>;
167				cell-index = <0>;
168				interrupt-parent = <&ipic>;
169				interrupts = <71 8>;
170			};
171			dma-channel@80 {
172				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
173				reg = <0x80 0x80>;
174				cell-index = <1>;
175				interrupt-parent = <&ipic>;
176				interrupts = <71 8>;
177			};
178			dma-channel@100 {
179				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
180				reg = <0x100 0x80>;
181				cell-index = <2>;
182				interrupt-parent = <&ipic>;
183				interrupts = <71 8>;
184			};
185			dma-channel@180 {
186				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
187				reg = <0x180 0x28>;
188				cell-index = <3>;
189				interrupt-parent = <&ipic>;
190				interrupts = <71 8>;
191			};
192		};
193
194		usb@22000 {
195			compatible = "fsl-usb2-mph";
196			reg = <0x22000 0x1000>;
197			#address-cells = <1>;
198			#size-cells = <0>;
199			interrupt-parent = <&ipic>;
200			interrupts = <39 0x8>;
201			phy_type = "ulpi";
202			port0;
203		};
204
205		usb@23000 {
206			compatible = "fsl-usb2-dr";
207			reg = <0x23000 0x1000>;
208			#address-cells = <1>;
209			#size-cells = <0>;
210			interrupt-parent = <&ipic>;
211			interrupts = <38 0x8>;
212			dr_mode = "peripheral";
213			phy_type = "ulpi";
214		};
215
216		enet0: ethernet@24000 {
217			#address-cells = <1>;
218			#size-cells = <1>;
219			cell-index = <0>;
220			device_type = "network";
221			model = "TSEC";
222			compatible = "gianfar";
223			reg = <0x24000 0x1000>;
224			ranges = <0x0 0x24000 0x1000>;
225			local-mac-address = [ 00 00 00 00 00 00 ];
226			interrupts = <32 0x8 33 0x8 34 0x8>;
227			interrupt-parent = <&ipic>;
228			tbi-handle = <&tbi0>;
229			phy-handle = <&phy1c>;
230			linux,network-index = <0>;
231
232			mdio@520 {
233				#address-cells = <1>;
234				#size-cells = <0>;
235				compatible = "fsl,gianfar-mdio";
236				reg = <0x520 0x20>;
237
238				/* Vitesse 8201 */
239				phy1c: ethernet-phy@1c {
240					interrupt-parent = <&ipic>;
241					interrupts = <18 0x8>;
242					reg = <0x1c>;
243					device_type = "ethernet-phy";
244				};
245
246				tbi0: tbi-phy@11 {
247					reg = <0x11>;
248					device_type = "tbi-phy";
249				};
250			};
251		};
252
253		enet1: ethernet@25000 {
254			#address-cells = <1>;
255			#size-cells = <1>;
256			cell-index = <1>;
257			device_type = "network";
258			model = "TSEC";
259			compatible = "gianfar";
260			reg = <0x25000 0x1000>;
261			ranges = <0x0 0x25000 0x1000>;
262			local-mac-address = [ 00 00 00 00 00 00 ];
263			interrupts = <35 0x8 36 0x8 37 0x8>;
264			interrupt-parent = <&ipic>;
265			/* Vitesse 7385 isn't on the MDIO bus */
266			fixed-link = <1 1 1000 0 0>;
267			linux,network-index = <1>;
268			tbi-handle = <&tbi1>;
269
270			mdio@520 {
271				#address-cells = <1>;
272				#size-cells = <0>;
273				compatible = "fsl,gianfar-tbi";
274				reg = <0x520 0x20>;
275
276				tbi1: tbi-phy@11 {
277					reg = <0x11>;
278					device_type = "tbi-phy";
279				};
280			};
281		};
282
283		serial0: serial@4500 {
284			cell-index = <0>;
285			device_type = "serial";
286			compatible = "fsl,ns16550", "ns16550";
287			reg = <0x4500 0x100>;
288			clock-frequency = <0>;		// from bootloader
289			interrupts = <9 0x8>;
290			interrupt-parent = <&ipic>;
291		};
292
293		serial1: serial@4600 {
294			cell-index = <1>;
295			device_type = "serial";
296			compatible = "fsl,ns16550", "ns16550";
297			reg = <0x4600 0x100>;
298			clock-frequency = <0>;		// from bootloader
299			interrupts = <10 0x8>;
300			interrupt-parent = <&ipic>;
301		};
302
303		crypto@30000 {
304			compatible = "fsl,sec2.0";
305			reg = <0x30000 0x10000>;
306			interrupts = <11 0x8>;
307			interrupt-parent = <&ipic>;
308			fsl,num-channels = <4>;
309			fsl,channel-fifo-len = <24>;
310			fsl,exec-units-mask = <0x7e>;
311			fsl,descriptor-types-mask = <0x01010ebf>;
312		};
313
314		ipic: pic@700 {
315			interrupt-controller;
316			#address-cells = <0>;
317			#interrupt-cells = <2>;
318			reg = <0x700 0x100>;
319			device_type = "ipic";
320		};
321
322		gpio-leds {
323			compatible = "gpio-leds";
324
325			green {
326				label = "Green";
327				gpios = <&pcf1 0 1>;
328				linux,default-trigger = "heartbeat";
329			};
330
331			yellow {
332				label = "Yellow";
333				gpios = <&pcf1 1 1>;
334				/* linux,default-trigger = "heartbeat"; */
335				default-state = "on";
336			};
337		};
338
339	};
340
341	pci0: pci@e0008500 {
342		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
343		interrupt-map = <
344				/* IDSEL 0x10 - SATA */
345				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
346				>;
347		interrupt-parent = <&ipic>;
348		interrupts = <66 0x8>;
349		bus-range = <0x0 0x0>;
350		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
351			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
352			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
353		clock-frequency = <66666666>;
354		#interrupt-cells = <1>;
355		#size-cells = <2>;
356		#address-cells = <3>;
357		reg = <0xe0008500 0x100		/* internal registers */
358		       0xe0008300 0x8>;		/* config space access registers */
359		compatible = "fsl,mpc8349-pci";
360		device_type = "pci";
361	};
362
363	pci1: pci@e0008600 {
364		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
365		interrupt-map = <
366				/* IDSEL 0x0E - MiniPCI Slot */
367				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
368
369				/* IDSEL 0x0F - PCI Slot */
370				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
371				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
372				>;
373		interrupt-parent = <&ipic>;
374		interrupts = <67 0x8>;
375		bus-range = <0x0 0x0>;
376		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
377			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
378			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
379		clock-frequency = <66666666>;
380		#interrupt-cells = <1>;
381		#size-cells = <2>;
382		#address-cells = <3>;
383		reg = <0xe0008600 0x100		/* internal registers */
384		       0xe0008380 0x8>;		/* config space access registers */
385		compatible = "fsl,mpc8349-pci";
386		device_type = "pci";
387	};
388
389	localbus@e0005000 {
390		#address-cells = <2>;
391		#size-cells = <1>;
392		compatible = "fsl,mpc8349e-localbus",
393			     "fsl,pq2pro-localbus",
394			     "simple-bus";
395		reg = <0xe0005000 0xd8>;
396		ranges = <0x0 0x0 0xfe000000 0x1000000	/* flash */
397			  0x1 0x0 0xf8000000 0x20000	/* VSC 7385 */
398			  0x2 0x0 0xf9000000 0x200000	/* exp slot */
399			  0x3 0x0 0xf0000000 0x210>;	/* CF slot */
400
401		flash@0,0 {
402			compatible = "cfi-flash";
403			reg = <0x0      0x0 0x800000>;
404			bank-width = <2>;
405			device-width = <1>;
406		};
407
408		flash@0,800000 {
409			#address-cells = <1>;
410			#size-cells = <1>;
411			compatible = "cfi-flash";
412			reg = <0x0 0x800000 0x800000>;
413			bank-width = <2>;
414			device-width = <1>;
415		};
416
417		pata@3,0 {
418			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
419			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
420			reg-shift = <1>;
421			pio-mode = <6>;
422			interrupts = <23 0x8>;
423			interrupt-parent = <&ipic>;
424		};
425	};
426};
427