1/*
2 * MPC8349E-mITX Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	model = "MPC8349EMITX";
16	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	aliases {
21		ethernet0 = &enet0;
22		ethernet1 = &enet1;
23		serial0 = &serial0;
24		serial1 = &serial1;
25		pci0 = &pci0;
26		pci1 = &pci1;
27	};
28
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		PowerPC,8349@0 {
34			device_type = "cpu";
35			reg = <0x0>;
36			d-cache-line-size = <32>;
37			i-cache-line-size = <32>;
38			d-cache-size = <32768>;
39			i-cache-size = <32768>;
40			timebase-frequency = <0>;	// from bootloader
41			bus-frequency = <0>;		// from bootloader
42			clock-frequency = <0>;		// from bootloader
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x10000000>;
49	};
50
51	soc8349@e0000000 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		device_type = "soc";
55		compatible = "simple-bus";
56		ranges = <0x0 0xe0000000 0x00100000>;
57		reg = <0xe0000000 0x00000200>;
58		bus-frequency = <0>;                    // from bootloader
59
60		wdt@200 {
61			device_type = "watchdog";
62			compatible = "mpc83xx_wdt";
63			reg = <0x200 0x100>;
64		};
65
66		i2c@3000 {
67			#address-cells = <1>;
68			#size-cells = <0>;
69			cell-index = <0>;
70			compatible = "fsl-i2c";
71			reg = <0x3000 0x100>;
72			interrupts = <14 0x8>;
73			interrupt-parent = <&ipic>;
74			dfsrr;
75		};
76
77		i2c@3100 {
78			#address-cells = <1>;
79			#size-cells = <0>;
80			cell-index = <1>;
81			compatible = "fsl-i2c";
82			reg = <0x3100 0x100>;
83			interrupts = <15 0x8>;
84			interrupt-parent = <&ipic>;
85			dfsrr;
86
87			rtc@68 {
88				device_type = "rtc";
89				compatible = "dallas,ds1339";
90				reg = <0x68>;
91				interrupts = <18 0x8>;
92				interrupt-parent = <&ipic>;
93			};
94
95			mcu_pio: mcu@a {
96				#gpio-cells = <2>;
97				compatible = "fsl,mc9s08qg8-mpc8349emitx",
98					     "fsl,mcu-mpc8349emitx";
99				reg = <0x0a>;
100				gpio-controller;
101			};
102		};
103
104		spi@7000 {
105			cell-index = <0>;
106			compatible = "fsl,spi";
107			reg = <0x7000 0x1000>;
108			interrupts = <16 0x8>;
109			interrupt-parent = <&ipic>;
110			mode = "cpu";
111		};
112
113		dma@82a8 {
114			#address-cells = <1>;
115			#size-cells = <1>;
116			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
117			reg = <0x82a8 4>;
118			ranges = <0 0x8100 0x1a8>;
119			interrupt-parent = <&ipic>;
120			interrupts = <71 8>;
121			cell-index = <0>;
122			dma-channel@0 {
123				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124				reg = <0 0x80>;
125				cell-index = <0>;
126				interrupt-parent = <&ipic>;
127				interrupts = <71 8>;
128			};
129			dma-channel@80 {
130				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
131				reg = <0x80 0x80>;
132				cell-index = <1>;
133				interrupt-parent = <&ipic>;
134				interrupts = <71 8>;
135			};
136			dma-channel@100 {
137				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
138				reg = <0x100 0x80>;
139				cell-index = <2>;
140				interrupt-parent = <&ipic>;
141				interrupts = <71 8>;
142			};
143			dma-channel@180 {
144				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
145				reg = <0x180 0x28>;
146				cell-index = <3>;
147				interrupt-parent = <&ipic>;
148				interrupts = <71 8>;
149			};
150		};
151
152		usb@22000 {
153			compatible = "fsl-usb2-mph";
154			reg = <0x22000 0x1000>;
155			#address-cells = <1>;
156			#size-cells = <0>;
157			interrupt-parent = <&ipic>;
158			interrupts = <39 0x8>;
159			phy_type = "ulpi";
160			port1;
161		};
162
163		usb@23000 {
164			compatible = "fsl-usb2-dr";
165			reg = <0x23000 0x1000>;
166			#address-cells = <1>;
167			#size-cells = <0>;
168			interrupt-parent = <&ipic>;
169			interrupts = <38 0x8>;
170			dr_mode = "peripheral";
171			phy_type = "ulpi";
172		};
173
174		mdio@24520 {
175			#address-cells = <1>;
176			#size-cells = <0>;
177			compatible = "fsl,gianfar-mdio";
178			reg = <0x24520 0x20>;
179
180			/* Vitesse 8201 */
181			phy1c: ethernet-phy@1c {
182				interrupt-parent = <&ipic>;
183				interrupts = <18 0x8>;
184				reg = <0x1c>;
185				device_type = "ethernet-phy";
186			};
187			tbi0: tbi-phy@11 {
188				reg = <0x11>;
189				device_type = "tbi-phy";
190			};
191		};
192
193		mdio@25520 {
194			#address-cells = <1>;
195			#size-cells = <0>;
196			compatible = "fsl,gianfar-tbi";
197			reg = <0x25520 0x20>;
198
199			tbi1: tbi-phy@11 {
200				reg = <0x11>;
201				device_type = "tbi-phy";
202			};
203		};
204
205		enet0: ethernet@24000 {
206			cell-index = <0>;
207			device_type = "network";
208			model = "TSEC";
209			compatible = "gianfar";
210			reg = <0x24000 0x1000>;
211			local-mac-address = [ 00 00 00 00 00 00 ];
212			interrupts = <32 0x8 33 0x8 34 0x8>;
213			interrupt-parent = <&ipic>;
214			tbi-handle = <&tbi0>;
215			phy-handle = <&phy1c>;
216			linux,network-index = <0>;
217		};
218
219		enet1: ethernet@25000 {
220			cell-index = <1>;
221			device_type = "network";
222			model = "TSEC";
223			compatible = "gianfar";
224			reg = <0x25000 0x1000>;
225			local-mac-address = [ 00 00 00 00 00 00 ];
226			interrupts = <35 0x8 36 0x8 37 0x8>;
227			interrupt-parent = <&ipic>;
228			/* Vitesse 7385 isn't on the MDIO bus */
229			fixed-link = <1 1 1000 0 0>;
230			linux,network-index = <1>;
231			tbi-handle = <&tbi1>;
232		};
233
234		serial0: serial@4500 {
235			cell-index = <0>;
236			device_type = "serial";
237			compatible = "ns16550";
238			reg = <0x4500 0x100>;
239			clock-frequency = <0>;		// from bootloader
240			interrupts = <9 0x8>;
241			interrupt-parent = <&ipic>;
242		};
243
244		serial1: serial@4600 {
245			cell-index = <1>;
246			device_type = "serial";
247			compatible = "ns16550";
248			reg = <0x4600 0x100>;
249			clock-frequency = <0>;		// from bootloader
250			interrupts = <10 0x8>;
251			interrupt-parent = <&ipic>;
252		};
253
254		crypto@30000 {
255			compatible = "fsl,sec2.0";
256			reg = <0x30000 0x10000>;
257			interrupts = <11 0x8>;
258			interrupt-parent = <&ipic>;
259			fsl,num-channels = <4>;
260			fsl,channel-fifo-len = <24>;
261			fsl,exec-units-mask = <0x7e>;
262			fsl,descriptor-types-mask = <0x01010ebf>;
263		};
264
265		ipic: pic@700 {
266			interrupt-controller;
267			#address-cells = <0>;
268			#interrupt-cells = <2>;
269			reg = <0x700 0x100>;
270			device_type = "ipic";
271		};
272	};
273
274	pci0: pci@e0008500 {
275		cell-index = <1>;
276		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
277		interrupt-map = <
278				/* IDSEL 0x10 - SATA */
279				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
280				>;
281		interrupt-parent = <&ipic>;
282		interrupts = <66 0x8>;
283		bus-range = <0x0 0x0>;
284		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
285			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
286			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
287		clock-frequency = <66666666>;
288		#interrupt-cells = <1>;
289		#size-cells = <2>;
290		#address-cells = <3>;
291		reg = <0xe0008500 0x100		/* internal registers */
292		       0xe0008300 0x8>;		/* config space access registers */
293		compatible = "fsl,mpc8349-pci";
294		device_type = "pci";
295	};
296
297	pci1: pci@e0008600 {
298		cell-index = <2>;
299		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
300		interrupt-map = <
301				/* IDSEL 0x0E - MiniPCI Slot */
302				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
303
304				/* IDSEL 0x0F - PCI Slot */
305				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
306				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
307				>;
308		interrupt-parent = <&ipic>;
309		interrupts = <67 0x8>;
310		bus-range = <0x0 0x0>;
311		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
312			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
313			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
314		clock-frequency = <66666666>;
315		#interrupt-cells = <1>;
316		#size-cells = <2>;
317		#address-cells = <3>;
318		reg = <0xe0008600 0x100		/* internal registers */
319		       0xe0008380 0x8>;		/* config space access registers */
320		compatible = "fsl,mpc8349-pci";
321		device_type = "pci";
322	};
323
324	localbus@e0005000 {
325		#address-cells = <2>;
326		#size-cells = <1>;
327		compatible = "fsl,mpc8349e-localbus",
328			     "fsl,pq2pro-localbus";
329		reg = <0xe0005000 0xd8>;
330		ranges = <0x3 0x0 0xf0000000 0x210>;
331
332		pata@3,0 {
333			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
334			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
335			reg-shift = <1>;
336			pio-mode = <6>;
337			interrupts = <23 0x8>;
338			interrupt-parent = <&ipic>;
339		};
340	};
341};
342