1/* 2 * MPC8349E-mITX Device Tree Source 3 * 4 * Copyright 2006 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/dts-v1/; 13 14/ { 15 model = "MPC8349EMITX"; 16 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 aliases { 21 ethernet0 = &enet0; 22 ethernet1 = &enet1; 23 serial0 = &serial0; 24 serial1 = &serial1; 25 pci0 = &pci0; 26 pci1 = &pci1; 27 }; 28 29 cpus { 30 #address-cells = <1>; 31 #size-cells = <0>; 32 33 PowerPC,8349@0 { 34 device_type = "cpu"; 35 reg = <0x0>; 36 d-cache-line-size = <32>; 37 i-cache-line-size = <32>; 38 d-cache-size = <32768>; 39 i-cache-size = <32768>; 40 timebase-frequency = <0>; // from bootloader 41 bus-frequency = <0>; // from bootloader 42 clock-frequency = <0>; // from bootloader 43 }; 44 }; 45 46 memory { 47 device_type = "memory"; 48 reg = <0x00000000 0x10000000>; 49 }; 50 51 soc8349@e0000000 { 52 #address-cells = <1>; 53 #size-cells = <1>; 54 device_type = "soc"; 55 compatible = "simple-bus"; 56 ranges = <0x0 0xe0000000 0x00100000>; 57 reg = <0xe0000000 0x00000200>; 58 bus-frequency = <0>; // from bootloader 59 60 wdt@200 { 61 device_type = "watchdog"; 62 compatible = "mpc83xx_wdt"; 63 reg = <0x200 0x100>; 64 }; 65 66 i2c@3000 { 67 #address-cells = <1>; 68 #size-cells = <0>; 69 cell-index = <0>; 70 compatible = "fsl-i2c"; 71 reg = <0x3000 0x100>; 72 interrupts = <14 0x8>; 73 interrupt-parent = <&ipic>; 74 dfsrr; 75 }; 76 77 i2c@3100 { 78 #address-cells = <1>; 79 #size-cells = <0>; 80 cell-index = <1>; 81 compatible = "fsl-i2c"; 82 reg = <0x3100 0x100>; 83 interrupts = <15 0x8>; 84 interrupt-parent = <&ipic>; 85 dfsrr; 86 }; 87 88 spi@7000 { 89 cell-index = <0>; 90 compatible = "fsl,spi"; 91 reg = <0x7000 0x1000>; 92 interrupts = <16 0x8>; 93 interrupt-parent = <&ipic>; 94 mode = "cpu"; 95 }; 96 97 dma@82a8 { 98 #address-cells = <1>; 99 #size-cells = <1>; 100 compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; 101 reg = <0x82a8 4>; 102 ranges = <0 0x8100 0x1a8>; 103 interrupt-parent = <&ipic>; 104 interrupts = <71 8>; 105 cell-index = <0>; 106 dma-channel@0 { 107 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 108 reg = <0 0x80>; 109 cell-index = <0>; 110 interrupt-parent = <&ipic>; 111 interrupts = <71 8>; 112 }; 113 dma-channel@80 { 114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 115 reg = <0x80 0x80>; 116 cell-index = <1>; 117 interrupt-parent = <&ipic>; 118 interrupts = <71 8>; 119 }; 120 dma-channel@100 { 121 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 122 reg = <0x100 0x80>; 123 cell-index = <2>; 124 interrupt-parent = <&ipic>; 125 interrupts = <71 8>; 126 }; 127 dma-channel@180 { 128 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 129 reg = <0x180 0x28>; 130 cell-index = <3>; 131 interrupt-parent = <&ipic>; 132 interrupts = <71 8>; 133 }; 134 }; 135 136 usb@22000 { 137 compatible = "fsl-usb2-mph"; 138 reg = <0x22000 0x1000>; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 interrupt-parent = <&ipic>; 142 interrupts = <39 0x8>; 143 phy_type = "ulpi"; 144 port1; 145 }; 146 147 usb@23000 { 148 compatible = "fsl-usb2-dr"; 149 reg = <0x23000 0x1000>; 150 #address-cells = <1>; 151 #size-cells = <0>; 152 interrupt-parent = <&ipic>; 153 interrupts = <38 0x8>; 154 dr_mode = "peripheral"; 155 phy_type = "ulpi"; 156 }; 157 158 mdio@24520 { 159 #address-cells = <1>; 160 #size-cells = <0>; 161 compatible = "fsl,gianfar-mdio"; 162 reg = <0x24520 0x20>; 163 164 /* Vitesse 8201 */ 165 phy1c: ethernet-phy@1c { 166 interrupt-parent = <&ipic>; 167 interrupts = <18 0x8>; 168 reg = <0x1c>; 169 device_type = "ethernet-phy"; 170 }; 171 }; 172 173 enet0: ethernet@24000 { 174 cell-index = <0>; 175 device_type = "network"; 176 model = "TSEC"; 177 compatible = "gianfar"; 178 reg = <0x24000 0x1000>; 179 local-mac-address = [ 00 00 00 00 00 00 ]; 180 interrupts = <32 0x8 33 0x8 34 0x8>; 181 interrupt-parent = <&ipic>; 182 phy-handle = <&phy1c>; 183 linux,network-index = <0>; 184 }; 185 186 enet1: ethernet@25000 { 187 cell-index = <1>; 188 device_type = "network"; 189 model = "TSEC"; 190 compatible = "gianfar"; 191 reg = <0x25000 0x1000>; 192 local-mac-address = [ 00 00 00 00 00 00 ]; 193 interrupts = <35 0x8 36 0x8 37 0x8>; 194 interrupt-parent = <&ipic>; 195 /* Vitesse 7385 isn't on the MDIO bus */ 196 fixed-link = <1 1 1000 0 0>; 197 linux,network-index = <1>; 198 }; 199 200 serial0: serial@4500 { 201 cell-index = <0>; 202 device_type = "serial"; 203 compatible = "ns16550"; 204 reg = <0x4500 0x100>; 205 clock-frequency = <0>; // from bootloader 206 interrupts = <9 0x8>; 207 interrupt-parent = <&ipic>; 208 }; 209 210 serial1: serial@4600 { 211 cell-index = <1>; 212 device_type = "serial"; 213 compatible = "ns16550"; 214 reg = <0x4600 0x100>; 215 clock-frequency = <0>; // from bootloader 216 interrupts = <10 0x8>; 217 interrupt-parent = <&ipic>; 218 }; 219 220 crypto@30000 { 221 compatible = "fsl,sec2.0"; 222 reg = <0x30000 0x10000>; 223 interrupts = <11 0x8>; 224 interrupt-parent = <&ipic>; 225 fsl,num-channels = <4>; 226 fsl,channel-fifo-len = <24>; 227 fsl,exec-units-mask = <0x7e>; 228 fsl,descriptor-types-mask = <0x01010ebf>; 229 }; 230 231 ipic: pic@700 { 232 interrupt-controller; 233 #address-cells = <0>; 234 #interrupt-cells = <2>; 235 reg = <0x700 0x100>; 236 device_type = "ipic"; 237 }; 238 }; 239 240 pci0: pci@e0008500 { 241 cell-index = <1>; 242 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 243 interrupt-map = < 244 /* IDSEL 0x10 - SATA */ 245 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */ 246 >; 247 interrupt-parent = <&ipic>; 248 interrupts = <66 0x8>; 249 bus-range = <0x0 0x0>; 250 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 251 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 252 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; 253 clock-frequency = <66666666>; 254 #interrupt-cells = <1>; 255 #size-cells = <2>; 256 #address-cells = <3>; 257 reg = <0xe0008500 0x100>; 258 compatible = "fsl,mpc8349-pci"; 259 device_type = "pci"; 260 }; 261 262 pci1: pci@e0008600 { 263 cell-index = <2>; 264 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 265 interrupt-map = < 266 /* IDSEL 0x0E - MiniPCI Slot */ 267 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */ 268 269 /* IDSEL 0x0F - PCI Slot */ 270 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ 271 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ 272 >; 273 interrupt-parent = <&ipic>; 274 interrupts = <67 0x8>; 275 bus-range = <0x0 0x0>; 276 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 277 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 278 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; 279 clock-frequency = <66666666>; 280 #interrupt-cells = <1>; 281 #size-cells = <2>; 282 #address-cells = <3>; 283 reg = <0xe0008600 0x100>; 284 compatible = "fsl,mpc8349-pci"; 285 device_type = "pci"; 286 }; 287 288 localbus@e0005000 { 289 #address-cells = <2>; 290 #size-cells = <1>; 291 compatible = "fsl,mpc8349e-localbus", 292 "fsl,pq2pro-localbus"; 293 reg = <0xe0005000 0xd8>; 294 ranges = <0x3 0x0 0xf0000000 0x210>; 295 296 pata@3,0 { 297 compatible = "fsl,mpc8349emitx-pata", "ata-generic"; 298 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>; 299 reg-shift = <1>; 300 pio-mode = <6>; 301 interrupts = <23 0x8>; 302 interrupt-parent = <&ipic>; 303 }; 304 }; 305}; 306