1/*
2 * MPC8349E-mITX Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	model = "MPC8349EMITX";
16	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	aliases {
21		ethernet0 = &enet0;
22		ethernet1 = &enet1;
23		serial0 = &serial0;
24		serial1 = &serial1;
25		pci0 = &pci0;
26		pci1 = &pci1;
27	};
28
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		PowerPC,8349@0 {
34			device_type = "cpu";
35			reg = <0x0>;
36			d-cache-line-size = <32>;
37			i-cache-line-size = <32>;
38			d-cache-size = <32768>;
39			i-cache-size = <32768>;
40			timebase-frequency = <0>;	// from bootloader
41			bus-frequency = <0>;		// from bootloader
42			clock-frequency = <0>;		// from bootloader
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x10000000>;
49	};
50
51	soc8349@e0000000 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		device_type = "soc";
55		compatible = "simple-bus";
56		ranges = <0x0 0xe0000000 0x00100000>;
57		reg = <0xe0000000 0x00000200>;
58		bus-frequency = <0>;                    // from bootloader
59
60		wdt@200 {
61			device_type = "watchdog";
62			compatible = "mpc83xx_wdt";
63			reg = <0x200 0x100>;
64		};
65
66		gpio1: gpio-controller@c00 {
67			#gpio-cells = <2>;
68			compatible = "fsl,mpc8349-gpio";
69			reg = <0xc00 0x100>;
70			interrupts = <74 0x8>;
71			interrupt-parent = <&ipic>;
72			gpio-controller;
73		};
74
75		gpio2: gpio-controller@d00 {
76			#gpio-cells = <2>;
77			compatible = "fsl,mpc8349-gpio";
78			reg = <0xd00 0x100>;
79			interrupts = <75 0x8>;
80			interrupt-parent = <&ipic>;
81			gpio-controller;
82		};
83
84		i2c@3000 {
85			#address-cells = <1>;
86			#size-cells = <0>;
87			cell-index = <0>;
88			compatible = "fsl-i2c";
89			reg = <0x3000 0x100>;
90			interrupts = <14 0x8>;
91			interrupt-parent = <&ipic>;
92			dfsrr;
93		};
94
95		i2c@3100 {
96			#address-cells = <1>;
97			#size-cells = <0>;
98			cell-index = <1>;
99			compatible = "fsl-i2c";
100			reg = <0x3100 0x100>;
101			interrupts = <15 0x8>;
102			interrupt-parent = <&ipic>;
103			dfsrr;
104
105			rtc@68 {
106				compatible = "dallas,ds1339";
107				reg = <0x68>;
108				interrupts = <18 0x8>;
109				interrupt-parent = <&ipic>;
110			};
111
112			mcu_pio: mcu@a {
113				#gpio-cells = <2>;
114				compatible = "fsl,mc9s08qg8-mpc8349emitx",
115					     "fsl,mcu-mpc8349emitx";
116				reg = <0x0a>;
117				gpio-controller;
118			};
119		};
120
121		spi@7000 {
122			cell-index = <0>;
123			compatible = "fsl,spi";
124			reg = <0x7000 0x1000>;
125			interrupts = <16 0x8>;
126			interrupt-parent = <&ipic>;
127			mode = "cpu";
128		};
129
130		dma@82a8 {
131			#address-cells = <1>;
132			#size-cells = <1>;
133			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
134			reg = <0x82a8 4>;
135			ranges = <0 0x8100 0x1a8>;
136			interrupt-parent = <&ipic>;
137			interrupts = <71 8>;
138			cell-index = <0>;
139			dma-channel@0 {
140				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
141				reg = <0 0x80>;
142				cell-index = <0>;
143				interrupt-parent = <&ipic>;
144				interrupts = <71 8>;
145			};
146			dma-channel@80 {
147				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
148				reg = <0x80 0x80>;
149				cell-index = <1>;
150				interrupt-parent = <&ipic>;
151				interrupts = <71 8>;
152			};
153			dma-channel@100 {
154				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
155				reg = <0x100 0x80>;
156				cell-index = <2>;
157				interrupt-parent = <&ipic>;
158				interrupts = <71 8>;
159			};
160			dma-channel@180 {
161				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
162				reg = <0x180 0x28>;
163				cell-index = <3>;
164				interrupt-parent = <&ipic>;
165				interrupts = <71 8>;
166			};
167		};
168
169		usb@22000 {
170			compatible = "fsl-usb2-mph";
171			reg = <0x22000 0x1000>;
172			#address-cells = <1>;
173			#size-cells = <0>;
174			interrupt-parent = <&ipic>;
175			interrupts = <39 0x8>;
176			phy_type = "ulpi";
177			port0;
178		};
179
180		usb@23000 {
181			compatible = "fsl-usb2-dr";
182			reg = <0x23000 0x1000>;
183			#address-cells = <1>;
184			#size-cells = <0>;
185			interrupt-parent = <&ipic>;
186			interrupts = <38 0x8>;
187			dr_mode = "peripheral";
188			phy_type = "ulpi";
189		};
190
191		enet0: ethernet@24000 {
192			#address-cells = <1>;
193			#size-cells = <1>;
194			cell-index = <0>;
195			device_type = "network";
196			model = "TSEC";
197			compatible = "gianfar";
198			reg = <0x24000 0x1000>;
199			ranges = <0x0 0x24000 0x1000>;
200			local-mac-address = [ 00 00 00 00 00 00 ];
201			interrupts = <32 0x8 33 0x8 34 0x8>;
202			interrupt-parent = <&ipic>;
203			tbi-handle = <&tbi0>;
204			phy-handle = <&phy1c>;
205			linux,network-index = <0>;
206
207			mdio@520 {
208				#address-cells = <1>;
209				#size-cells = <0>;
210				compatible = "fsl,gianfar-mdio";
211				reg = <0x520 0x20>;
212
213				/* Vitesse 8201 */
214				phy1c: ethernet-phy@1c {
215					interrupt-parent = <&ipic>;
216					interrupts = <18 0x8>;
217					reg = <0x1c>;
218					device_type = "ethernet-phy";
219				};
220
221				tbi0: tbi-phy@11 {
222					reg = <0x11>;
223					device_type = "tbi-phy";
224				};
225			};
226		};
227
228		enet1: ethernet@25000 {
229			#address-cells = <1>;
230			#size-cells = <1>;
231			cell-index = <1>;
232			device_type = "network";
233			model = "TSEC";
234			compatible = "gianfar";
235			reg = <0x25000 0x1000>;
236			ranges = <0x0 0x25000 0x1000>;
237			local-mac-address = [ 00 00 00 00 00 00 ];
238			interrupts = <35 0x8 36 0x8 37 0x8>;
239			interrupt-parent = <&ipic>;
240			/* Vitesse 7385 isn't on the MDIO bus */
241			fixed-link = <1 1 1000 0 0>;
242			linux,network-index = <1>;
243			tbi-handle = <&tbi1>;
244
245			mdio@520 {
246				#address-cells = <1>;
247				#size-cells = <0>;
248				compatible = "fsl,gianfar-tbi";
249				reg = <0x520 0x20>;
250
251				tbi1: tbi-phy@11 {
252					reg = <0x11>;
253					device_type = "tbi-phy";
254				};
255			};
256		};
257
258		serial0: serial@4500 {
259			cell-index = <0>;
260			device_type = "serial";
261			compatible = "ns16550";
262			reg = <0x4500 0x100>;
263			clock-frequency = <0>;		// from bootloader
264			interrupts = <9 0x8>;
265			interrupt-parent = <&ipic>;
266		};
267
268		serial1: serial@4600 {
269			cell-index = <1>;
270			device_type = "serial";
271			compatible = "ns16550";
272			reg = <0x4600 0x100>;
273			clock-frequency = <0>;		// from bootloader
274			interrupts = <10 0x8>;
275			interrupt-parent = <&ipic>;
276		};
277
278		crypto@30000 {
279			compatible = "fsl,sec2.0";
280			reg = <0x30000 0x10000>;
281			interrupts = <11 0x8>;
282			interrupt-parent = <&ipic>;
283			fsl,num-channels = <4>;
284			fsl,channel-fifo-len = <24>;
285			fsl,exec-units-mask = <0x7e>;
286			fsl,descriptor-types-mask = <0x01010ebf>;
287		};
288
289		ipic: pic@700 {
290			interrupt-controller;
291			#address-cells = <0>;
292			#interrupt-cells = <2>;
293			reg = <0x700 0x100>;
294			device_type = "ipic";
295		};
296	};
297
298	pci0: pci@e0008500 {
299		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
300		interrupt-map = <
301				/* IDSEL 0x10 - SATA */
302				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
303				>;
304		interrupt-parent = <&ipic>;
305		interrupts = <66 0x8>;
306		bus-range = <0x0 0x0>;
307		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
308			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
309			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
310		clock-frequency = <66666666>;
311		#interrupt-cells = <1>;
312		#size-cells = <2>;
313		#address-cells = <3>;
314		reg = <0xe0008500 0x100		/* internal registers */
315		       0xe0008300 0x8>;		/* config space access registers */
316		compatible = "fsl,mpc8349-pci";
317		device_type = "pci";
318	};
319
320	pci1: pci@e0008600 {
321		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
322		interrupt-map = <
323				/* IDSEL 0x0E - MiniPCI Slot */
324				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
325
326				/* IDSEL 0x0F - PCI Slot */
327				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
328				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
329				>;
330		interrupt-parent = <&ipic>;
331		interrupts = <67 0x8>;
332		bus-range = <0x0 0x0>;
333		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
334			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
335			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
336		clock-frequency = <66666666>;
337		#interrupt-cells = <1>;
338		#size-cells = <2>;
339		#address-cells = <3>;
340		reg = <0xe0008600 0x100		/* internal registers */
341		       0xe0008380 0x8>;		/* config space access registers */
342		compatible = "fsl,mpc8349-pci";
343		device_type = "pci";
344	};
345
346	localbus@e0005000 {
347		#address-cells = <2>;
348		#size-cells = <1>;
349		compatible = "fsl,mpc8349e-localbus",
350			     "fsl,pq2pro-localbus";
351		reg = <0xe0005000 0xd8>;
352		ranges = <0x3 0x0 0xf0000000 0x210>;
353
354		pata@3,0 {
355			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
356			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
357			reg-shift = <1>;
358			pio-mode = <6>;
359			interrupts = <23 0x8>;
360			interrupt-parent = <&ipic>;
361		};
362	};
363};
364