1/*
2 * MPC8349E-mITX Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	model = "MPC8349EMITX";
16	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	aliases {
21		ethernet0 = &enet0;
22		ethernet1 = &enet1;
23		serial0 = &serial0;
24		serial1 = &serial1;
25		pci0 = &pci0;
26		pci1 = &pci1;
27	};
28
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		PowerPC,8349@0 {
34			device_type = "cpu";
35			reg = <0x0>;
36			d-cache-line-size = <32>;
37			i-cache-line-size = <32>;
38			d-cache-size = <32768>;
39			i-cache-size = <32768>;
40			timebase-frequency = <0>;	// from bootloader
41			bus-frequency = <0>;		// from bootloader
42			clock-frequency = <0>;		// from bootloader
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x10000000>;
49	};
50
51	soc8349@e0000000 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		device_type = "soc";
55		ranges = <0x0 0xe0000000 0x00100000>;
56		reg = <0xe0000000 0x00000200>;
57		bus-frequency = <0>;                    // from bootloader
58
59		wdt@200 {
60			device_type = "watchdog";
61			compatible = "mpc83xx_wdt";
62			reg = <0x200 0x100>;
63		};
64
65		i2c@3000 {
66			#address-cells = <1>;
67			#size-cells = <0>;
68			cell-index = <0>;
69			compatible = "fsl-i2c";
70			reg = <0x3000 0x100>;
71			interrupts = <14 0x8>;
72			interrupt-parent = <&ipic>;
73			dfsrr;
74		};
75
76		i2c@3100 {
77			#address-cells = <1>;
78			#size-cells = <0>;
79			cell-index = <1>;
80			compatible = "fsl-i2c";
81			reg = <0x3100 0x100>;
82			interrupts = <15 0x8>;
83			interrupt-parent = <&ipic>;
84			dfsrr;
85		};
86
87		spi@7000 {
88			cell-index = <0>;
89			compatible = "fsl,spi";
90			reg = <0x7000 0x1000>;
91			interrupts = <16 0x8>;
92			interrupt-parent = <&ipic>;
93			mode = "cpu";
94		};
95
96		dma@82a8 {
97			#address-cells = <1>;
98			#size-cells = <1>;
99			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
100			reg = <0x82a8 4>;
101			ranges = <0 0x8100 0x1a8>;
102			interrupt-parent = <&ipic>;
103			interrupts = <71 8>;
104			cell-index = <0>;
105			dma-channel@0 {
106				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
107				reg = <0 0x80>;
108				interrupt-parent = <&ipic>;
109				interrupts = <71 8>;
110			};
111			dma-channel@80 {
112				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
113				reg = <0x80 0x80>;
114				interrupt-parent = <&ipic>;
115				interrupts = <71 8>;
116			};
117			dma-channel@100 {
118				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
119				reg = <0x100 0x80>;
120				interrupt-parent = <&ipic>;
121				interrupts = <71 8>;
122			};
123			dma-channel@180 {
124				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
125				reg = <0x180 0x28>;
126				interrupt-parent = <&ipic>;
127				interrupts = <71 8>;
128			};
129		};
130
131		usb@22000 {
132			compatible = "fsl-usb2-mph";
133			reg = <0x22000 0x1000>;
134			#address-cells = <1>;
135			#size-cells = <0>;
136			interrupt-parent = <&ipic>;
137			interrupts = <39 0x8>;
138			phy_type = "ulpi";
139			port1;
140		};
141
142		usb@23000 {
143			compatible = "fsl-usb2-dr";
144			reg = <0x23000 0x1000>;
145			#address-cells = <1>;
146			#size-cells = <0>;
147			interrupt-parent = <&ipic>;
148			interrupts = <38 0x8>;
149			dr_mode = "peripheral";
150			phy_type = "ulpi";
151		};
152
153		mdio@24520 {
154			#address-cells = <1>;
155			#size-cells = <0>;
156			compatible = "fsl,gianfar-mdio";
157			reg = <0x24520 0x20>;
158
159			/* Vitesse 8201 */
160			phy1c: ethernet-phy@1c {
161				interrupt-parent = <&ipic>;
162				interrupts = <18 0x8>;
163				reg = <0x1c>;
164				device_type = "ethernet-phy";
165			};
166		};
167
168		enet0: ethernet@24000 {
169			cell-index = <0>;
170			device_type = "network";
171			model = "TSEC";
172			compatible = "gianfar";
173			reg = <0x24000 0x1000>;
174			local-mac-address = [ 00 00 00 00 00 00 ];
175			interrupts = <32 0x8 33 0x8 34 0x8>;
176			interrupt-parent = <&ipic>;
177			phy-handle = <&phy1c>;
178			linux,network-index = <0>;
179		};
180
181		enet1: ethernet@25000 {
182			cell-index = <1>;
183			device_type = "network";
184			model = "TSEC";
185			compatible = "gianfar";
186			reg = <0x25000 0x1000>;
187			local-mac-address = [ 00 00 00 00 00 00 ];
188			interrupts = <35 0x8 36 0x8 37 0x8>;
189			interrupt-parent = <&ipic>;
190			/* Vitesse 7385 isn't on the MDIO bus */
191			fixed-link = <1 1 1000 0 0>;
192			linux,network-index = <1>;
193		};
194
195		serial0: serial@4500 {
196			cell-index = <0>;
197			device_type = "serial";
198			compatible = "ns16550";
199			reg = <0x4500 0x100>;
200			clock-frequency = <0>;		// from bootloader
201			interrupts = <9 0x8>;
202			interrupt-parent = <&ipic>;
203		};
204
205		serial1: serial@4600 {
206			cell-index = <1>;
207			device_type = "serial";
208			compatible = "ns16550";
209			reg = <0x4600 0x100>;
210			clock-frequency = <0>;		// from bootloader
211			interrupts = <10 0x8>;
212			interrupt-parent = <&ipic>;
213		};
214
215		crypto@30000 {
216			compatible = "fsl,sec2.0";
217			reg = <0x30000 0x10000>;
218			interrupts = <11 0x8>;
219			interrupt-parent = <&ipic>;
220			fsl,num-channels = <4>;
221			fsl,channel-fifo-len = <24>;
222			fsl,exec-units-mask = <0x7e>;
223			fsl,descriptor-types-mask = <0x01010ebf>;
224		};
225
226		ipic: pic@700 {
227			interrupt-controller;
228			#address-cells = <0>;
229			#interrupt-cells = <2>;
230			reg = <0x700 0x100>;
231			device_type = "ipic";
232		};
233	};
234
235	pci0: pci@e0008500 {
236		cell-index = <1>;
237		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
238		interrupt-map = <
239				/* IDSEL 0x10 - SATA */
240				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
241				>;
242		interrupt-parent = <&ipic>;
243		interrupts = <66 0x8>;
244		bus-range = <0x0 0x0>;
245		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
246			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
247			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
248		clock-frequency = <66666666>;
249		#interrupt-cells = <1>;
250		#size-cells = <2>;
251		#address-cells = <3>;
252		reg = <0xe0008500 0x100>;
253		compatible = "fsl,mpc8349-pci";
254		device_type = "pci";
255	};
256
257	pci1: pci@e0008600 {
258		cell-index = <2>;
259		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
260		interrupt-map = <
261				/* IDSEL 0x0E - MiniPCI Slot */
262				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
263
264				/* IDSEL 0x0F - PCI Slot */
265				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
266				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
267				>;
268		interrupt-parent = <&ipic>;
269		interrupts = <67 0x8>;
270		bus-range = <0x0 0x0>;
271		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
272			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
273			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
274		clock-frequency = <66666666>;
275		#interrupt-cells = <1>;
276		#size-cells = <2>;
277		#address-cells = <3>;
278		reg = <0xe0008600 0x100>;
279		compatible = "fsl,mpc8349-pci";
280		device_type = "pci";
281	};
282
283	localbus@e0005000 {
284		#address-cells = <2>;
285		#size-cells = <1>;
286		compatible = "fsl,mpc8349e-localbus",
287			     "fsl,pq2pro-localbus";
288		reg = <0xe0005000 0xd8>;
289		ranges = <0x3 0x0 0xf0000000 0x210>;
290
291		pata@3,0 {
292			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
293			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
294			reg-shift = <1>;
295			pio-mode = <6>;
296			interrupts = <23 0x8>;
297			interrupt-parent = <&ipic>;
298		};
299	};
300};
301