1/*
2 * MPC8349E-mITX Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	model = "MPC8349EMITX";
16	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	aliases {
21		ethernet0 = &enet0;
22		ethernet1 = &enet1;
23		serial0 = &serial0;
24		serial1 = &serial1;
25		pci0 = &pci0;
26		pci1 = &pci1;
27	};
28
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		PowerPC,8349@0 {
34			device_type = "cpu";
35			reg = <0x0>;
36			d-cache-line-size = <32>;
37			i-cache-line-size = <32>;
38			d-cache-size = <32768>;
39			i-cache-size = <32768>;
40			timebase-frequency = <0>;	// from bootloader
41			bus-frequency = <0>;		// from bootloader
42			clock-frequency = <0>;		// from bootloader
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x10000000>;
49	};
50
51	soc8349@e0000000 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		device_type = "soc";
55		compatible = "simple-bus";
56		ranges = <0x0 0xe0000000 0x00100000>;
57		reg = <0xe0000000 0x00000200>;
58		bus-frequency = <0>;                    // from bootloader
59
60		wdt@200 {
61			device_type = "watchdog";
62			compatible = "mpc83xx_wdt";
63			reg = <0x200 0x100>;
64		};
65
66		i2c@3000 {
67			#address-cells = <1>;
68			#size-cells = <0>;
69			cell-index = <0>;
70			compatible = "fsl-i2c";
71			reg = <0x3000 0x100>;
72			interrupts = <14 0x8>;
73			interrupt-parent = <&ipic>;
74			dfsrr;
75		};
76
77		i2c@3100 {
78			#address-cells = <1>;
79			#size-cells = <0>;
80			cell-index = <1>;
81			compatible = "fsl-i2c";
82			reg = <0x3100 0x100>;
83			interrupts = <15 0x8>;
84			interrupt-parent = <&ipic>;
85			dfsrr;
86
87			rtc@68 {
88				compatible = "dallas,ds1339";
89				reg = <0x68>;
90				interrupts = <18 0x8>;
91				interrupt-parent = <&ipic>;
92			};
93
94			mcu_pio: mcu@a {
95				#gpio-cells = <2>;
96				compatible = "fsl,mc9s08qg8-mpc8349emitx",
97					     "fsl,mcu-mpc8349emitx";
98				reg = <0x0a>;
99				gpio-controller;
100			};
101		};
102
103		spi@7000 {
104			cell-index = <0>;
105			compatible = "fsl,spi";
106			reg = <0x7000 0x1000>;
107			interrupts = <16 0x8>;
108			interrupt-parent = <&ipic>;
109			mode = "cpu";
110		};
111
112		dma@82a8 {
113			#address-cells = <1>;
114			#size-cells = <1>;
115			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
116			reg = <0x82a8 4>;
117			ranges = <0 0x8100 0x1a8>;
118			interrupt-parent = <&ipic>;
119			interrupts = <71 8>;
120			cell-index = <0>;
121			dma-channel@0 {
122				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
123				reg = <0 0x80>;
124				cell-index = <0>;
125				interrupt-parent = <&ipic>;
126				interrupts = <71 8>;
127			};
128			dma-channel@80 {
129				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
130				reg = <0x80 0x80>;
131				cell-index = <1>;
132				interrupt-parent = <&ipic>;
133				interrupts = <71 8>;
134			};
135			dma-channel@100 {
136				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
137				reg = <0x100 0x80>;
138				cell-index = <2>;
139				interrupt-parent = <&ipic>;
140				interrupts = <71 8>;
141			};
142			dma-channel@180 {
143				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
144				reg = <0x180 0x28>;
145				cell-index = <3>;
146				interrupt-parent = <&ipic>;
147				interrupts = <71 8>;
148			};
149		};
150
151		usb@22000 {
152			compatible = "fsl-usb2-mph";
153			reg = <0x22000 0x1000>;
154			#address-cells = <1>;
155			#size-cells = <0>;
156			interrupt-parent = <&ipic>;
157			interrupts = <39 0x8>;
158			phy_type = "ulpi";
159			port1;
160		};
161
162		usb@23000 {
163			compatible = "fsl-usb2-dr";
164			reg = <0x23000 0x1000>;
165			#address-cells = <1>;
166			#size-cells = <0>;
167			interrupt-parent = <&ipic>;
168			interrupts = <38 0x8>;
169			dr_mode = "peripheral";
170			phy_type = "ulpi";
171		};
172
173		enet0: ethernet@24000 {
174			#address-cells = <1>;
175			#size-cells = <1>;
176			cell-index = <0>;
177			device_type = "network";
178			model = "TSEC";
179			compatible = "gianfar";
180			reg = <0x24000 0x1000>;
181			ranges = <0x0 0x24000 0x1000>;
182			local-mac-address = [ 00 00 00 00 00 00 ];
183			interrupts = <32 0x8 33 0x8 34 0x8>;
184			interrupt-parent = <&ipic>;
185			tbi-handle = <&tbi0>;
186			phy-handle = <&phy1c>;
187			linux,network-index = <0>;
188
189			mdio@520 {
190				#address-cells = <1>;
191				#size-cells = <0>;
192				compatible = "fsl,gianfar-mdio";
193				reg = <0x520 0x20>;
194
195				/* Vitesse 8201 */
196				phy1c: ethernet-phy@1c {
197					interrupt-parent = <&ipic>;
198					interrupts = <18 0x8>;
199					reg = <0x1c>;
200					device_type = "ethernet-phy";
201				};
202
203				tbi0: tbi-phy@11 {
204					reg = <0x11>;
205					device_type = "tbi-phy";
206				};
207			};
208		};
209
210		enet1: ethernet@25000 {
211			#address-cells = <1>;
212			#size-cells = <1>;
213			cell-index = <1>;
214			device_type = "network";
215			model = "TSEC";
216			compatible = "gianfar";
217			reg = <0x25000 0x1000>;
218			ranges = <0x0 0x25000 0x1000>;
219			local-mac-address = [ 00 00 00 00 00 00 ];
220			interrupts = <35 0x8 36 0x8 37 0x8>;
221			interrupt-parent = <&ipic>;
222			/* Vitesse 7385 isn't on the MDIO bus */
223			fixed-link = <1 1 1000 0 0>;
224			linux,network-index = <1>;
225			tbi-handle = <&tbi1>;
226
227			mdio@520 {
228				#address-cells = <1>;
229				#size-cells = <0>;
230				compatible = "fsl,gianfar-tbi";
231				reg = <0x520 0x20>;
232
233				tbi1: tbi-phy@11 {
234					reg = <0x11>;
235					device_type = "tbi-phy";
236				};
237			};
238		};
239
240		serial0: serial@4500 {
241			cell-index = <0>;
242			device_type = "serial";
243			compatible = "ns16550";
244			reg = <0x4500 0x100>;
245			clock-frequency = <0>;		// from bootloader
246			interrupts = <9 0x8>;
247			interrupt-parent = <&ipic>;
248		};
249
250		serial1: serial@4600 {
251			cell-index = <1>;
252			device_type = "serial";
253			compatible = "ns16550";
254			reg = <0x4600 0x100>;
255			clock-frequency = <0>;		// from bootloader
256			interrupts = <10 0x8>;
257			interrupt-parent = <&ipic>;
258		};
259
260		crypto@30000 {
261			compatible = "fsl,sec2.0";
262			reg = <0x30000 0x10000>;
263			interrupts = <11 0x8>;
264			interrupt-parent = <&ipic>;
265			fsl,num-channels = <4>;
266			fsl,channel-fifo-len = <24>;
267			fsl,exec-units-mask = <0x7e>;
268			fsl,descriptor-types-mask = <0x01010ebf>;
269		};
270
271		ipic: pic@700 {
272			interrupt-controller;
273			#address-cells = <0>;
274			#interrupt-cells = <2>;
275			reg = <0x700 0x100>;
276			device_type = "ipic";
277		};
278	};
279
280	pci0: pci@e0008500 {
281		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
282		interrupt-map = <
283				/* IDSEL 0x10 - SATA */
284				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
285				>;
286		interrupt-parent = <&ipic>;
287		interrupts = <66 0x8>;
288		bus-range = <0x0 0x0>;
289		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
290			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
291			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
292		clock-frequency = <66666666>;
293		#interrupt-cells = <1>;
294		#size-cells = <2>;
295		#address-cells = <3>;
296		reg = <0xe0008500 0x100		/* internal registers */
297		       0xe0008300 0x8>;		/* config space access registers */
298		compatible = "fsl,mpc8349-pci";
299		device_type = "pci";
300	};
301
302	pci1: pci@e0008600 {
303		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
304		interrupt-map = <
305				/* IDSEL 0x0E - MiniPCI Slot */
306				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
307
308				/* IDSEL 0x0F - PCI Slot */
309				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
310				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
311				>;
312		interrupt-parent = <&ipic>;
313		interrupts = <67 0x8>;
314		bus-range = <0x0 0x0>;
315		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
316			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
317			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
318		clock-frequency = <66666666>;
319		#interrupt-cells = <1>;
320		#size-cells = <2>;
321		#address-cells = <3>;
322		reg = <0xe0008600 0x100		/* internal registers */
323		       0xe0008380 0x8>;		/* config space access registers */
324		compatible = "fsl,mpc8349-pci";
325		device_type = "pci";
326	};
327
328	localbus@e0005000 {
329		#address-cells = <2>;
330		#size-cells = <1>;
331		compatible = "fsl,mpc8349e-localbus",
332			     "fsl,pq2pro-localbus";
333		reg = <0xe0005000 0xd8>;
334		ranges = <0x3 0x0 0xf0000000 0x210>;
335
336		pata@3,0 {
337			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
338			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
339			reg-shift = <1>;
340			pio-mode = <6>;
341			interrupts = <23 0x8>;
342			interrupt-parent = <&ipic>;
343		};
344	};
345};
346