1/* 2 * MPC832x RDB Device Tree Source 3 * 4 * Copyright 2007 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/ { 13 model = "MPC8323ERDB"; 14 compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB"; 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 cpus { 19 #address-cells = <1>; 20 #size-cells = <0>; 21 22 PowerPC,8323@0 { 23 device_type = "cpu"; 24 reg = <0>; 25 d-cache-line-size = <20>; // 32 bytes 26 i-cache-line-size = <20>; // 32 bytes 27 d-cache-size = <4000>; // L1, 16K 28 i-cache-size = <4000>; // L1, 16K 29 timebase-frequency = <0>; 30 bus-frequency = <0>; 31 clock-frequency = <0>; 32 }; 33 }; 34 35 memory { 36 device_type = "memory"; 37 reg = <00000000 04000000>; 38 }; 39 40 soc8323@e0000000 { 41 #address-cells = <1>; 42 #size-cells = <1>; 43 device_type = "soc"; 44 ranges = <0 e0000000 00100000>; 45 reg = <e0000000 00000200>; 46 bus-frequency = <0>; 47 48 wdt@200 { 49 device_type = "watchdog"; 50 compatible = "mpc83xx_wdt"; 51 reg = <200 100>; 52 }; 53 54 i2c@3000 { 55 device_type = "i2c"; 56 compatible = "fsl-i2c"; 57 reg = <3000 100>; 58 interrupts = <e 8>; 59 interrupt-parent = <&pic>; 60 dfsrr; 61 }; 62 63 serial@4500 { 64 device_type = "serial"; 65 compatible = "ns16550"; 66 reg = <4500 100>; 67 clock-frequency = <0>; 68 interrupts = <9 8>; 69 interrupt-parent = <&pic>; 70 }; 71 72 serial@4600 { 73 device_type = "serial"; 74 compatible = "ns16550"; 75 reg = <4600 100>; 76 clock-frequency = <0>; 77 interrupts = <a 8>; 78 interrupt-parent = <&pic>; 79 }; 80 81 crypto@30000 { 82 device_type = "crypto"; 83 model = "SEC2"; 84 compatible = "talitos"; 85 reg = <30000 7000>; 86 interrupts = <b 8>; 87 interrupt-parent = <&pic>; 88 /* Rev. 2.2 */ 89 num-channels = <1>; 90 channel-fifo-len = <18>; 91 exec-units-mask = <0000004c>; 92 descriptor-types-mask = <0122003f>; 93 }; 94 95 pci@8500 { 96 interrupt-map-mask = <f800 0 0 7>; 97 interrupt-map = < 98 /* IDSEL 0x10 AD16 (USB) */ 99 8000 0 0 1 &pic 11 8 100 101 /* IDSEL 0x11 AD17 (Mini1)*/ 102 8800 0 0 1 &pic 12 8 103 8800 0 0 2 &pic 13 8 104 8800 0 0 3 &pic 14 8 105 8800 0 0 4 &pic 30 8 106 107 /* IDSEL 0x12 AD18 (PCI/Mini2) */ 108 9000 0 0 1 &pic 13 8 109 9000 0 0 2 &pic 14 8 110 9000 0 0 3 &pic 30 8 111 9000 0 0 4 &pic 11 8>; 112 113 interrupt-parent = <&pic>; 114 interrupts = <42 8>; 115 bus-range = <0 0>; 116 ranges = <42000000 0 80000000 80000000 0 10000000 117 02000000 0 90000000 90000000 0 10000000 118 01000000 0 d0000000 d0000000 0 04000000>; 119 clock-frequency = <0>; 120 #interrupt-cells = <1>; 121 #size-cells = <2>; 122 #address-cells = <3>; 123 reg = <8500 100>; 124 compatible = "fsl,mpc8349-pci"; 125 device_type = "pci"; 126 }; 127 128 pic:pic@700 { 129 interrupt-controller; 130 #address-cells = <0>; 131 #interrupt-cells = <2>; 132 reg = <700 100>; 133 device_type = "ipic"; 134 }; 135 136 par_io@1400 { 137 reg = <1400 100>; 138 device_type = "par_io"; 139 num-ports = <7>; 140 141 ucc2pio:ucc_pin@02 { 142 pio-map = < 143 /* port pin dir open_drain assignment has_irq */ 144 3 4 3 0 2 0 /* MDIO */ 145 3 5 1 0 2 0 /* MDC */ 146 3 15 2 0 1 0 /* RX_CLK (CLK16) */ 147 3 17 2 0 1 0 /* TX_CLK (CLK3) */ 148 0 12 1 0 1 0 /* TxD0 */ 149 0 13 1 0 1 0 /* TxD1 */ 150 0 14 1 0 1 0 /* TxD2 */ 151 0 15 1 0 1 0 /* TxD3 */ 152 0 16 2 0 1 0 /* RxD0 */ 153 0 17 2 0 1 0 /* RxD1 */ 154 0 18 2 0 1 0 /* RxD2 */ 155 0 19 2 0 1 0 /* RxD3 */ 156 0 1a 2 0 1 0 /* RX_ER */ 157 0 1b 1 0 1 0 /* TX_ER */ 158 0 1c 2 0 1 0 /* RX_DV */ 159 0 1d 2 0 1 0 /* COL */ 160 0 1e 1 0 1 0 /* TX_EN */ 161 0 1f 2 0 1 0>; /* CRS */ 162 }; 163 ucc3pio:ucc_pin@03 { 164 pio-map = < 165 /* port pin dir open_drain assignment has_irq */ 166 0 d 2 0 1 0 /* RX_CLK (CLK9) */ 167 3 18 2 0 1 0 /* TX_CLK (CLK10) */ 168 1 0 1 0 1 0 /* TxD0 */ 169 1 1 1 0 1 0 /* TxD1 */ 170 1 2 1 0 1 0 /* TxD2 */ 171 1 3 1 0 1 0 /* TxD3 */ 172 1 4 2 0 1 0 /* RxD0 */ 173 1 5 2 0 1 0 /* RxD1 */ 174 1 6 2 0 1 0 /* RxD2 */ 175 1 7 2 0 1 0 /* RxD3 */ 176 1 8 2 0 1 0 /* RX_ER */ 177 1 9 1 0 1 0 /* TX_ER */ 178 1 a 2 0 1 0 /* RX_DV */ 179 1 b 2 0 1 0 /* COL */ 180 1 c 1 0 1 0 /* TX_EN */ 181 1 d 2 0 1 0>; /* CRS */ 182 }; 183 }; 184 }; 185 186 qe@e0100000 { 187 #address-cells = <1>; 188 #size-cells = <1>; 189 device_type = "qe"; 190 model = "QE"; 191 ranges = <0 e0100000 00100000>; 192 reg = <e0100000 480>; 193 brg-frequency = <0>; 194 bus-frequency = <BCD3D80>; 195 196 muram@10000 { 197 device_type = "muram"; 198 ranges = <0 00010000 00004000>; 199 200 data-only@0 { 201 reg = <0 4000>; 202 }; 203 }; 204 205 spi@4c0 { 206 device_type = "spi"; 207 compatible = "fsl_spi"; 208 reg = <4c0 40>; 209 interrupts = <2>; 210 interrupt-parent = <&qeic>; 211 mode = "cpu"; 212 }; 213 214 spi@500 { 215 device_type = "spi"; 216 compatible = "fsl_spi"; 217 reg = <500 40>; 218 interrupts = <1>; 219 interrupt-parent = <&qeic>; 220 mode = "cpu"; 221 }; 222 223 ucc@3000 { 224 device_type = "network"; 225 compatible = "ucc_geth"; 226 model = "UCC"; 227 device-id = <2>; 228 reg = <3000 200>; 229 interrupts = <21>; 230 interrupt-parent = <&qeic>; 231 /* 232 * mac-address is deprecated and will be removed 233 * in 2.6.25. Only recent versions of 234 * U-Boot support local-mac-address, however. 235 */ 236 mac-address = [ 00 00 00 00 00 00 ]; 237 local-mac-address = [ 00 00 00 00 00 00 ]; 238 rx-clock = <20>; 239 tx-clock = <13>; 240 phy-handle = <&phy00>; 241 pio-handle = <&ucc2pio>; 242 }; 243 244 ucc@2200 { 245 device_type = "network"; 246 compatible = "ucc_geth"; 247 model = "UCC"; 248 device-id = <3>; 249 reg = <2200 200>; 250 interrupts = <22>; 251 interrupt-parent = <&qeic>; 252 /* 253 * mac-address is deprecated and will be removed 254 * in 2.6.25. Only recent versions of 255 * U-Boot support local-mac-address, however. 256 */ 257 mac-address = [ 00 00 00 00 00 00 ]; 258 local-mac-address = [ 00 00 00 00 00 00 ]; 259 rx-clock = <19>; 260 tx-clock = <1a>; 261 phy-handle = <&phy04>; 262 pio-handle = <&ucc3pio>; 263 }; 264 265 mdio@3120 { 266 #address-cells = <1>; 267 #size-cells = <0>; 268 reg = <3120 18>; 269 device_type = "mdio"; 270 compatible = "ucc_geth_phy"; 271 272 phy00:ethernet-phy@00 { 273 interrupt-parent = <&pic>; 274 interrupts = <0>; 275 reg = <0>; 276 device_type = "ethernet-phy"; 277 }; 278 phy04:ethernet-phy@04 { 279 interrupt-parent = <&pic>; 280 interrupts = <0>; 281 reg = <4>; 282 device_type = "ethernet-phy"; 283 }; 284 }; 285 286 qeic:qeic@80 { 287 interrupt-controller; 288 device_type = "qeic"; 289 #address-cells = <0>; 290 #interrupt-cells = <1>; 291 reg = <80 80>; 292 big-endian; 293 interrupts = <20 8 21 8>; //high:32 low:33 294 interrupt-parent = <&pic>; 295 }; 296 }; 297}; 298