123308c54SMichael Barkowski/* 223308c54SMichael Barkowski * MPC832x RDB Device Tree Source 323308c54SMichael Barkowski * 423308c54SMichael Barkowski * Copyright 2007 Freescale Semiconductor Inc. 523308c54SMichael Barkowski * 623308c54SMichael Barkowski * This program is free software; you can redistribute it and/or modify it 723308c54SMichael Barkowski * under the terms of the GNU General Public License as published by the 823308c54SMichael Barkowski * Free Software Foundation; either version 2 of the License, or (at your 923308c54SMichael Barkowski * option) any later version. 1023308c54SMichael Barkowski */ 1123308c54SMichael Barkowski 12cda13dd1SPaul Gortmaker/dts-v1/; 13cda13dd1SPaul Gortmaker 1423308c54SMichael Barkowski/ { 1523308c54SMichael Barkowski model = "MPC8323ERDB"; 1623308c54SMichael Barkowski compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB"; 1723308c54SMichael Barkowski #address-cells = <1>; 1823308c54SMichael Barkowski #size-cells = <1>; 1923308c54SMichael Barkowski 20ea082fa9SKumar Gala aliases { 21e871809cSMichael Barkowski ethernet0 = &enet1; 22e871809cSMichael Barkowski ethernet1 = &enet0; 23ea082fa9SKumar Gala serial0 = &serial0; 24ea082fa9SKumar Gala serial1 = &serial1; 25ea082fa9SKumar Gala pci0 = &pci0; 26ea082fa9SKumar Gala }; 27ea082fa9SKumar Gala 2823308c54SMichael Barkowski cpus { 2923308c54SMichael Barkowski #address-cells = <1>; 3023308c54SMichael Barkowski #size-cells = <0>; 3123308c54SMichael Barkowski 3223308c54SMichael Barkowski PowerPC,8323@0 { 3323308c54SMichael Barkowski device_type = "cpu"; 34cda13dd1SPaul Gortmaker reg = <0x0>; 35cda13dd1SPaul Gortmaker d-cache-line-size = <0x20>; // 32 bytes 36cda13dd1SPaul Gortmaker i-cache-line-size = <0x20>; // 32 bytes 37cda13dd1SPaul Gortmaker d-cache-size = <16384>; // L1, 16K 38cda13dd1SPaul Gortmaker i-cache-size = <16384>; // L1, 16K 3923308c54SMichael Barkowski timebase-frequency = <0>; 4023308c54SMichael Barkowski bus-frequency = <0>; 4123308c54SMichael Barkowski clock-frequency = <0>; 4223308c54SMichael Barkowski }; 4323308c54SMichael Barkowski }; 4423308c54SMichael Barkowski 4523308c54SMichael Barkowski memory { 4623308c54SMichael Barkowski device_type = "memory"; 47cda13dd1SPaul Gortmaker reg = <0x00000000 0x04000000>; 4823308c54SMichael Barkowski }; 4923308c54SMichael Barkowski 5023308c54SMichael Barkowski soc8323@e0000000 { 5123308c54SMichael Barkowski #address-cells = <1>; 5223308c54SMichael Barkowski #size-cells = <1>; 5323308c54SMichael Barkowski device_type = "soc"; 54cf0d19fbSKim Phillips compatible = "simple-bus"; 55cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 56cda13dd1SPaul Gortmaker reg = <0xe0000000 0x00000200>; 5723308c54SMichael Barkowski bus-frequency = <0>; 5823308c54SMichael Barkowski 5923308c54SMichael Barkowski wdt@200 { 6023308c54SMichael Barkowski device_type = "watchdog"; 6123308c54SMichael Barkowski compatible = "mpc83xx_wdt"; 62cda13dd1SPaul Gortmaker reg = <0x200 0x100>; 6323308c54SMichael Barkowski }; 6423308c54SMichael Barkowski 651f8a25d4SAnton Vorontsov pmc: power@b00 { 661f8a25d4SAnton Vorontsov compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc"; 671f8a25d4SAnton Vorontsov reg = <0xb00 0x100 0xa00 0x100>; 681f8a25d4SAnton Vorontsov interrupts = <80 0x8>; 691f8a25d4SAnton Vorontsov interrupt-parent = <&ipic>; 701f8a25d4SAnton Vorontsov }; 711f8a25d4SAnton Vorontsov 7223308c54SMichael Barkowski i2c@3000 { 73ec9686c4SKumar Gala #address-cells = <1>; 74ec9686c4SKumar Gala #size-cells = <0>; 75ec9686c4SKumar Gala cell-index = <0>; 7623308c54SMichael Barkowski compatible = "fsl-i2c"; 77cda13dd1SPaul Gortmaker reg = <0x3000 0x100>; 78cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 79dee80553SKumar Gala interrupt-parent = <&ipic>; 8023308c54SMichael Barkowski dfsrr; 8123308c54SMichael Barkowski }; 8223308c54SMichael Barkowski 83ea082fa9SKumar Gala serial0: serial@4500 { 84ea082fa9SKumar Gala cell-index = <0>; 8523308c54SMichael Barkowski device_type = "serial"; 86f706bed1SKumar Gala compatible = "fsl,ns16550", "ns16550"; 87cda13dd1SPaul Gortmaker reg = <0x4500 0x100>; 8823308c54SMichael Barkowski clock-frequency = <0>; 89cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 90dee80553SKumar Gala interrupt-parent = <&ipic>; 9123308c54SMichael Barkowski }; 9223308c54SMichael Barkowski 93ea082fa9SKumar Gala serial1: serial@4600 { 94ea082fa9SKumar Gala cell-index = <1>; 9523308c54SMichael Barkowski device_type = "serial"; 96f706bed1SKumar Gala compatible = "fsl,ns16550", "ns16550"; 97cda13dd1SPaul Gortmaker reg = <0x4600 0x100>; 9823308c54SMichael Barkowski clock-frequency = <0>; 99cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 100dee80553SKumar Gala interrupt-parent = <&ipic>; 101dee80553SKumar Gala }; 102dee80553SKumar Gala 103dee80553SKumar Gala dma@82a8 { 104dee80553SKumar Gala #address-cells = <1>; 105dee80553SKumar Gala #size-cells = <1>; 106dee80553SKumar Gala compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; 107dee80553SKumar Gala reg = <0x82a8 4>; 108dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 109dee80553SKumar Gala interrupt-parent = <&ipic>; 110dee80553SKumar Gala interrupts = <71 8>; 111dee80553SKumar Gala cell-index = <0>; 112dee80553SKumar Gala dma-channel@0 { 113dee80553SKumar Gala compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 114dee80553SKumar Gala reg = <0 0x80>; 115aeb42762SKumar Gala cell-index = <0>; 116dee80553SKumar Gala interrupt-parent = <&ipic>; 117dee80553SKumar Gala interrupts = <71 8>; 118dee80553SKumar Gala }; 119dee80553SKumar Gala dma-channel@80 { 120dee80553SKumar Gala compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 121dee80553SKumar Gala reg = <0x80 0x80>; 122aeb42762SKumar Gala cell-index = <1>; 123dee80553SKumar Gala interrupt-parent = <&ipic>; 124dee80553SKumar Gala interrupts = <71 8>; 125dee80553SKumar Gala }; 126dee80553SKumar Gala dma-channel@100 { 127dee80553SKumar Gala compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 128dee80553SKumar Gala reg = <0x100 0x80>; 129aeb42762SKumar Gala cell-index = <2>; 130dee80553SKumar Gala interrupt-parent = <&ipic>; 131dee80553SKumar Gala interrupts = <71 8>; 132dee80553SKumar Gala }; 133dee80553SKumar Gala dma-channel@180 { 134dee80553SKumar Gala compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 135dee80553SKumar Gala reg = <0x180 0x28>; 136aeb42762SKumar Gala cell-index = <3>; 137dee80553SKumar Gala interrupt-parent = <&ipic>; 138dee80553SKumar Gala interrupts = <71 8>; 139dee80553SKumar Gala }; 14023308c54SMichael Barkowski }; 14123308c54SMichael Barkowski 14223308c54SMichael Barkowski crypto@30000 { 1433fd44736SKim Phillips compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; 1443fd44736SKim Phillips reg = <0x30000 0x10000>; 145cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 146dee80553SKumar Gala interrupt-parent = <&ipic>; 1473fd44736SKim Phillips fsl,num-channels = <1>; 1483fd44736SKim Phillips fsl,channel-fifo-len = <24>; 1493fd44736SKim Phillips fsl,exec-units-mask = <0x4c>; 1503fd44736SKim Phillips fsl,descriptor-types-mask = <0x0122003f>; 1511f8a25d4SAnton Vorontsov sleep = <&pmc 0x03000000>; 15223308c54SMichael Barkowski }; 15323308c54SMichael Barkowski 154dee80553SKumar Gala ipic:pic@700 { 15523308c54SMichael Barkowski interrupt-controller; 15623308c54SMichael Barkowski #address-cells = <0>; 15723308c54SMichael Barkowski #interrupt-cells = <2>; 158cda13dd1SPaul Gortmaker reg = <0x700 0x100>; 15923308c54SMichael Barkowski device_type = "ipic"; 16023308c54SMichael Barkowski }; 16123308c54SMichael Barkowski 16223308c54SMichael Barkowski par_io@1400 { 16375458285SAnton Vorontsov #address-cells = <1>; 16475458285SAnton Vorontsov #size-cells = <1>; 165cda13dd1SPaul Gortmaker reg = <0x1400 0x100>; 16675458285SAnton Vorontsov ranges = <3 0x1448 0x18>; 16775458285SAnton Vorontsov compatible = "fsl,mpc8323-qe-pario"; 16823308c54SMichael Barkowski device_type = "par_io"; 16923308c54SMichael Barkowski num-ports = <7>; 17023308c54SMichael Barkowski 17175458285SAnton Vorontsov qe_pio_d: gpio-controller@1448 { 17275458285SAnton Vorontsov #gpio-cells = <2>; 17375458285SAnton Vorontsov compatible = "fsl,mpc8323-qe-pario-bank"; 17475458285SAnton Vorontsov reg = <3 0x18>; 17575458285SAnton Vorontsov gpio-controller; 17675458285SAnton Vorontsov }; 17775458285SAnton Vorontsov 178600ecc19SMathieu Malaterre ucc2pio:ucc_pin@2 { 17923308c54SMichael Barkowski pio-map = < 18023308c54SMichael Barkowski /* port pin dir open_drain assignment has_irq */ 18123308c54SMichael Barkowski 3 4 3 0 2 0 /* MDIO */ 18223308c54SMichael Barkowski 3 5 1 0 2 0 /* MDC */ 183cda13dd1SPaul Gortmaker 3 21 2 0 1 0 /* RX_CLK (CLK16) */ 184cda13dd1SPaul Gortmaker 3 23 2 0 1 0 /* TX_CLK (CLK3) */ 185cda13dd1SPaul Gortmaker 0 18 1 0 1 0 /* TxD0 */ 186cda13dd1SPaul Gortmaker 0 19 1 0 1 0 /* TxD1 */ 187cda13dd1SPaul Gortmaker 0 20 1 0 1 0 /* TxD2 */ 188cda13dd1SPaul Gortmaker 0 21 1 0 1 0 /* TxD3 */ 189cda13dd1SPaul Gortmaker 0 22 2 0 1 0 /* RxD0 */ 190cda13dd1SPaul Gortmaker 0 23 2 0 1 0 /* RxD1 */ 191cda13dd1SPaul Gortmaker 0 24 2 0 1 0 /* RxD2 */ 192cda13dd1SPaul Gortmaker 0 25 2 0 1 0 /* RxD3 */ 193cda13dd1SPaul Gortmaker 0 26 2 0 1 0 /* RX_ER */ 194cda13dd1SPaul Gortmaker 0 27 1 0 1 0 /* TX_ER */ 195cda13dd1SPaul Gortmaker 0 28 2 0 1 0 /* RX_DV */ 196cda13dd1SPaul Gortmaker 0 29 2 0 1 0 /* COL */ 197cda13dd1SPaul Gortmaker 0 30 1 0 1 0 /* TX_EN */ 198cda13dd1SPaul Gortmaker 0 31 2 0 1 0>; /* CRS */ 19923308c54SMichael Barkowski }; 200600ecc19SMathieu Malaterre ucc3pio:ucc_pin@3 { 20123308c54SMichael Barkowski pio-map = < 20223308c54SMichael Barkowski /* port pin dir open_drain assignment has_irq */ 203cda13dd1SPaul Gortmaker 0 13 2 0 1 0 /* RX_CLK (CLK9) */ 204cda13dd1SPaul Gortmaker 3 24 2 0 1 0 /* TX_CLK (CLK10) */ 20523308c54SMichael Barkowski 1 0 1 0 1 0 /* TxD0 */ 20623308c54SMichael Barkowski 1 1 1 0 1 0 /* TxD1 */ 20723308c54SMichael Barkowski 1 2 1 0 1 0 /* TxD2 */ 20823308c54SMichael Barkowski 1 3 1 0 1 0 /* TxD3 */ 20923308c54SMichael Barkowski 1 4 2 0 1 0 /* RxD0 */ 21023308c54SMichael Barkowski 1 5 2 0 1 0 /* RxD1 */ 21123308c54SMichael Barkowski 1 6 2 0 1 0 /* RxD2 */ 21223308c54SMichael Barkowski 1 7 2 0 1 0 /* RxD3 */ 21323308c54SMichael Barkowski 1 8 2 0 1 0 /* RX_ER */ 21423308c54SMichael Barkowski 1 9 1 0 1 0 /* TX_ER */ 215cda13dd1SPaul Gortmaker 1 10 2 0 1 0 /* RX_DV */ 216cda13dd1SPaul Gortmaker 1 11 2 0 1 0 /* COL */ 217cda13dd1SPaul Gortmaker 1 12 1 0 1 0 /* TX_EN */ 218cda13dd1SPaul Gortmaker 1 13 2 0 1 0>; /* CRS */ 21923308c54SMichael Barkowski }; 22023308c54SMichael Barkowski }; 22123308c54SMichael Barkowski }; 22223308c54SMichael Barkowski 22323308c54SMichael Barkowski qe@e0100000 { 22423308c54SMichael Barkowski #address-cells = <1>; 22523308c54SMichael Barkowski #size-cells = <1>; 22623308c54SMichael Barkowski device_type = "qe"; 227a2dd70a1SAnton Vorontsov compatible = "fsl,qe"; 228cda13dd1SPaul Gortmaker ranges = <0x0 0xe0100000 0x00100000>; 229cda13dd1SPaul Gortmaker reg = <0xe0100000 0x480>; 23023308c54SMichael Barkowski brg-frequency = <0>; 231cda13dd1SPaul Gortmaker bus-frequency = <198000000>; 23201b14a90SHaiying Wang fsl,qe-num-riscs = <1>; 23301b14a90SHaiying Wang fsl,qe-num-snums = <28>; 23423308c54SMichael Barkowski 23523308c54SMichael Barkowski muram@10000 { 236390167efSPaul Gortmaker #address-cells = <1>; 237390167efSPaul Gortmaker #size-cells = <1>; 238a2dd70a1SAnton Vorontsov compatible = "fsl,qe-muram", "fsl,cpm-muram"; 239cda13dd1SPaul Gortmaker ranges = <0x0 0x00010000 0x00004000>; 24023308c54SMichael Barkowski 24123308c54SMichael Barkowski data-only@0 { 242a2dd70a1SAnton Vorontsov compatible = "fsl,qe-muram-data", 243a2dd70a1SAnton Vorontsov "fsl,cpm-muram-data"; 244cda13dd1SPaul Gortmaker reg = <0x0 0x4000>; 24523308c54SMichael Barkowski }; 24623308c54SMichael Barkowski }; 24723308c54SMichael Barkowski 24823308c54SMichael Barkowski spi@4c0 { 24975458285SAnton Vorontsov #address-cells = <1>; 25075458285SAnton Vorontsov #size-cells = <0>; 251f3a2b29dSAnton Vorontsov cell-index = <0>; 252f3a2b29dSAnton Vorontsov compatible = "fsl,spi"; 253cda13dd1SPaul Gortmaker reg = <0x4c0 0x40>; 25423308c54SMichael Barkowski interrupts = <2>; 25523308c54SMichael Barkowski interrupt-parent = <&qeic>; 25675458285SAnton Vorontsov gpios = <&qe_pio_d 13 0>; 2578237bf08SAnton Vorontsov mode = "cpu-qe"; 25875458285SAnton Vorontsov 25975458285SAnton Vorontsov mmc-slot@0 { 26075458285SAnton Vorontsov compatible = "fsl,mpc8323rdb-mmc-slot", 26175458285SAnton Vorontsov "mmc-spi-slot"; 26275458285SAnton Vorontsov reg = <0>; 26375458285SAnton Vorontsov gpios = <&qe_pio_d 14 1 26475458285SAnton Vorontsov &qe_pio_d 15 0>; 26575458285SAnton Vorontsov voltage-ranges = <3300 3300>; 26675458285SAnton Vorontsov spi-max-frequency = <50000000>; 26775458285SAnton Vorontsov }; 26823308c54SMichael Barkowski }; 26923308c54SMichael Barkowski 27023308c54SMichael Barkowski spi@500 { 271f3a2b29dSAnton Vorontsov cell-index = <1>; 272f3a2b29dSAnton Vorontsov compatible = "fsl,spi"; 273cda13dd1SPaul Gortmaker reg = <0x500 0x40>; 27423308c54SMichael Barkowski interrupts = <1>; 27523308c54SMichael Barkowski interrupt-parent = <&qeic>; 27623308c54SMichael Barkowski mode = "cpu"; 27723308c54SMichael Barkowski }; 27823308c54SMichael Barkowski 279e77b28ebSKumar Gala enet0: ucc@3000 { 28023308c54SMichael Barkowski device_type = "network"; 28123308c54SMichael Barkowski compatible = "ucc_geth"; 282e77b28ebSKumar Gala cell-index = <2>; 283cda13dd1SPaul Gortmaker reg = <0x3000 0x200>; 284cda13dd1SPaul Gortmaker interrupts = <33>; 28523308c54SMichael Barkowski interrupt-parent = <&qeic>; 286eae98266STimur Tabi local-mac-address = [ 00 00 00 00 00 00 ]; 2879fb1e350STimur Tabi rx-clock-name = "clk16"; 2889fb1e350STimur Tabi tx-clock-name = "clk3"; 28923308c54SMichael Barkowski phy-handle = <&phy00>; 29023308c54SMichael Barkowski pio-handle = <&ucc2pio>; 29123308c54SMichael Barkowski }; 29223308c54SMichael Barkowski 293e77b28ebSKumar Gala enet1: ucc@2200 { 29423308c54SMichael Barkowski device_type = "network"; 29523308c54SMichael Barkowski compatible = "ucc_geth"; 296e77b28ebSKumar Gala cell-index = <3>; 297cda13dd1SPaul Gortmaker reg = <0x2200 0x200>; 298cda13dd1SPaul Gortmaker interrupts = <34>; 29923308c54SMichael Barkowski interrupt-parent = <&qeic>; 300eae98266STimur Tabi local-mac-address = [ 00 00 00 00 00 00 ]; 3019fb1e350STimur Tabi rx-clock-name = "clk9"; 3029fb1e350STimur Tabi tx-clock-name = "clk10"; 30323308c54SMichael Barkowski phy-handle = <&phy04>; 30423308c54SMichael Barkowski pio-handle = <&ucc3pio>; 30523308c54SMichael Barkowski }; 30623308c54SMichael Barkowski 30723308c54SMichael Barkowski mdio@3120 { 30823308c54SMichael Barkowski #address-cells = <1>; 30923308c54SMichael Barkowski #size-cells = <0>; 310cda13dd1SPaul Gortmaker reg = <0x3120 0x18>; 311d0a2f82dSAnton Vorontsov compatible = "fsl,ucc-mdio"; 31223308c54SMichael Barkowski 313600ecc19SMathieu Malaterre phy00:ethernet-phy@0 { 314dee80553SKumar Gala interrupt-parent = <&ipic>; 31523308c54SMichael Barkowski interrupts = <0>; 316cda13dd1SPaul Gortmaker reg = <0x0>; 31723308c54SMichael Barkowski }; 318600ecc19SMathieu Malaterre phy04:ethernet-phy@4 { 319dee80553SKumar Gala interrupt-parent = <&ipic>; 32023308c54SMichael Barkowski interrupts = <0>; 321cda13dd1SPaul Gortmaker reg = <0x4>; 32223308c54SMichael Barkowski }; 32323308c54SMichael Barkowski }; 32423308c54SMichael Barkowski 325a2dd70a1SAnton Vorontsov qeic:interrupt-controller@80 { 32623308c54SMichael Barkowski interrupt-controller; 327a2dd70a1SAnton Vorontsov compatible = "fsl,qe-ic"; 32823308c54SMichael Barkowski #address-cells = <0>; 32923308c54SMichael Barkowski #interrupt-cells = <1>; 330cda13dd1SPaul Gortmaker reg = <0x80 0x80>; 33123308c54SMichael Barkowski big-endian; 332cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8>; //high:32 low:33 333dee80553SKumar Gala interrupt-parent = <&ipic>; 33423308c54SMichael Barkowski }; 33523308c54SMichael Barkowski }; 3361b3c5cdaSKumar Gala 337ea082fa9SKumar Gala pci0: pci@e0008500 { 338cda13dd1SPaul Gortmaker interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 3391b3c5cdaSKumar Gala interrupt-map = < 3401b3c5cdaSKumar Gala /* IDSEL 0x10 AD16 (USB) */ 341dee80553SKumar Gala 0x8000 0x0 0x0 0x1 &ipic 17 0x8 3421b3c5cdaSKumar Gala 3431b3c5cdaSKumar Gala /* IDSEL 0x11 AD17 (Mini1)*/ 344dee80553SKumar Gala 0x8800 0x0 0x0 0x1 &ipic 18 0x8 345dee80553SKumar Gala 0x8800 0x0 0x0 0x2 &ipic 19 0x8 346dee80553SKumar Gala 0x8800 0x0 0x0 0x3 &ipic 20 0x8 347dee80553SKumar Gala 0x8800 0x0 0x0 0x4 &ipic 48 0x8 3481b3c5cdaSKumar Gala 3491b3c5cdaSKumar Gala /* IDSEL 0x12 AD18 (PCI/Mini2) */ 350dee80553SKumar Gala 0x9000 0x0 0x0 0x1 &ipic 19 0x8 351dee80553SKumar Gala 0x9000 0x0 0x0 0x2 &ipic 20 0x8 352dee80553SKumar Gala 0x9000 0x0 0x0 0x3 &ipic 48 0x8 353dee80553SKumar Gala 0x9000 0x0 0x0 0x4 &ipic 17 0x8>; 3541b3c5cdaSKumar Gala 355dee80553SKumar Gala interrupt-parent = <&ipic>; 356cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 357cda13dd1SPaul Gortmaker bus-range = <0x0 0x0>; 358cda13dd1SPaul Gortmaker ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 359cda13dd1SPaul Gortmaker 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 360cda13dd1SPaul Gortmaker 0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>; 3611b3c5cdaSKumar Gala clock-frequency = <0>; 3621b3c5cdaSKumar Gala #interrupt-cells = <1>; 3631b3c5cdaSKumar Gala #size-cells = <2>; 3641b3c5cdaSKumar Gala #address-cells = <3>; 3655b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 3665b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 3671b3c5cdaSKumar Gala compatible = "fsl,mpc8349-pci"; 3681b3c5cdaSKumar Gala device_type = "pci"; 3691f8a25d4SAnton Vorontsov sleep = <&pmc 0x00010000>; 3701b3c5cdaSKumar Gala }; 37123308c54SMichael Barkowski}; 372