123308c54SMichael Barkowski/* 223308c54SMichael Barkowski * MPC832x RDB Device Tree Source 323308c54SMichael Barkowski * 423308c54SMichael Barkowski * Copyright 2007 Freescale Semiconductor Inc. 523308c54SMichael Barkowski * 623308c54SMichael Barkowski * This program is free software; you can redistribute it and/or modify it 723308c54SMichael Barkowski * under the terms of the GNU General Public License as published by the 823308c54SMichael Barkowski * Free Software Foundation; either version 2 of the License, or (at your 923308c54SMichael Barkowski * option) any later version. 1023308c54SMichael Barkowski */ 1123308c54SMichael Barkowski 1223308c54SMichael Barkowski/ { 1323308c54SMichael Barkowski model = "MPC8323ERDB"; 1423308c54SMichael Barkowski compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB"; 1523308c54SMichael Barkowski #address-cells = <1>; 1623308c54SMichael Barkowski #size-cells = <1>; 1723308c54SMichael Barkowski 18ea082fa9SKumar Gala aliases { 19ea082fa9SKumar Gala ethernet0 = &enet0; 20ea082fa9SKumar Gala ethernet1 = &enet1; 21ea082fa9SKumar Gala serial0 = &serial0; 22ea082fa9SKumar Gala serial1 = &serial1; 23ea082fa9SKumar Gala pci0 = &pci0; 24ea082fa9SKumar Gala }; 25ea082fa9SKumar Gala 2623308c54SMichael Barkowski cpus { 2723308c54SMichael Barkowski #address-cells = <1>; 2823308c54SMichael Barkowski #size-cells = <0>; 2923308c54SMichael Barkowski 3023308c54SMichael Barkowski PowerPC,8323@0 { 3123308c54SMichael Barkowski device_type = "cpu"; 3223308c54SMichael Barkowski reg = <0>; 3323308c54SMichael Barkowski d-cache-line-size = <20>; // 32 bytes 3423308c54SMichael Barkowski i-cache-line-size = <20>; // 32 bytes 3523308c54SMichael Barkowski d-cache-size = <4000>; // L1, 16K 3623308c54SMichael Barkowski i-cache-size = <4000>; // L1, 16K 3723308c54SMichael Barkowski timebase-frequency = <0>; 3823308c54SMichael Barkowski bus-frequency = <0>; 3923308c54SMichael Barkowski clock-frequency = <0>; 4023308c54SMichael Barkowski }; 4123308c54SMichael Barkowski }; 4223308c54SMichael Barkowski 4323308c54SMichael Barkowski memory { 4423308c54SMichael Barkowski device_type = "memory"; 4523308c54SMichael Barkowski reg = <00000000 04000000>; 4623308c54SMichael Barkowski }; 4723308c54SMichael Barkowski 4823308c54SMichael Barkowski soc8323@e0000000 { 4923308c54SMichael Barkowski #address-cells = <1>; 5023308c54SMichael Barkowski #size-cells = <1>; 5123308c54SMichael Barkowski device_type = "soc"; 5223308c54SMichael Barkowski ranges = <0 e0000000 00100000>; 5323308c54SMichael Barkowski reg = <e0000000 00000200>; 5423308c54SMichael Barkowski bus-frequency = <0>; 5523308c54SMichael Barkowski 5623308c54SMichael Barkowski wdt@200 { 5723308c54SMichael Barkowski device_type = "watchdog"; 5823308c54SMichael Barkowski compatible = "mpc83xx_wdt"; 5923308c54SMichael Barkowski reg = <200 100>; 6023308c54SMichael Barkowski }; 6123308c54SMichael Barkowski 6223308c54SMichael Barkowski i2c@3000 { 63ec9686c4SKumar Gala #address-cells = <1>; 64ec9686c4SKumar Gala #size-cells = <0>; 65ec9686c4SKumar Gala cell-index = <0>; 6623308c54SMichael Barkowski compatible = "fsl-i2c"; 6723308c54SMichael Barkowski reg = <3000 100>; 6823308c54SMichael Barkowski interrupts = <e 8>; 6923308c54SMichael Barkowski interrupt-parent = <&pic>; 7023308c54SMichael Barkowski dfsrr; 7123308c54SMichael Barkowski }; 7223308c54SMichael Barkowski 73ea082fa9SKumar Gala serial0: serial@4500 { 74ea082fa9SKumar Gala cell-index = <0>; 7523308c54SMichael Barkowski device_type = "serial"; 7623308c54SMichael Barkowski compatible = "ns16550"; 7723308c54SMichael Barkowski reg = <4500 100>; 7823308c54SMichael Barkowski clock-frequency = <0>; 7923308c54SMichael Barkowski interrupts = <9 8>; 8023308c54SMichael Barkowski interrupt-parent = <&pic>; 8123308c54SMichael Barkowski }; 8223308c54SMichael Barkowski 83ea082fa9SKumar Gala serial1: serial@4600 { 84ea082fa9SKumar Gala cell-index = <1>; 8523308c54SMichael Barkowski device_type = "serial"; 8623308c54SMichael Barkowski compatible = "ns16550"; 8723308c54SMichael Barkowski reg = <4600 100>; 8823308c54SMichael Barkowski clock-frequency = <0>; 8923308c54SMichael Barkowski interrupts = <a 8>; 9023308c54SMichael Barkowski interrupt-parent = <&pic>; 9123308c54SMichael Barkowski }; 9223308c54SMichael Barkowski 9323308c54SMichael Barkowski crypto@30000 { 9423308c54SMichael Barkowski device_type = "crypto"; 9523308c54SMichael Barkowski model = "SEC2"; 9623308c54SMichael Barkowski compatible = "talitos"; 9723308c54SMichael Barkowski reg = <30000 7000>; 9823308c54SMichael Barkowski interrupts = <b 8>; 9923308c54SMichael Barkowski interrupt-parent = <&pic>; 10023308c54SMichael Barkowski /* Rev. 2.2 */ 10123308c54SMichael Barkowski num-channels = <1>; 10223308c54SMichael Barkowski channel-fifo-len = <18>; 10323308c54SMichael Barkowski exec-units-mask = <0000004c>; 10423308c54SMichael Barkowski descriptor-types-mask = <0122003f>; 10523308c54SMichael Barkowski }; 10623308c54SMichael Barkowski 10723308c54SMichael Barkowski pic:pic@700 { 10823308c54SMichael Barkowski interrupt-controller; 10923308c54SMichael Barkowski #address-cells = <0>; 11023308c54SMichael Barkowski #interrupt-cells = <2>; 11123308c54SMichael Barkowski reg = <700 100>; 11223308c54SMichael Barkowski device_type = "ipic"; 11323308c54SMichael Barkowski }; 11423308c54SMichael Barkowski 11523308c54SMichael Barkowski par_io@1400 { 11623308c54SMichael Barkowski reg = <1400 100>; 11723308c54SMichael Barkowski device_type = "par_io"; 11823308c54SMichael Barkowski num-ports = <7>; 11923308c54SMichael Barkowski 12023308c54SMichael Barkowski ucc2pio:ucc_pin@02 { 12123308c54SMichael Barkowski pio-map = < 12223308c54SMichael Barkowski /* port pin dir open_drain assignment has_irq */ 12323308c54SMichael Barkowski 3 4 3 0 2 0 /* MDIO */ 12423308c54SMichael Barkowski 3 5 1 0 2 0 /* MDC */ 12523308c54SMichael Barkowski 3 15 2 0 1 0 /* RX_CLK (CLK16) */ 12623308c54SMichael Barkowski 3 17 2 0 1 0 /* TX_CLK (CLK3) */ 12723308c54SMichael Barkowski 0 12 1 0 1 0 /* TxD0 */ 12823308c54SMichael Barkowski 0 13 1 0 1 0 /* TxD1 */ 12923308c54SMichael Barkowski 0 14 1 0 1 0 /* TxD2 */ 13023308c54SMichael Barkowski 0 15 1 0 1 0 /* TxD3 */ 13123308c54SMichael Barkowski 0 16 2 0 1 0 /* RxD0 */ 13223308c54SMichael Barkowski 0 17 2 0 1 0 /* RxD1 */ 13323308c54SMichael Barkowski 0 18 2 0 1 0 /* RxD2 */ 13423308c54SMichael Barkowski 0 19 2 0 1 0 /* RxD3 */ 13523308c54SMichael Barkowski 0 1a 2 0 1 0 /* RX_ER */ 13623308c54SMichael Barkowski 0 1b 1 0 1 0 /* TX_ER */ 13723308c54SMichael Barkowski 0 1c 2 0 1 0 /* RX_DV */ 13823308c54SMichael Barkowski 0 1d 2 0 1 0 /* COL */ 13923308c54SMichael Barkowski 0 1e 1 0 1 0 /* TX_EN */ 14023308c54SMichael Barkowski 0 1f 2 0 1 0>; /* CRS */ 14123308c54SMichael Barkowski }; 14223308c54SMichael Barkowski ucc3pio:ucc_pin@03 { 14323308c54SMichael Barkowski pio-map = < 14423308c54SMichael Barkowski /* port pin dir open_drain assignment has_irq */ 14523308c54SMichael Barkowski 0 d 2 0 1 0 /* RX_CLK (CLK9) */ 14623308c54SMichael Barkowski 3 18 2 0 1 0 /* TX_CLK (CLK10) */ 14723308c54SMichael Barkowski 1 0 1 0 1 0 /* TxD0 */ 14823308c54SMichael Barkowski 1 1 1 0 1 0 /* TxD1 */ 14923308c54SMichael Barkowski 1 2 1 0 1 0 /* TxD2 */ 15023308c54SMichael Barkowski 1 3 1 0 1 0 /* TxD3 */ 15123308c54SMichael Barkowski 1 4 2 0 1 0 /* RxD0 */ 15223308c54SMichael Barkowski 1 5 2 0 1 0 /* RxD1 */ 15323308c54SMichael Barkowski 1 6 2 0 1 0 /* RxD2 */ 15423308c54SMichael Barkowski 1 7 2 0 1 0 /* RxD3 */ 15523308c54SMichael Barkowski 1 8 2 0 1 0 /* RX_ER */ 15623308c54SMichael Barkowski 1 9 1 0 1 0 /* TX_ER */ 15723308c54SMichael Barkowski 1 a 2 0 1 0 /* RX_DV */ 15823308c54SMichael Barkowski 1 b 2 0 1 0 /* COL */ 15923308c54SMichael Barkowski 1 c 1 0 1 0 /* TX_EN */ 16023308c54SMichael Barkowski 1 d 2 0 1 0>; /* CRS */ 16123308c54SMichael Barkowski }; 16223308c54SMichael Barkowski }; 16323308c54SMichael Barkowski }; 16423308c54SMichael Barkowski 16523308c54SMichael Barkowski qe@e0100000 { 16623308c54SMichael Barkowski #address-cells = <1>; 16723308c54SMichael Barkowski #size-cells = <1>; 16823308c54SMichael Barkowski device_type = "qe"; 169a2dd70a1SAnton Vorontsov compatible = "fsl,qe"; 17023308c54SMichael Barkowski ranges = <0 e0100000 00100000>; 17123308c54SMichael Barkowski reg = <e0100000 480>; 17223308c54SMichael Barkowski brg-frequency = <0>; 17323308c54SMichael Barkowski bus-frequency = <BCD3D80>; 17423308c54SMichael Barkowski 17523308c54SMichael Barkowski muram@10000 { 176390167efSPaul Gortmaker #address-cells = <1>; 177390167efSPaul Gortmaker #size-cells = <1>; 178a2dd70a1SAnton Vorontsov compatible = "fsl,qe-muram", "fsl,cpm-muram"; 17923308c54SMichael Barkowski ranges = <0 00010000 00004000>; 18023308c54SMichael Barkowski 18123308c54SMichael Barkowski data-only@0 { 182a2dd70a1SAnton Vorontsov compatible = "fsl,qe-muram-data", 183a2dd70a1SAnton Vorontsov "fsl,cpm-muram-data"; 18423308c54SMichael Barkowski reg = <0 4000>; 18523308c54SMichael Barkowski }; 18623308c54SMichael Barkowski }; 18723308c54SMichael Barkowski 18823308c54SMichael Barkowski spi@4c0 { 189f3a2b29dSAnton Vorontsov cell-index = <0>; 190f3a2b29dSAnton Vorontsov compatible = "fsl,spi"; 19123308c54SMichael Barkowski reg = <4c0 40>; 19223308c54SMichael Barkowski interrupts = <2>; 19323308c54SMichael Barkowski interrupt-parent = <&qeic>; 1948237bf08SAnton Vorontsov mode = "cpu-qe"; 19523308c54SMichael Barkowski }; 19623308c54SMichael Barkowski 19723308c54SMichael Barkowski spi@500 { 198f3a2b29dSAnton Vorontsov cell-index = <1>; 199f3a2b29dSAnton Vorontsov compatible = "fsl,spi"; 20023308c54SMichael Barkowski reg = <500 40>; 20123308c54SMichael Barkowski interrupts = <1>; 20223308c54SMichael Barkowski interrupt-parent = <&qeic>; 20323308c54SMichael Barkowski mode = "cpu"; 20423308c54SMichael Barkowski }; 20523308c54SMichael Barkowski 206e77b28ebSKumar Gala enet0: ucc@3000 { 20723308c54SMichael Barkowski device_type = "network"; 20823308c54SMichael Barkowski compatible = "ucc_geth"; 20923308c54SMichael Barkowski model = "UCC"; 210e77b28ebSKumar Gala cell-index = <2>; 21123308c54SMichael Barkowski device-id = <2>; 21223308c54SMichael Barkowski reg = <3000 200>; 21323308c54SMichael Barkowski interrupts = <21>; 21423308c54SMichael Barkowski interrupt-parent = <&qeic>; 215eae98266STimur Tabi local-mac-address = [ 00 00 00 00 00 00 ]; 2169fb1e350STimur Tabi rx-clock-name = "clk16"; 2179fb1e350STimur Tabi tx-clock-name = "clk3"; 21823308c54SMichael Barkowski phy-handle = <&phy00>; 21923308c54SMichael Barkowski pio-handle = <&ucc2pio>; 22023308c54SMichael Barkowski }; 22123308c54SMichael Barkowski 222e77b28ebSKumar Gala enet1: ucc@2200 { 22323308c54SMichael Barkowski device_type = "network"; 22423308c54SMichael Barkowski compatible = "ucc_geth"; 22523308c54SMichael Barkowski model = "UCC"; 226e77b28ebSKumar Gala cell-index = <3>; 22723308c54SMichael Barkowski device-id = <3>; 22823308c54SMichael Barkowski reg = <2200 200>; 22923308c54SMichael Barkowski interrupts = <22>; 23023308c54SMichael Barkowski interrupt-parent = <&qeic>; 231eae98266STimur Tabi local-mac-address = [ 00 00 00 00 00 00 ]; 2329fb1e350STimur Tabi rx-clock-name = "clk9"; 2339fb1e350STimur Tabi tx-clock-name = "clk10"; 23423308c54SMichael Barkowski phy-handle = <&phy04>; 23523308c54SMichael Barkowski pio-handle = <&ucc3pio>; 23623308c54SMichael Barkowski }; 23723308c54SMichael Barkowski 23823308c54SMichael Barkowski mdio@3120 { 23923308c54SMichael Barkowski #address-cells = <1>; 24023308c54SMichael Barkowski #size-cells = <0>; 24123308c54SMichael Barkowski reg = <3120 18>; 242d0a2f82dSAnton Vorontsov compatible = "fsl,ucc-mdio"; 24323308c54SMichael Barkowski 24423308c54SMichael Barkowski phy00:ethernet-phy@00 { 24523308c54SMichael Barkowski interrupt-parent = <&pic>; 24623308c54SMichael Barkowski interrupts = <0>; 24723308c54SMichael Barkowski reg = <0>; 24823308c54SMichael Barkowski device_type = "ethernet-phy"; 24923308c54SMichael Barkowski }; 25023308c54SMichael Barkowski phy04:ethernet-phy@04 { 25123308c54SMichael Barkowski interrupt-parent = <&pic>; 25223308c54SMichael Barkowski interrupts = <0>; 25323308c54SMichael Barkowski reg = <4>; 25423308c54SMichael Barkowski device_type = "ethernet-phy"; 25523308c54SMichael Barkowski }; 25623308c54SMichael Barkowski }; 25723308c54SMichael Barkowski 258a2dd70a1SAnton Vorontsov qeic:interrupt-controller@80 { 25923308c54SMichael Barkowski interrupt-controller; 260a2dd70a1SAnton Vorontsov compatible = "fsl,qe-ic"; 26123308c54SMichael Barkowski #address-cells = <0>; 26223308c54SMichael Barkowski #interrupt-cells = <1>; 26323308c54SMichael Barkowski reg = <80 80>; 26423308c54SMichael Barkowski big-endian; 26523308c54SMichael Barkowski interrupts = <20 8 21 8>; //high:32 low:33 26623308c54SMichael Barkowski interrupt-parent = <&pic>; 26723308c54SMichael Barkowski }; 26823308c54SMichael Barkowski }; 2691b3c5cdaSKumar Gala 270ea082fa9SKumar Gala pci0: pci@e0008500 { 271ea082fa9SKumar Gala cell-index = <1>; 2721b3c5cdaSKumar Gala interrupt-map-mask = <f800 0 0 7>; 2731b3c5cdaSKumar Gala interrupt-map = < 2741b3c5cdaSKumar Gala /* IDSEL 0x10 AD16 (USB) */ 2751b3c5cdaSKumar Gala 8000 0 0 1 &pic 11 8 2761b3c5cdaSKumar Gala 2771b3c5cdaSKumar Gala /* IDSEL 0x11 AD17 (Mini1)*/ 2781b3c5cdaSKumar Gala 8800 0 0 1 &pic 12 8 2791b3c5cdaSKumar Gala 8800 0 0 2 &pic 13 8 2801b3c5cdaSKumar Gala 8800 0 0 3 &pic 14 8 2811b3c5cdaSKumar Gala 8800 0 0 4 &pic 30 8 2821b3c5cdaSKumar Gala 2831b3c5cdaSKumar Gala /* IDSEL 0x12 AD18 (PCI/Mini2) */ 2841b3c5cdaSKumar Gala 9000 0 0 1 &pic 13 8 2851b3c5cdaSKumar Gala 9000 0 0 2 &pic 14 8 2861b3c5cdaSKumar Gala 9000 0 0 3 &pic 30 8 2871b3c5cdaSKumar Gala 9000 0 0 4 &pic 11 8>; 2881b3c5cdaSKumar Gala 2891b3c5cdaSKumar Gala interrupt-parent = <&pic>; 2901b3c5cdaSKumar Gala interrupts = <42 8>; 2911b3c5cdaSKumar Gala bus-range = <0 0>; 2921b3c5cdaSKumar Gala ranges = <42000000 0 80000000 80000000 0 10000000 2931b3c5cdaSKumar Gala 02000000 0 90000000 90000000 0 10000000 2941b3c5cdaSKumar Gala 01000000 0 d0000000 d0000000 0 04000000>; 2951b3c5cdaSKumar Gala clock-frequency = <0>; 2961b3c5cdaSKumar Gala #interrupt-cells = <1>; 2971b3c5cdaSKumar Gala #size-cells = <2>; 2981b3c5cdaSKumar Gala #address-cells = <3>; 2991b3c5cdaSKumar Gala reg = <e0008500 100>; 3001b3c5cdaSKumar Gala compatible = "fsl,mpc8349-pci"; 3011b3c5cdaSKumar Gala device_type = "pci"; 3021b3c5cdaSKumar Gala }; 30323308c54SMichael Barkowski}; 304