164ee61bbSKim Phillips/* 264ee61bbSKim Phillips * MPC8315E RDB Device Tree Source 364ee61bbSKim Phillips * 464ee61bbSKim Phillips * Copyright 2007 Freescale Semiconductor Inc. 564ee61bbSKim Phillips * 664ee61bbSKim Phillips * This program is free software; you can redistribute it and/or modify it 764ee61bbSKim Phillips * under the terms of the GNU General Public License as published by the 864ee61bbSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 964ee61bbSKim Phillips * option) any later version. 1064ee61bbSKim Phillips */ 1164ee61bbSKim Phillips 1264ee61bbSKim Phillips/dts-v1/; 1364ee61bbSKim Phillips 1464ee61bbSKim Phillips/ { 1564ee61bbSKim Phillips compatible = "fsl,mpc8315erdb"; 1664ee61bbSKim Phillips #address-cells = <1>; 1764ee61bbSKim Phillips #size-cells = <1>; 1864ee61bbSKim Phillips 1964ee61bbSKim Phillips aliases { 2064ee61bbSKim Phillips ethernet0 = &enet0; 2164ee61bbSKim Phillips ethernet1 = &enet1; 2264ee61bbSKim Phillips serial0 = &serial0; 2364ee61bbSKim Phillips serial1 = &serial1; 2464ee61bbSKim Phillips pci0 = &pci0; 250585a155SAnton Vorontsov pci1 = &pci1; 260585a155SAnton Vorontsov pci2 = &pci2; 2764ee61bbSKim Phillips }; 2864ee61bbSKim Phillips 2964ee61bbSKim Phillips cpus { 3064ee61bbSKim Phillips #address-cells = <1>; 3164ee61bbSKim Phillips #size-cells = <0>; 3264ee61bbSKim Phillips 3364ee61bbSKim Phillips PowerPC,8315@0 { 3464ee61bbSKim Phillips device_type = "cpu"; 35cda13dd1SPaul Gortmaker reg = <0x0>; 3664ee61bbSKim Phillips d-cache-line-size = <32>; 3764ee61bbSKim Phillips i-cache-line-size = <32>; 3864ee61bbSKim Phillips d-cache-size = <16384>; 3964ee61bbSKim Phillips i-cache-size = <16384>; 4064ee61bbSKim Phillips timebase-frequency = <0>; // from bootloader 4164ee61bbSKim Phillips bus-frequency = <0>; // from bootloader 4264ee61bbSKim Phillips clock-frequency = <0>; // from bootloader 4364ee61bbSKim Phillips }; 4464ee61bbSKim Phillips }; 4564ee61bbSKim Phillips 4664ee61bbSKim Phillips memory { 4764ee61bbSKim Phillips device_type = "memory"; 4864ee61bbSKim Phillips reg = <0x00000000 0x08000000>; // 128MB at 0 4964ee61bbSKim Phillips }; 5064ee61bbSKim Phillips 5164ee61bbSKim Phillips localbus@e0005000 { 5264ee61bbSKim Phillips #address-cells = <2>; 5364ee61bbSKim Phillips #size-cells = <1>; 5464ee61bbSKim Phillips compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; 5564ee61bbSKim Phillips reg = <0xe0005000 0x1000>; 56cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5764ee61bbSKim Phillips interrupt-parent = <&ipic>; 5864ee61bbSKim Phillips 5964ee61bbSKim Phillips // CS0 and CS1 are swapped when 6064ee61bbSKim Phillips // booting from nand, but the 6164ee61bbSKim Phillips // addresses are the same. 62cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 63cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00002000 64cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 65cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6664ee61bbSKim Phillips 6764ee61bbSKim Phillips flash@0,0 { 6864ee61bbSKim Phillips #address-cells = <1>; 6964ee61bbSKim Phillips #size-cells = <1>; 7064ee61bbSKim Phillips compatible = "cfi-flash"; 71cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 7264ee61bbSKim Phillips bank-width = <2>; 7364ee61bbSKim Phillips device-width = <1>; 7464ee61bbSKim Phillips }; 7564ee61bbSKim Phillips 7664ee61bbSKim Phillips nand@1,0 { 7764ee61bbSKim Phillips #address-cells = <1>; 7864ee61bbSKim Phillips #size-cells = <1>; 7964ee61bbSKim Phillips compatible = "fsl,mpc8315-fcm-nand", 8064ee61bbSKim Phillips "fsl,elbc-fcm-nand"; 81cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x2000>; 8264ee61bbSKim Phillips 8364ee61bbSKim Phillips u-boot@0 { 8464ee61bbSKim Phillips reg = <0x0 0x100000>; 8564ee61bbSKim Phillips read-only; 8664ee61bbSKim Phillips }; 8764ee61bbSKim Phillips 8864ee61bbSKim Phillips kernel@100000 { 8964ee61bbSKim Phillips reg = <0x100000 0x300000>; 9064ee61bbSKim Phillips }; 9164ee61bbSKim Phillips fs@400000 { 9264ee61bbSKim Phillips reg = <0x400000 0x1c00000>; 9364ee61bbSKim Phillips }; 9464ee61bbSKim Phillips }; 9564ee61bbSKim Phillips }; 9664ee61bbSKim Phillips 9764ee61bbSKim Phillips immr@e0000000 { 9864ee61bbSKim Phillips #address-cells = <1>; 9964ee61bbSKim Phillips #size-cells = <1>; 10064ee61bbSKim Phillips device_type = "soc"; 101b74a7e50SKim Phillips compatible = "fsl,mpc8315-immr", "simple-bus"; 10264ee61bbSKim Phillips ranges = <0 0xe0000000 0x00100000>; 10364ee61bbSKim Phillips reg = <0xe0000000 0x00000200>; 10464ee61bbSKim Phillips bus-frequency = <0>; 10564ee61bbSKim Phillips 10664ee61bbSKim Phillips wdt@200 { 10764ee61bbSKim Phillips device_type = "watchdog"; 10864ee61bbSKim Phillips compatible = "mpc83xx_wdt"; 10964ee61bbSKim Phillips reg = <0x200 0x100>; 11064ee61bbSKim Phillips }; 11164ee61bbSKim Phillips 11264ee61bbSKim Phillips i2c@3000 { 11364ee61bbSKim Phillips #address-cells = <1>; 11464ee61bbSKim Phillips #size-cells = <0>; 11564ee61bbSKim Phillips cell-index = <0>; 11664ee61bbSKim Phillips compatible = "fsl-i2c"; 11764ee61bbSKim Phillips reg = <0x3000 0x100>; 118cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 11964ee61bbSKim Phillips interrupt-parent = <&ipic>; 12064ee61bbSKim Phillips dfsrr; 12164ee61bbSKim Phillips rtc@68 { 12264ee61bbSKim Phillips compatible = "dallas,ds1339"; 12364ee61bbSKim Phillips reg = <0x68>; 12464ee61bbSKim Phillips }; 12544274698SAnton Vorontsov 12644274698SAnton Vorontsov mcu_pio: mcu@a { 12744274698SAnton Vorontsov #gpio-cells = <2>; 12844274698SAnton Vorontsov compatible = "fsl,mc9s08qg8-mpc8315erdb", 12944274698SAnton Vorontsov "fsl,mcu-mpc8349emitx"; 13044274698SAnton Vorontsov reg = <0x0a>; 13144274698SAnton Vorontsov gpio-controller; 13244274698SAnton Vorontsov }; 13364ee61bbSKim Phillips }; 13464ee61bbSKim Phillips 13564ee61bbSKim Phillips spi@7000 { 13664ee61bbSKim Phillips cell-index = <0>; 13764ee61bbSKim Phillips compatible = "fsl,spi"; 13864ee61bbSKim Phillips reg = <0x7000 0x1000>; 139cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 14064ee61bbSKim Phillips interrupt-parent = <&ipic>; 14164ee61bbSKim Phillips mode = "cpu"; 14264ee61bbSKim Phillips }; 14364ee61bbSKim Phillips 144dee80553SKumar Gala dma@82a8 { 145dee80553SKumar Gala #address-cells = <1>; 146dee80553SKumar Gala #size-cells = <1>; 147dee80553SKumar Gala compatible = "fsl,mpc8315-dma", "fsl,elo-dma"; 148dee80553SKumar Gala reg = <0x82a8 4>; 149dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 150dee80553SKumar Gala interrupt-parent = <&ipic>; 151dee80553SKumar Gala interrupts = <71 8>; 152dee80553SKumar Gala cell-index = <0>; 153dee80553SKumar Gala dma-channel@0 { 154dee80553SKumar Gala compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 155dee80553SKumar Gala reg = <0 0x80>; 156aeb42762SKumar Gala cell-index = <0>; 157dee80553SKumar Gala interrupt-parent = <&ipic>; 158dee80553SKumar Gala interrupts = <71 8>; 159dee80553SKumar Gala }; 160dee80553SKumar Gala dma-channel@80 { 161dee80553SKumar Gala compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 162dee80553SKumar Gala reg = <0x80 0x80>; 163aeb42762SKumar Gala cell-index = <1>; 164dee80553SKumar Gala interrupt-parent = <&ipic>; 165dee80553SKumar Gala interrupts = <71 8>; 166dee80553SKumar Gala }; 167dee80553SKumar Gala dma-channel@100 { 168dee80553SKumar Gala compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 169dee80553SKumar Gala reg = <0x100 0x80>; 170aeb42762SKumar Gala cell-index = <2>; 171dee80553SKumar Gala interrupt-parent = <&ipic>; 172dee80553SKumar Gala interrupts = <71 8>; 173dee80553SKumar Gala }; 174dee80553SKumar Gala dma-channel@180 { 175dee80553SKumar Gala compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 176dee80553SKumar Gala reg = <0x180 0x28>; 177aeb42762SKumar Gala cell-index = <3>; 178dee80553SKumar Gala interrupt-parent = <&ipic>; 179dee80553SKumar Gala interrupts = <71 8>; 180dee80553SKumar Gala }; 181dee80553SKumar Gala }; 182dee80553SKumar Gala 18364ee61bbSKim Phillips usb@23000 { 18464ee61bbSKim Phillips compatible = "fsl-usb2-dr"; 18564ee61bbSKim Phillips reg = <0x23000 0x1000>; 18664ee61bbSKim Phillips #address-cells = <1>; 18764ee61bbSKim Phillips #size-cells = <0>; 18864ee61bbSKim Phillips interrupt-parent = <&ipic>; 189cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 19064ee61bbSKim Phillips phy_type = "utmi"; 19164ee61bbSKim Phillips }; 19264ee61bbSKim Phillips 19370b3adbbSAnton Vorontsov enet0: ethernet@24000 { 19470b3adbbSAnton Vorontsov #address-cells = <1>; 19570b3adbbSAnton Vorontsov #size-cells = <1>; 19670b3adbbSAnton Vorontsov cell-index = <0>; 19770b3adbbSAnton Vorontsov device_type = "network"; 19870b3adbbSAnton Vorontsov model = "eTSEC"; 19970b3adbbSAnton Vorontsov compatible = "gianfar"; 20070b3adbbSAnton Vorontsov reg = <0x24000 0x1000>; 20170b3adbbSAnton Vorontsov ranges = <0x0 0x24000 0x1000>; 20270b3adbbSAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 20370b3adbbSAnton Vorontsov interrupts = <32 0x8 33 0x8 34 0x8>; 20470b3adbbSAnton Vorontsov interrupt-parent = <&ipic>; 20570b3adbbSAnton Vorontsov tbi-handle = <&tbi0>; 20670b3adbbSAnton Vorontsov phy-handle = < &phy0 >; 2071cad2c87SAnton Vorontsov fsl,magic-packet; 20870b3adbbSAnton Vorontsov 20970b3adbbSAnton Vorontsov mdio@520 { 21064ee61bbSKim Phillips #address-cells = <1>; 21164ee61bbSKim Phillips #size-cells = <0>; 21264ee61bbSKim Phillips compatible = "fsl,gianfar-mdio"; 21370b3adbbSAnton Vorontsov reg = <0x520 0x20>; 21470b3adbbSAnton Vorontsov 21564ee61bbSKim Phillips phy0: ethernet-phy@0 { 21664ee61bbSKim Phillips interrupt-parent = <&ipic>; 217cda13dd1SPaul Gortmaker interrupts = <20 0x8>; 218cda13dd1SPaul Gortmaker reg = <0x0>; 21964ee61bbSKim Phillips device_type = "ethernet-phy"; 22064ee61bbSKim Phillips }; 22170b3adbbSAnton Vorontsov 22264ee61bbSKim Phillips phy1: ethernet-phy@1 { 22364ee61bbSKim Phillips interrupt-parent = <&ipic>; 224cda13dd1SPaul Gortmaker interrupts = <19 0x8>; 225cda13dd1SPaul Gortmaker reg = <0x1>; 22664ee61bbSKim Phillips device_type = "ethernet-phy"; 22764ee61bbSKim Phillips }; 22870b3adbbSAnton Vorontsov 229b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 230b31a1d8bSAndy Fleming reg = <0x11>; 231b31a1d8bSAndy Fleming device_type = "tbi-phy"; 23264ee61bbSKim Phillips }; 233b31a1d8bSAndy Fleming }; 23470b3adbbSAnton Vorontsov }; 235b31a1d8bSAndy Fleming 23670b3adbbSAnton Vorontsov enet1: ethernet@25000 { 23770b3adbbSAnton Vorontsov #address-cells = <1>; 23870b3adbbSAnton Vorontsov #size-cells = <1>; 23970b3adbbSAnton Vorontsov cell-index = <1>; 24070b3adbbSAnton Vorontsov device_type = "network"; 24170b3adbbSAnton Vorontsov model = "eTSEC"; 24270b3adbbSAnton Vorontsov compatible = "gianfar"; 24370b3adbbSAnton Vorontsov reg = <0x25000 0x1000>; 24470b3adbbSAnton Vorontsov ranges = <0x0 0x25000 0x1000>; 24570b3adbbSAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 24670b3adbbSAnton Vorontsov interrupts = <35 0x8 36 0x8 37 0x8>; 24770b3adbbSAnton Vorontsov interrupt-parent = <&ipic>; 24870b3adbbSAnton Vorontsov tbi-handle = <&tbi1>; 24970b3adbbSAnton Vorontsov phy-handle = < &phy1 >; 2501cad2c87SAnton Vorontsov fsl,magic-packet; 25170b3adbbSAnton Vorontsov 25270b3adbbSAnton Vorontsov mdio@520 { 253b31a1d8bSAndy Fleming #address-cells = <1>; 254b31a1d8bSAndy Fleming #size-cells = <0>; 255b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 25670b3adbbSAnton Vorontsov reg = <0x520 0x20>; 257b31a1d8bSAndy Fleming 258b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 259b31a1d8bSAndy Fleming reg = <0x11>; 260b31a1d8bSAndy Fleming device_type = "tbi-phy"; 261b31a1d8bSAndy Fleming }; 262b31a1d8bSAndy Fleming }; 26364ee61bbSKim Phillips }; 26464ee61bbSKim Phillips 26564ee61bbSKim Phillips serial0: serial@4500 { 26664ee61bbSKim Phillips cell-index = <0>; 26764ee61bbSKim Phillips device_type = "serial"; 26864ee61bbSKim Phillips compatible = "ns16550"; 26964ee61bbSKim Phillips reg = <0x4500 0x100>; 2706c9789deSAnton Vorontsov clock-frequency = <133333333>; 271cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 27264ee61bbSKim Phillips interrupt-parent = <&ipic>; 27364ee61bbSKim Phillips }; 27464ee61bbSKim Phillips 27564ee61bbSKim Phillips serial1: serial@4600 { 27664ee61bbSKim Phillips cell-index = <1>; 27764ee61bbSKim Phillips device_type = "serial"; 27864ee61bbSKim Phillips compatible = "ns16550"; 27964ee61bbSKim Phillips reg = <0x4600 0x100>; 2806c9789deSAnton Vorontsov clock-frequency = <133333333>; 281cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 28264ee61bbSKim Phillips interrupt-parent = <&ipic>; 28364ee61bbSKim Phillips }; 28464ee61bbSKim Phillips 28564ee61bbSKim Phillips crypto@30000 { 2863fd44736SKim Phillips compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", 2873fd44736SKim Phillips "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", 2883fd44736SKim Phillips "fsl,sec2.0"; 28964ee61bbSKim Phillips reg = <0x30000 0x10000>; 290cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 29164ee61bbSKim Phillips interrupt-parent = <&ipic>; 2923fd44736SKim Phillips fsl,num-channels = <4>; 2933fd44736SKim Phillips fsl,channel-fifo-len = <24>; 2943fd44736SKim Phillips fsl,exec-units-mask = <0x97c>; 2953fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0abf>; 29664ee61bbSKim Phillips }; 29764ee61bbSKim Phillips 29864ee61bbSKim Phillips sata@18000 { 29964ee61bbSKim Phillips compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; 30064ee61bbSKim Phillips reg = <0x18000 0x1000>; 30164ee61bbSKim Phillips cell-index = <1>; 302cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 30364ee61bbSKim Phillips interrupt-parent = <&ipic>; 30464ee61bbSKim Phillips }; 30564ee61bbSKim Phillips 30664ee61bbSKim Phillips sata@19000 { 30764ee61bbSKim Phillips compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; 30864ee61bbSKim Phillips reg = <0x19000 0x1000>; 30964ee61bbSKim Phillips cell-index = <2>; 310cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 31164ee61bbSKim Phillips interrupt-parent = <&ipic>; 31264ee61bbSKim Phillips }; 31364ee61bbSKim Phillips 3141cad2c87SAnton Vorontsov gtm1: timer@500 { 3151cad2c87SAnton Vorontsov compatible = "fsl,mpc8315-gtm", "fsl,gtm"; 3161cad2c87SAnton Vorontsov reg = <0x500 0x100>; 3171cad2c87SAnton Vorontsov interrupts = <90 8 78 8 84 8 72 8>; 3181cad2c87SAnton Vorontsov interrupt-parent = <&ipic>; 3191cad2c87SAnton Vorontsov clock-frequency = <133333333>; 3201cad2c87SAnton Vorontsov }; 3211cad2c87SAnton Vorontsov 3221cad2c87SAnton Vorontsov timer@600 { 3231cad2c87SAnton Vorontsov compatible = "fsl,mpc8315-gtm", "fsl,gtm"; 3241cad2c87SAnton Vorontsov reg = <0x600 0x100>; 3251cad2c87SAnton Vorontsov interrupts = <91 8 79 8 85 8 73 8>; 3261cad2c87SAnton Vorontsov interrupt-parent = <&ipic>; 3271cad2c87SAnton Vorontsov clock-frequency = <133333333>; 3281cad2c87SAnton Vorontsov }; 3291cad2c87SAnton Vorontsov 33064ee61bbSKim Phillips /* IPIC 33164ee61bbSKim Phillips * interrupts cell = <intr #, sense> 33264ee61bbSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 33364ee61bbSKim Phillips * sense == 8: Level, low assertion 33464ee61bbSKim Phillips * sense == 2: Edge, high-to-low change 33564ee61bbSKim Phillips */ 33664ee61bbSKim Phillips ipic: interrupt-controller@700 { 33764ee61bbSKim Phillips interrupt-controller; 33864ee61bbSKim Phillips #address-cells = <0>; 33964ee61bbSKim Phillips #interrupt-cells = <2>; 34064ee61bbSKim Phillips reg = <0x700 0x100>; 34164ee61bbSKim Phillips device_type = "ipic"; 34264ee61bbSKim Phillips }; 3434dc2a6cfSleon.woestenberg@gmail.com 3444dc2a6cfSleon.woestenberg@gmail.com ipic-msi@7c0 { 3454dc2a6cfSleon.woestenberg@gmail.com compatible = "fsl,ipic-msi"; 3464dc2a6cfSleon.woestenberg@gmail.com reg = <0x7c0 0x40>; 3474dc2a6cfSleon.woestenberg@gmail.com msi-available-ranges = <0 0x100>; 3484dc2a6cfSleon.woestenberg@gmail.com interrupts = <0x43 0x8 3494dc2a6cfSleon.woestenberg@gmail.com 0x4 0x8 3504dc2a6cfSleon.woestenberg@gmail.com 0x51 0x8 3514dc2a6cfSleon.woestenberg@gmail.com 0x52 0x8 3524dc2a6cfSleon.woestenberg@gmail.com 0x56 0x8 3534dc2a6cfSleon.woestenberg@gmail.com 0x57 0x8 3544dc2a6cfSleon.woestenberg@gmail.com 0x58 0x8 3554dc2a6cfSleon.woestenberg@gmail.com 0x59 0x8>; 3564dc2a6cfSleon.woestenberg@gmail.com interrupt-parent = < &ipic >; 3574dc2a6cfSleon.woestenberg@gmail.com }; 3581cad2c87SAnton Vorontsov 3591cad2c87SAnton Vorontsov pmc: power@b00 { 3601cad2c87SAnton Vorontsov compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc", 3611cad2c87SAnton Vorontsov "fsl,mpc8349-pmc"; 3621cad2c87SAnton Vorontsov reg = <0xb00 0x100 0xa00 0x100>; 3631cad2c87SAnton Vorontsov interrupts = <80 8>; 3641cad2c87SAnton Vorontsov interrupt-parent = <&ipic>; 3651cad2c87SAnton Vorontsov fsl,mpc8313-wakeup-timer = <>m1>; 3661cad2c87SAnton Vorontsov }; 36764ee61bbSKim Phillips }; 36864ee61bbSKim Phillips 36964ee61bbSKim Phillips pci0: pci@e0008500 { 370cda13dd1SPaul Gortmaker interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 37164ee61bbSKim Phillips interrupt-map = < 37264ee61bbSKim Phillips /* IDSEL 0x0E -mini PCI */ 373cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 18 0x8 374cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x2 &ipic 18 0x8 375cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x3 &ipic 18 0x8 376cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x4 &ipic 18 0x8 37764ee61bbSKim Phillips 37864ee61bbSKim Phillips /* IDSEL 0x0F -mini PCI */ 379cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 17 0x8 380cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 17 0x8 381cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x3 &ipic 17 0x8 382cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 17 0x8 38364ee61bbSKim Phillips 38464ee61bbSKim Phillips /* IDSEL 0x10 - PCI slot */ 385cda13dd1SPaul Gortmaker 0x8000 0x0 0x0 0x1 &ipic 48 0x8 386cda13dd1SPaul Gortmaker 0x8000 0x0 0x0 0x2 &ipic 17 0x8 387cda13dd1SPaul Gortmaker 0x8000 0x0 0x0 0x3 &ipic 48 0x8 388cda13dd1SPaul Gortmaker 0x8000 0x0 0x0 0x4 &ipic 17 0x8>; 38964ee61bbSKim Phillips interrupt-parent = <&ipic>; 390cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 391cda13dd1SPaul Gortmaker bus-range = <0x0 0x0>; 39264ee61bbSKim Phillips ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 39364ee61bbSKim Phillips 0x42000000 0 0x80000000 0x80000000 0 0x10000000 39464ee61bbSKim Phillips 0x01000000 0 0x00000000 0xe0300000 0 0x00100000>; 39564ee61bbSKim Phillips clock-frequency = <66666666>; 39664ee61bbSKim Phillips #interrupt-cells = <1>; 39764ee61bbSKim Phillips #size-cells = <2>; 39864ee61bbSKim Phillips #address-cells = <3>; 3995b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 4005b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 40164ee61bbSKim Phillips compatible = "fsl,mpc8349-pci"; 40264ee61bbSKim Phillips device_type = "pci"; 40364ee61bbSKim Phillips }; 4040585a155SAnton Vorontsov 4050585a155SAnton Vorontsov pci1: pcie@e0009000 { 4060585a155SAnton Vorontsov #address-cells = <3>; 4070585a155SAnton Vorontsov #size-cells = <2>; 4080585a155SAnton Vorontsov #interrupt-cells = <1>; 4090585a155SAnton Vorontsov device_type = "pci"; 4100585a155SAnton Vorontsov compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; 4110585a155SAnton Vorontsov reg = <0xe0009000 0x00001000>; 4120585a155SAnton Vorontsov ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 4130585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; 4140585a155SAnton Vorontsov bus-range = <0 255>; 4150585a155SAnton Vorontsov interrupt-map-mask = <0xf800 0 0 7>; 4160585a155SAnton Vorontsov interrupt-map = <0 0 0 1 &ipic 1 8 4170585a155SAnton Vorontsov 0 0 0 2 &ipic 1 8 4180585a155SAnton Vorontsov 0 0 0 3 &ipic 1 8 4190585a155SAnton Vorontsov 0 0 0 4 &ipic 1 8>; 4200585a155SAnton Vorontsov clock-frequency = <0>; 4210585a155SAnton Vorontsov 4220585a155SAnton Vorontsov pcie@0 { 4230585a155SAnton Vorontsov #address-cells = <3>; 4240585a155SAnton Vorontsov #size-cells = <2>; 4250585a155SAnton Vorontsov device_type = "pci"; 4260585a155SAnton Vorontsov reg = <0 0 0 0 0>; 4270585a155SAnton Vorontsov ranges = <0x02000000 0 0xa0000000 4280585a155SAnton Vorontsov 0x02000000 0 0xa0000000 4290585a155SAnton Vorontsov 0 0x10000000 4300585a155SAnton Vorontsov 0x01000000 0 0x00000000 4310585a155SAnton Vorontsov 0x01000000 0 0x00000000 4320585a155SAnton Vorontsov 0 0x00800000>; 4330585a155SAnton Vorontsov }; 4340585a155SAnton Vorontsov }; 4350585a155SAnton Vorontsov 4360585a155SAnton Vorontsov pci2: pcie@e000a000 { 4370585a155SAnton Vorontsov #address-cells = <3>; 4380585a155SAnton Vorontsov #size-cells = <2>; 4390585a155SAnton Vorontsov #interrupt-cells = <1>; 4400585a155SAnton Vorontsov device_type = "pci"; 4410585a155SAnton Vorontsov compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; 4420585a155SAnton Vorontsov reg = <0xe000a000 0x00001000>; 4430585a155SAnton Vorontsov ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000 4440585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; 4450585a155SAnton Vorontsov bus-range = <0 255>; 4460585a155SAnton Vorontsov interrupt-map-mask = <0xf800 0 0 7>; 4470585a155SAnton Vorontsov interrupt-map = <0 0 0 1 &ipic 2 8 4480585a155SAnton Vorontsov 0 0 0 2 &ipic 2 8 4490585a155SAnton Vorontsov 0 0 0 3 &ipic 2 8 4500585a155SAnton Vorontsov 0 0 0 4 &ipic 2 8>; 4510585a155SAnton Vorontsov clock-frequency = <0>; 4520585a155SAnton Vorontsov 4530585a155SAnton Vorontsov pcie@0 { 4540585a155SAnton Vorontsov #address-cells = <3>; 4550585a155SAnton Vorontsov #size-cells = <2>; 4560585a155SAnton Vorontsov device_type = "pci"; 4570585a155SAnton Vorontsov reg = <0 0 0 0 0>; 4580585a155SAnton Vorontsov ranges = <0x02000000 0 0xc0000000 4590585a155SAnton Vorontsov 0x02000000 0 0xc0000000 4600585a155SAnton Vorontsov 0 0x10000000 4610585a155SAnton Vorontsov 0x01000000 0 0x00000000 4620585a155SAnton Vorontsov 0x01000000 0 0x00000000 4630585a155SAnton Vorontsov 0 0x00800000>; 4640585a155SAnton Vorontsov }; 4650585a155SAnton Vorontsov }; 46664ee61bbSKim Phillips}; 467