1/*
2 * MPC8313E RDB Device Tree Source
3 *
4 * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 */
11
12/ {
13	model = "MPC8313ERDB";
14	compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
15	#address-cells = <1>;
16	#size-cells = <1>;
17
18	aliases {
19		ethernet0 = &enet0;
20		ethernet1 = &enet1;
21		serial0 = &serial0;
22		serial1 = &serial1;
23		pci0 = &pci0;
24	};
25
26	cpus {
27		#address-cells = <1>;
28		#size-cells = <0>;
29
30		PowerPC,8313@0 {
31			device_type = "cpu";
32			reg = <0>;
33			d-cache-line-size = <20>;	// 32 bytes
34			i-cache-line-size = <20>;	// 32 bytes
35			d-cache-size = <4000>;		// L1, 16K
36			i-cache-size = <4000>;		// L1, 16K
37			timebase-frequency = <0>;	// from bootloader
38			bus-frequency = <0>;		// from bootloader
39			clock-frequency = <0>;		// from bootloader
40		};
41	};
42
43	memory {
44		device_type = "memory";
45		reg = <00000000 08000000>;	// 128MB at 0
46	};
47
48	soc8313@e0000000 {
49		#address-cells = <1>;
50		#size-cells = <1>;
51		device_type = "soc";
52		ranges = <0 e0000000 00100000>;
53		reg = <e0000000 00000200>;
54		bus-frequency = <0>;
55
56		wdt@200 {
57			device_type = "watchdog";
58			compatible = "mpc83xx_wdt";
59			reg = <200 100>;
60		};
61
62		i2c@3000 {
63			#address-cells = <1>;
64			#size-cells = <0>;
65			cell-index = <0>;
66			compatible = "fsl-i2c";
67			reg = <3000 100>;
68			interrupts = <e 8>;
69			interrupt-parent = < &ipic >;
70			dfsrr;
71		};
72
73		i2c@3100 {
74			#address-cells = <1>;
75			#size-cells = <0>;
76			cell-index = <1>;
77			compatible = "fsl-i2c";
78			reg = <3100 100>;
79			interrupts = <f 8>;
80			interrupt-parent = < &ipic >;
81			dfsrr;
82		};
83
84		spi@7000 {
85			device_type = "spi";
86			compatible = "fsl_spi";
87			reg = <7000 1000>;
88			interrupts = <10 8>;
89			interrupt-parent = < &ipic >;
90			mode = "cpu";
91		};
92
93		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
94		usb@23000 {
95			device_type = "usb";
96			compatible = "fsl-usb2-dr";
97			reg = <23000 1000>;
98			#address-cells = <1>;
99			#size-cells = <0>;
100			interrupt-parent = < &ipic >;
101			interrupts = <26 8>;
102			phy_type = "utmi_wide";
103		};
104
105		mdio@24520 {
106			#address-cells = <1>;
107			#size-cells = <0>;
108			compatible = "fsl,gianfar-mdio";
109			reg = <24520 20>;
110			phy1: ethernet-phy@1 {
111				interrupt-parent = < &ipic >;
112				interrupts = <13 8>;
113				reg = <1>;
114				device_type = "ethernet-phy";
115			};
116			phy4: ethernet-phy@4 {
117				interrupt-parent = < &ipic >;
118				interrupts = <14 8>;
119				reg = <4>;
120				device_type = "ethernet-phy";
121			};
122		};
123
124		enet0: ethernet@24000 {
125			cell-index = <0>;
126			device_type = "network";
127			model = "eTSEC";
128			compatible = "gianfar";
129			reg = <24000 1000>;
130			local-mac-address = [ 00 00 00 00 00 00 ];
131			interrupts = <25 8 24 8 23 8>;
132			interrupt-parent = < &ipic >;
133			phy-handle = < &phy1 >;
134		};
135
136		enet1: ethernet@25000 {
137			cell-index = <1>;
138			device_type = "network";
139			model = "eTSEC";
140			compatible = "gianfar";
141			reg = <25000 1000>;
142			local-mac-address = [ 00 00 00 00 00 00 ];
143			interrupts = <22 8 21 8 20 8>;
144			interrupt-parent = < &ipic >;
145			phy-handle = < &phy4 >;
146		};
147
148		serial0: serial@4500 {
149			cell-index = <0>;
150			device_type = "serial";
151			compatible = "ns16550";
152			reg = <4500 100>;
153			clock-frequency = <0>;
154			interrupts = <9 8>;
155			interrupt-parent = < &ipic >;
156		};
157
158		serial1: serial@4600 {
159			cell-index = <1>;
160			device_type = "serial";
161			compatible = "ns16550";
162			reg = <4600 100>;
163			clock-frequency = <0>;
164			interrupts = <a 8>;
165			interrupt-parent = < &ipic >;
166		};
167
168		crypto@30000 {
169			device_type = "crypto";
170			model = "SEC2";
171			compatible = "talitos";
172			reg = <30000 7000>;
173			interrupts = <b 8>;
174			interrupt-parent = < &ipic >;
175			/* Rev. 2.2 */
176			num-channels = <1>;
177			channel-fifo-len = <18>;
178			exec-units-mask = <0000004c>;
179			descriptor-types-mask = <0122003f>;
180		};
181
182		/* IPIC
183		 * interrupts cell = <intr #, sense>
184		 * sense values match linux IORESOURCE_IRQ_* defines:
185		 * sense == 8: Level, low assertion
186		 * sense == 2: Edge, high-to-low change
187		 */
188		ipic: pic@700 {
189			interrupt-controller;
190			#address-cells = <0>;
191			#interrupt-cells = <2>;
192			reg = <700 100>;
193			device_type = "ipic";
194		};
195	};
196
197	pci0: pci@e0008500 {
198		cell-index = <1>;
199		interrupt-map-mask = <f800 0 0 7>;
200		interrupt-map = <
201
202				/* IDSEL 0x0E -mini PCI */
203				 7000 0 0 1 &ipic 12 8
204				 7000 0 0 2 &ipic 12 8
205				 7000 0 0 3 &ipic 12 8
206				 7000 0 0 4 &ipic 12 8
207
208				/* IDSEL 0x0F - PCI slot */
209				 7800 0 0 1 &ipic 11 8
210				 7800 0 0 2 &ipic 12 8
211				 7800 0 0 3 &ipic 11 8
212				 7800 0 0 4 &ipic 12 8>;
213		interrupt-parent = < &ipic >;
214		interrupts = <42 8>;
215		bus-range = <0 0>;
216		ranges = <02000000 0 90000000 90000000 0 10000000
217			  42000000 0 80000000 80000000 0 10000000
218			  01000000 0 00000000 e2000000 0 00100000>;
219		clock-frequency = <3f940aa>;
220		#interrupt-cells = <1>;
221		#size-cells = <2>;
222		#address-cells = <3>;
223		reg = <e0008500 100>;
224		compatible = "fsl,mpc8349-pci";
225		device_type = "pci";
226	};
227};
228