1/* 2 * MPC8313E RDB Device Tree Source 3 * 4 * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/ { 13 model = "MPC8313ERDB"; 14 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 aliases { 19 ethernet0 = &enet0; 20 ethernet1 = &enet1; 21 serial0 = &serial0; 22 serial1 = &serial1; 23 pci0 = &pci0; 24 }; 25 26 cpus { 27 #address-cells = <1>; 28 #size-cells = <0>; 29 30 PowerPC,8313@0 { 31 device_type = "cpu"; 32 reg = <0>; 33 d-cache-line-size = <20>; // 32 bytes 34 i-cache-line-size = <20>; // 32 bytes 35 d-cache-size = <4000>; // L1, 16K 36 i-cache-size = <4000>; // L1, 16K 37 timebase-frequency = <0>; // from bootloader 38 bus-frequency = <0>; // from bootloader 39 clock-frequency = <0>; // from bootloader 40 }; 41 }; 42 43 memory { 44 device_type = "memory"; 45 reg = <00000000 08000000>; // 128MB at 0 46 }; 47 48 soc8313@e0000000 { 49 #address-cells = <1>; 50 #size-cells = <1>; 51 device_type = "soc"; 52 ranges = <0 e0000000 00100000>; 53 reg = <e0000000 00000200>; 54 bus-frequency = <0>; 55 56 wdt@200 { 57 device_type = "watchdog"; 58 compatible = "mpc83xx_wdt"; 59 reg = <200 100>; 60 }; 61 62 i2c@3000 { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 cell-index = <0>; 66 compatible = "fsl-i2c"; 67 reg = <3000 100>; 68 interrupts = <e 8>; 69 interrupt-parent = < &ipic >; 70 dfsrr; 71 }; 72 73 i2c@3100 { 74 #address-cells = <1>; 75 #size-cells = <0>; 76 cell-index = <1>; 77 compatible = "fsl-i2c"; 78 reg = <3100 100>; 79 interrupts = <f 8>; 80 interrupt-parent = < &ipic >; 81 dfsrr; 82 }; 83 84 spi@7000 { 85 device_type = "spi"; 86 compatible = "fsl_spi"; 87 reg = <7000 1000>; 88 interrupts = <10 8>; 89 interrupt-parent = < &ipic >; 90 mode = "cpu"; 91 }; 92 93 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 94 usb@23000 { 95 compatible = "fsl-usb2-dr"; 96 reg = <23000 1000>; 97 #address-cells = <1>; 98 #size-cells = <0>; 99 interrupt-parent = < &ipic >; 100 interrupts = <26 8>; 101 phy_type = "utmi_wide"; 102 }; 103 104 mdio@24520 { 105 #address-cells = <1>; 106 #size-cells = <0>; 107 compatible = "fsl,gianfar-mdio"; 108 reg = <24520 20>; 109 phy1: ethernet-phy@1 { 110 interrupt-parent = < &ipic >; 111 interrupts = <13 8>; 112 reg = <1>; 113 device_type = "ethernet-phy"; 114 }; 115 phy4: ethernet-phy@4 { 116 interrupt-parent = < &ipic >; 117 interrupts = <14 8>; 118 reg = <4>; 119 device_type = "ethernet-phy"; 120 }; 121 }; 122 123 enet0: ethernet@24000 { 124 cell-index = <0>; 125 device_type = "network"; 126 model = "eTSEC"; 127 compatible = "gianfar"; 128 reg = <24000 1000>; 129 local-mac-address = [ 00 00 00 00 00 00 ]; 130 interrupts = <25 8 24 8 23 8>; 131 interrupt-parent = < &ipic >; 132 phy-handle = < &phy1 >; 133 }; 134 135 enet1: ethernet@25000 { 136 cell-index = <1>; 137 device_type = "network"; 138 model = "eTSEC"; 139 compatible = "gianfar"; 140 reg = <25000 1000>; 141 local-mac-address = [ 00 00 00 00 00 00 ]; 142 interrupts = <22 8 21 8 20 8>; 143 interrupt-parent = < &ipic >; 144 phy-handle = < &phy4 >; 145 }; 146 147 serial0: serial@4500 { 148 cell-index = <0>; 149 device_type = "serial"; 150 compatible = "ns16550"; 151 reg = <4500 100>; 152 clock-frequency = <0>; 153 interrupts = <9 8>; 154 interrupt-parent = < &ipic >; 155 }; 156 157 serial1: serial@4600 { 158 cell-index = <1>; 159 device_type = "serial"; 160 compatible = "ns16550"; 161 reg = <4600 100>; 162 clock-frequency = <0>; 163 interrupts = <a 8>; 164 interrupt-parent = < &ipic >; 165 }; 166 167 crypto@30000 { 168 device_type = "crypto"; 169 model = "SEC2"; 170 compatible = "talitos"; 171 reg = <30000 7000>; 172 interrupts = <b 8>; 173 interrupt-parent = < &ipic >; 174 /* Rev. 2.2 */ 175 num-channels = <1>; 176 channel-fifo-len = <18>; 177 exec-units-mask = <0000004c>; 178 descriptor-types-mask = <0122003f>; 179 }; 180 181 /* IPIC 182 * interrupts cell = <intr #, sense> 183 * sense values match linux IORESOURCE_IRQ_* defines: 184 * sense == 8: Level, low assertion 185 * sense == 2: Edge, high-to-low change 186 */ 187 ipic: pic@700 { 188 interrupt-controller; 189 #address-cells = <0>; 190 #interrupt-cells = <2>; 191 reg = <700 100>; 192 device_type = "ipic"; 193 }; 194 }; 195 196 pci0: pci@e0008500 { 197 cell-index = <1>; 198 interrupt-map-mask = <f800 0 0 7>; 199 interrupt-map = < 200 201 /* IDSEL 0x0E -mini PCI */ 202 7000 0 0 1 &ipic 12 8 203 7000 0 0 2 &ipic 12 8 204 7000 0 0 3 &ipic 12 8 205 7000 0 0 4 &ipic 12 8 206 207 /* IDSEL 0x0F - PCI slot */ 208 7800 0 0 1 &ipic 11 8 209 7800 0 0 2 &ipic 12 8 210 7800 0 0 3 &ipic 11 8 211 7800 0 0 4 &ipic 12 8>; 212 interrupt-parent = < &ipic >; 213 interrupts = <42 8>; 214 bus-range = <0 0>; 215 ranges = <02000000 0 90000000 90000000 0 10000000 216 42000000 0 80000000 80000000 0 10000000 217 01000000 0 00000000 e2000000 0 00100000>; 218 clock-frequency = <3f940aa>; 219 #interrupt-cells = <1>; 220 #size-cells = <2>; 221 #address-cells = <3>; 222 reg = <e0008500 100>; 223 compatible = "fsl,mpc8349-pci"; 224 device_type = "pci"; 225 }; 226}; 227