1b359049fSKim Phillips/* 2b359049fSKim Phillips * MPC8313E RDB Device Tree Source 3b359049fSKim Phillips * 4b359049fSKim Phillips * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. 5b359049fSKim Phillips * 6b359049fSKim Phillips * This program is free software; you can redistribute it and/or modify it 7b359049fSKim Phillips * under the terms of the GNU General Public License as published by the 8b359049fSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 9b359049fSKim Phillips * option) any later version. 10b359049fSKim Phillips */ 11b359049fSKim Phillips 12b359049fSKim Phillips/ { 13b359049fSKim Phillips model = "MPC8313ERDB"; 14d71a1dc6SKumar Gala compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; 15b359049fSKim Phillips #address-cells = <1>; 16b359049fSKim Phillips #size-cells = <1>; 17b359049fSKim Phillips 18ea082fa9SKumar Gala aliases { 19ea082fa9SKumar Gala ethernet0 = &enet0; 20ea082fa9SKumar Gala ethernet1 = &enet1; 21ea082fa9SKumar Gala serial0 = &serial0; 22ea082fa9SKumar Gala serial1 = &serial1; 23ea082fa9SKumar Gala pci0 = &pci0; 24ea082fa9SKumar Gala }; 25ea082fa9SKumar Gala 26b359049fSKim Phillips cpus { 27b359049fSKim Phillips #address-cells = <1>; 28b359049fSKim Phillips #size-cells = <0>; 29b359049fSKim Phillips 30b359049fSKim Phillips PowerPC,8313@0 { 31b359049fSKim Phillips device_type = "cpu"; 32b359049fSKim Phillips reg = <0>; 33b359049fSKim Phillips d-cache-line-size = <20>; // 32 bytes 34b359049fSKim Phillips i-cache-line-size = <20>; // 32 bytes 35b359049fSKim Phillips d-cache-size = <4000>; // L1, 16K 36b359049fSKim Phillips i-cache-size = <4000>; // L1, 16K 37b359049fSKim Phillips timebase-frequency = <0>; // from bootloader 38b359049fSKim Phillips bus-frequency = <0>; // from bootloader 39b359049fSKim Phillips clock-frequency = <0>; // from bootloader 40b359049fSKim Phillips }; 41b359049fSKim Phillips }; 42b359049fSKim Phillips 43b359049fSKim Phillips memory { 44b359049fSKim Phillips device_type = "memory"; 45b359049fSKim Phillips reg = <00000000 08000000>; // 128MB at 0 46b359049fSKim Phillips }; 47b359049fSKim Phillips 48ff5ac760SScott Wood localbus@e0005000 { 49ff5ac760SScott Wood #address-cells = <2>; 50ff5ac760SScott Wood #size-cells = <1>; 51ff5ac760SScott Wood compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; 52ff5ac760SScott Wood reg = <e0005000 1000>; 53ff5ac760SScott Wood interrupts = <d#77 8>; 54ff5ac760SScott Wood interrupt-parent = <&ipic>; 55ff5ac760SScott Wood 56ff5ac760SScott Wood // CS0 and CS1 are swapped when 57ff5ac760SScott Wood // booting from nand, but the 58ff5ac760SScott Wood // addresses are the same. 59ff5ac760SScott Wood ranges = <0 0 fe000000 00800000 60ff5ac760SScott Wood 1 0 e2800000 00008000 61ff5ac760SScott Wood 2 0 f0000000 00020000 62ff5ac760SScott Wood 3 0 fa000000 00008000>; 63ff5ac760SScott Wood 64ff5ac760SScott Wood nand@1,0 { 65ff5ac760SScott Wood #address-cells = <1>; 66ff5ac760SScott Wood #size-cells = <1>; 67ff5ac760SScott Wood compatible = "fsl,mpc8313-fcm-nand", 68ff5ac760SScott Wood "fsl,elbc-fcm-nand"; 69ff5ac760SScott Wood reg = <1 0 2000>; 70ff5ac760SScott Wood 71ff5ac760SScott Wood u-boot@0 { 72ff5ac760SScott Wood reg = <0 100000>; 73ff5ac760SScott Wood read-only; 74ff5ac760SScott Wood }; 75ff5ac760SScott Wood 76ff5ac760SScott Wood kernel@100000 { 77ff5ac760SScott Wood reg = <100000 300000>; 78ff5ac760SScott Wood }; 79ff5ac760SScott Wood 80ff5ac760SScott Wood fs@400000 { 81ff5ac760SScott Wood reg = <400000 1c00000>; 82ff5ac760SScott Wood }; 83ff5ac760SScott Wood }; 84ff5ac760SScott Wood }; 85ff5ac760SScott Wood 86b359049fSKim Phillips soc8313@e0000000 { 87b359049fSKim Phillips #address-cells = <1>; 88b359049fSKim Phillips #size-cells = <1>; 89b359049fSKim Phillips device_type = "soc"; 90ff5ac760SScott Wood compatible = "simple-bus"; 91b359049fSKim Phillips ranges = <0 e0000000 00100000>; 92b359049fSKim Phillips reg = <e0000000 00000200>; 93b359049fSKim Phillips bus-frequency = <0>; 94b359049fSKim Phillips 95b359049fSKim Phillips wdt@200 { 96b359049fSKim Phillips device_type = "watchdog"; 97b359049fSKim Phillips compatible = "mpc83xx_wdt"; 98b359049fSKim Phillips reg = <200 100>; 99b359049fSKim Phillips }; 100b359049fSKim Phillips 101b359049fSKim Phillips i2c@3000 { 102ec9686c4SKumar Gala #address-cells = <1>; 103ec9686c4SKumar Gala #size-cells = <0>; 104ec9686c4SKumar Gala cell-index = <0>; 105b359049fSKim Phillips compatible = "fsl-i2c"; 106b359049fSKim Phillips reg = <3000 100>; 107b359049fSKim Phillips interrupts = <e 8>; 108d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 109b359049fSKim Phillips dfsrr; 110b359049fSKim Phillips }; 111b359049fSKim Phillips 112b359049fSKim Phillips i2c@3100 { 113ec9686c4SKumar Gala #address-cells = <1>; 114ec9686c4SKumar Gala #size-cells = <0>; 115ec9686c4SKumar Gala cell-index = <1>; 116b359049fSKim Phillips compatible = "fsl-i2c"; 117b359049fSKim Phillips reg = <3100 100>; 118b359049fSKim Phillips interrupts = <f 8>; 119d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 120b359049fSKim Phillips dfsrr; 121b359049fSKim Phillips }; 122b359049fSKim Phillips 123b359049fSKim Phillips spi@7000 { 124b359049fSKim Phillips device_type = "spi"; 12533799e33SPeter Korsgaard compatible = "fsl_spi"; 126b359049fSKim Phillips reg = <7000 1000>; 127b359049fSKim Phillips interrupts = <10 8>; 128d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 12933799e33SPeter Korsgaard mode = "cpu"; 130b359049fSKim Phillips }; 131b359049fSKim Phillips 132b359049fSKim Phillips /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 133b359049fSKim Phillips usb@23000 { 134b359049fSKim Phillips compatible = "fsl-usb2-dr"; 135b359049fSKim Phillips reg = <23000 1000>; 136b359049fSKim Phillips #address-cells = <1>; 137b359049fSKim Phillips #size-cells = <0>; 138d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 139d71a1dc6SKumar Gala interrupts = <26 8>; 140b359049fSKim Phillips phy_type = "utmi_wide"; 141b359049fSKim Phillips }; 142b359049fSKim Phillips 143b359049fSKim Phillips mdio@24520 { 144b359049fSKim Phillips #address-cells = <1>; 145b359049fSKim Phillips #size-cells = <0>; 146e77b28ebSKumar Gala compatible = "fsl,gianfar-mdio"; 147e77b28ebSKumar Gala reg = <24520 20>; 148d71a1dc6SKumar Gala phy1: ethernet-phy@1 { 149d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 150d71a1dc6SKumar Gala interrupts = <13 8>; 151b359049fSKim Phillips reg = <1>; 152b359049fSKim Phillips device_type = "ethernet-phy"; 153b359049fSKim Phillips }; 154d71a1dc6SKumar Gala phy4: ethernet-phy@4 { 155d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 156d71a1dc6SKumar Gala interrupts = <14 8>; 157b359049fSKim Phillips reg = <4>; 158b359049fSKim Phillips device_type = "ethernet-phy"; 159b359049fSKim Phillips }; 160b359049fSKim Phillips }; 161b359049fSKim Phillips 162e77b28ebSKumar Gala enet0: ethernet@24000 { 163e77b28ebSKumar Gala cell-index = <0>; 164b359049fSKim Phillips device_type = "network"; 165b359049fSKim Phillips model = "eTSEC"; 166b359049fSKim Phillips compatible = "gianfar"; 167b359049fSKim Phillips reg = <24000 1000>; 168b359049fSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 169b359049fSKim Phillips interrupts = <25 8 24 8 23 8>; 170d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 171d71a1dc6SKumar Gala phy-handle = < &phy1 >; 172b359049fSKim Phillips }; 173b359049fSKim Phillips 174e77b28ebSKumar Gala enet1: ethernet@25000 { 175e77b28ebSKumar Gala cell-index = <1>; 176b359049fSKim Phillips device_type = "network"; 177b359049fSKim Phillips model = "eTSEC"; 178b359049fSKim Phillips compatible = "gianfar"; 179b359049fSKim Phillips reg = <25000 1000>; 180b359049fSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 181b359049fSKim Phillips interrupts = <22 8 21 8 20 8>; 182d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 183d71a1dc6SKumar Gala phy-handle = < &phy4 >; 184b359049fSKim Phillips }; 185b359049fSKim Phillips 186ea082fa9SKumar Gala serial0: serial@4500 { 187ea082fa9SKumar Gala cell-index = <0>; 188b359049fSKim Phillips device_type = "serial"; 189b359049fSKim Phillips compatible = "ns16550"; 190b359049fSKim Phillips reg = <4500 100>; 191b359049fSKim Phillips clock-frequency = <0>; 192b359049fSKim Phillips interrupts = <9 8>; 193d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 194b359049fSKim Phillips }; 195b359049fSKim Phillips 196ea082fa9SKumar Gala serial1: serial@4600 { 197ea082fa9SKumar Gala cell-index = <1>; 198b359049fSKim Phillips device_type = "serial"; 199b359049fSKim Phillips compatible = "ns16550"; 200b359049fSKim Phillips reg = <4600 100>; 201b359049fSKim Phillips clock-frequency = <0>; 202b359049fSKim Phillips interrupts = <a 8>; 203d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 204b359049fSKim Phillips }; 205b359049fSKim Phillips 206b359049fSKim Phillips crypto@30000 { 207b359049fSKim Phillips device_type = "crypto"; 208b359049fSKim Phillips model = "SEC2"; 209b359049fSKim Phillips compatible = "talitos"; 210b359049fSKim Phillips reg = <30000 7000>; 211b359049fSKim Phillips interrupts = <b 8>; 212d71a1dc6SKumar Gala interrupt-parent = < &ipic >; 213b359049fSKim Phillips /* Rev. 2.2 */ 214b359049fSKim Phillips num-channels = <1>; 215b359049fSKim Phillips channel-fifo-len = <18>; 216b359049fSKim Phillips exec-units-mask = <0000004c>; 217b359049fSKim Phillips descriptor-types-mask = <0122003f>; 218b359049fSKim Phillips }; 219b359049fSKim Phillips 220b359049fSKim Phillips /* IPIC 221b359049fSKim Phillips * interrupts cell = <intr #, sense> 222b359049fSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 223b359049fSKim Phillips * sense == 8: Level, low assertion 224b359049fSKim Phillips * sense == 2: Edge, high-to-low change 225b359049fSKim Phillips */ 226d71a1dc6SKumar Gala ipic: pic@700 { 227b359049fSKim Phillips interrupt-controller; 228b359049fSKim Phillips #address-cells = <0>; 229b359049fSKim Phillips #interrupt-cells = <2>; 230b359049fSKim Phillips reg = <700 100>; 231b359049fSKim Phillips device_type = "ipic"; 232b359049fSKim Phillips }; 233b359049fSKim Phillips }; 2341b3c5cdaSKumar Gala 235ea082fa9SKumar Gala pci0: pci@e0008500 { 236ea082fa9SKumar Gala cell-index = <1>; 2371b3c5cdaSKumar Gala interrupt-map-mask = <f800 0 0 7>; 2381b3c5cdaSKumar Gala interrupt-map = < 2391b3c5cdaSKumar Gala 2401b3c5cdaSKumar Gala /* IDSEL 0x0E -mini PCI */ 2411b3c5cdaSKumar Gala 7000 0 0 1 &ipic 12 8 2421b3c5cdaSKumar Gala 7000 0 0 2 &ipic 12 8 2431b3c5cdaSKumar Gala 7000 0 0 3 &ipic 12 8 2441b3c5cdaSKumar Gala 7000 0 0 4 &ipic 12 8 2451b3c5cdaSKumar Gala 2461b3c5cdaSKumar Gala /* IDSEL 0x0F - PCI slot */ 2471b3c5cdaSKumar Gala 7800 0 0 1 &ipic 11 8 2481b3c5cdaSKumar Gala 7800 0 0 2 &ipic 12 8 2491b3c5cdaSKumar Gala 7800 0 0 3 &ipic 11 8 2501b3c5cdaSKumar Gala 7800 0 0 4 &ipic 12 8>; 2511b3c5cdaSKumar Gala interrupt-parent = < &ipic >; 2521b3c5cdaSKumar Gala interrupts = <42 8>; 2531b3c5cdaSKumar Gala bus-range = <0 0>; 2541b3c5cdaSKumar Gala ranges = <02000000 0 90000000 90000000 0 10000000 2551b3c5cdaSKumar Gala 42000000 0 80000000 80000000 0 10000000 2561b3c5cdaSKumar Gala 01000000 0 00000000 e2000000 0 00100000>; 2571b3c5cdaSKumar Gala clock-frequency = <3f940aa>; 2581b3c5cdaSKumar Gala #interrupt-cells = <1>; 2591b3c5cdaSKumar Gala #size-cells = <2>; 2601b3c5cdaSKumar Gala #address-cells = <3>; 2611b3c5cdaSKumar Gala reg = <e0008500 100>; 2621b3c5cdaSKumar Gala compatible = "fsl,mpc8349-pci"; 2631b3c5cdaSKumar Gala device_type = "pci"; 2641b3c5cdaSKumar Gala }; 265b359049fSKim Phillips}; 266