1b359049fSKim Phillips/*
2b359049fSKim Phillips * MPC8313E RDB Device Tree Source
3b359049fSKim Phillips *
4b359049fSKim Phillips * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
5b359049fSKim Phillips *
6b359049fSKim Phillips * This program is free software; you can redistribute  it and/or modify it
7b359049fSKim Phillips * under  the terms of  the GNU General  Public License as published by the
8b359049fSKim Phillips * Free Software Foundation;  either version 2 of the  License, or (at your
9b359049fSKim Phillips * option) any later version.
10b359049fSKim Phillips */
11b359049fSKim Phillips
12b359049fSKim Phillips/ {
13b359049fSKim Phillips	model = "MPC8313ERDB";
14d71a1dc6SKumar Gala	compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
15b359049fSKim Phillips	#address-cells = <1>;
16b359049fSKim Phillips	#size-cells = <1>;
17b359049fSKim Phillips
18b359049fSKim Phillips	cpus {
19b359049fSKim Phillips		#address-cells = <1>;
20b359049fSKim Phillips		#size-cells = <0>;
21b359049fSKim Phillips
22b359049fSKim Phillips		PowerPC,8313@0 {
23b359049fSKim Phillips			device_type = "cpu";
24b359049fSKim Phillips			reg = <0>;
25b359049fSKim Phillips			d-cache-line-size = <20>;	// 32 bytes
26b359049fSKim Phillips			i-cache-line-size = <20>;	// 32 bytes
27b359049fSKim Phillips			d-cache-size = <4000>;		// L1, 16K
28b359049fSKim Phillips			i-cache-size = <4000>;		// L1, 16K
29b359049fSKim Phillips			timebase-frequency = <0>;	// from bootloader
30b359049fSKim Phillips			bus-frequency = <0>;		// from bootloader
31b359049fSKim Phillips			clock-frequency = <0>;		// from bootloader
32b359049fSKim Phillips		};
33b359049fSKim Phillips	};
34b359049fSKim Phillips
35b359049fSKim Phillips	memory {
36b359049fSKim Phillips		device_type = "memory";
37b359049fSKim Phillips		reg = <00000000 08000000>;	// 128MB at 0
38b359049fSKim Phillips	};
39b359049fSKim Phillips
40b359049fSKim Phillips	soc8313@e0000000 {
41b359049fSKim Phillips		#address-cells = <1>;
42b359049fSKim Phillips		#size-cells = <1>;
43b359049fSKim Phillips		device_type = "soc";
44b359049fSKim Phillips		ranges = <0 e0000000 00100000>;
45b359049fSKim Phillips		reg = <e0000000 00000200>;
46b359049fSKim Phillips		bus-frequency = <0>;
47b359049fSKim Phillips
48b359049fSKim Phillips		wdt@200 {
49b359049fSKim Phillips			device_type = "watchdog";
50b359049fSKim Phillips			compatible = "mpc83xx_wdt";
51b359049fSKim Phillips			reg = <200 100>;
52b359049fSKim Phillips		};
53b359049fSKim Phillips
54b359049fSKim Phillips		i2c@3000 {
55ec9686c4SKumar Gala			#address-cells = <1>;
56ec9686c4SKumar Gala			#size-cells = <0>;
57ec9686c4SKumar Gala			cell-index = <0>;
58b359049fSKim Phillips			compatible = "fsl-i2c";
59b359049fSKim Phillips			reg = <3000 100>;
60b359049fSKim Phillips			interrupts = <e 8>;
61d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
62b359049fSKim Phillips			dfsrr;
63b359049fSKim Phillips		};
64b359049fSKim Phillips
65b359049fSKim Phillips		i2c@3100 {
66ec9686c4SKumar Gala			#address-cells = <1>;
67ec9686c4SKumar Gala			#size-cells = <0>;
68ec9686c4SKumar Gala			cell-index = <1>;
69b359049fSKim Phillips			compatible = "fsl-i2c";
70b359049fSKim Phillips			reg = <3100 100>;
71b359049fSKim Phillips			interrupts = <f 8>;
72d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
73b359049fSKim Phillips			dfsrr;
74b359049fSKim Phillips		};
75b359049fSKim Phillips
76b359049fSKim Phillips		spi@7000 {
77b359049fSKim Phillips			device_type = "spi";
7833799e33SPeter Korsgaard			compatible = "fsl_spi";
79b359049fSKim Phillips			reg = <7000 1000>;
80b359049fSKim Phillips			interrupts = <10 8>;
81d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
8233799e33SPeter Korsgaard			mode = "cpu";
83b359049fSKim Phillips		};
84b359049fSKim Phillips
85b359049fSKim Phillips		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
86b359049fSKim Phillips		usb@23000 {
87b359049fSKim Phillips			device_type = "usb";
88b359049fSKim Phillips			compatible = "fsl-usb2-dr";
89b359049fSKim Phillips			reg = <23000 1000>;
90b359049fSKim Phillips			#address-cells = <1>;
91b359049fSKim Phillips			#size-cells = <0>;
92d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
93d71a1dc6SKumar Gala			interrupts = <26 8>;
94b359049fSKim Phillips			phy_type = "utmi_wide";
95b359049fSKim Phillips		};
96b359049fSKim Phillips
97b359049fSKim Phillips		mdio@24520 {
98b359049fSKim Phillips			device_type = "mdio";
99b359049fSKim Phillips			compatible = "gianfar";
100b359049fSKim Phillips			reg = <24520 20>;
101b359049fSKim Phillips			#address-cells = <1>;
102b359049fSKim Phillips			#size-cells = <0>;
103d71a1dc6SKumar Gala			phy1: ethernet-phy@1 {
104d71a1dc6SKumar Gala				interrupt-parent = < &ipic >;
105d71a1dc6SKumar Gala				interrupts = <13 8>;
106b359049fSKim Phillips				reg = <1>;
107b359049fSKim Phillips				device_type = "ethernet-phy";
108b359049fSKim Phillips			};
109d71a1dc6SKumar Gala			phy4: ethernet-phy@4 {
110d71a1dc6SKumar Gala				interrupt-parent = < &ipic >;
111d71a1dc6SKumar Gala				interrupts = <14 8>;
112b359049fSKim Phillips				reg = <4>;
113b359049fSKim Phillips				device_type = "ethernet-phy";
114b359049fSKim Phillips			};
115b359049fSKim Phillips		};
116b359049fSKim Phillips
117b359049fSKim Phillips		ethernet@24000 {
118b359049fSKim Phillips			device_type = "network";
119b359049fSKim Phillips			model = "eTSEC";
120b359049fSKim Phillips			compatible = "gianfar";
121b359049fSKim Phillips			reg = <24000 1000>;
122b359049fSKim Phillips			local-mac-address = [ 00 00 00 00 00 00 ];
123b359049fSKim Phillips			interrupts = <25 8 24 8 23 8>;
124d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
125d71a1dc6SKumar Gala			phy-handle = < &phy1 >;
126b359049fSKim Phillips		};
127b359049fSKim Phillips
128b359049fSKim Phillips		ethernet@25000 {
129b359049fSKim Phillips			device_type = "network";
130b359049fSKim Phillips			model = "eTSEC";
131b359049fSKim Phillips			compatible = "gianfar";
132b359049fSKim Phillips			reg = <25000 1000>;
133b359049fSKim Phillips			local-mac-address = [ 00 00 00 00 00 00 ];
134b359049fSKim Phillips			interrupts = <22 8 21 8 20 8>;
135d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
136d71a1dc6SKumar Gala			phy-handle = < &phy4 >;
137b359049fSKim Phillips		};
138b359049fSKim Phillips
139b359049fSKim Phillips		serial@4500 {
140b359049fSKim Phillips			device_type = "serial";
141b359049fSKim Phillips			compatible = "ns16550";
142b359049fSKim Phillips			reg = <4500 100>;
143b359049fSKim Phillips			clock-frequency = <0>;
144b359049fSKim Phillips			interrupts = <9 8>;
145d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
146b359049fSKim Phillips		};
147b359049fSKim Phillips
148b359049fSKim Phillips		serial@4600 {
149b359049fSKim Phillips			device_type = "serial";
150b359049fSKim Phillips			compatible = "ns16550";
151b359049fSKim Phillips			reg = <4600 100>;
152b359049fSKim Phillips			clock-frequency = <0>;
153b359049fSKim Phillips			interrupts = <a 8>;
154d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
155b359049fSKim Phillips		};
156b359049fSKim Phillips
157b359049fSKim Phillips		crypto@30000 {
158b359049fSKim Phillips			device_type = "crypto";
159b359049fSKim Phillips			model = "SEC2";
160b359049fSKim Phillips			compatible = "talitos";
161b359049fSKim Phillips			reg = <30000 7000>;
162b359049fSKim Phillips			interrupts = <b 8>;
163d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
164b359049fSKim Phillips			/* Rev. 2.2 */
165b359049fSKim Phillips			num-channels = <1>;
166b359049fSKim Phillips			channel-fifo-len = <18>;
167b359049fSKim Phillips			exec-units-mask = <0000004c>;
168b359049fSKim Phillips			descriptor-types-mask = <0122003f>;
169b359049fSKim Phillips		};
170b359049fSKim Phillips
171b359049fSKim Phillips		/* IPIC
172b359049fSKim Phillips		 * interrupts cell = <intr #, sense>
173b359049fSKim Phillips		 * sense values match linux IORESOURCE_IRQ_* defines:
174b359049fSKim Phillips		 * sense == 8: Level, low assertion
175b359049fSKim Phillips		 * sense == 2: Edge, high-to-low change
176b359049fSKim Phillips		 */
177d71a1dc6SKumar Gala		ipic: pic@700 {
178b359049fSKim Phillips			interrupt-controller;
179b359049fSKim Phillips			#address-cells = <0>;
180b359049fSKim Phillips			#interrupt-cells = <2>;
181b359049fSKim Phillips			reg = <700 100>;
182b359049fSKim Phillips			device_type = "ipic";
183b359049fSKim Phillips		};
184b359049fSKim Phillips	};
1851b3c5cdaSKumar Gala
1861b3c5cdaSKumar Gala	pci@e0008500 {
1871b3c5cdaSKumar Gala		interrupt-map-mask = <f800 0 0 7>;
1881b3c5cdaSKumar Gala		interrupt-map = <
1891b3c5cdaSKumar Gala
1901b3c5cdaSKumar Gala				/* IDSEL 0x0E -mini PCI */
1911b3c5cdaSKumar Gala				 7000 0 0 1 &ipic 12 8
1921b3c5cdaSKumar Gala				 7000 0 0 2 &ipic 12 8
1931b3c5cdaSKumar Gala				 7000 0 0 3 &ipic 12 8
1941b3c5cdaSKumar Gala				 7000 0 0 4 &ipic 12 8
1951b3c5cdaSKumar Gala
1961b3c5cdaSKumar Gala				/* IDSEL 0x0F - PCI slot */
1971b3c5cdaSKumar Gala				 7800 0 0 1 &ipic 11 8
1981b3c5cdaSKumar Gala				 7800 0 0 2 &ipic 12 8
1991b3c5cdaSKumar Gala				 7800 0 0 3 &ipic 11 8
2001b3c5cdaSKumar Gala				 7800 0 0 4 &ipic 12 8>;
2011b3c5cdaSKumar Gala		interrupt-parent = < &ipic >;
2021b3c5cdaSKumar Gala		interrupts = <42 8>;
2031b3c5cdaSKumar Gala		bus-range = <0 0>;
2041b3c5cdaSKumar Gala		ranges = <02000000 0 90000000 90000000 0 10000000
2051b3c5cdaSKumar Gala			  42000000 0 80000000 80000000 0 10000000
2061b3c5cdaSKumar Gala			  01000000 0 00000000 e2000000 0 00100000>;
2071b3c5cdaSKumar Gala		clock-frequency = <3f940aa>;
2081b3c5cdaSKumar Gala		#interrupt-cells = <1>;
2091b3c5cdaSKumar Gala		#size-cells = <2>;
2101b3c5cdaSKumar Gala		#address-cells = <3>;
2111b3c5cdaSKumar Gala		reg = <e0008500 100>;
2121b3c5cdaSKumar Gala		compatible = "fsl,mpc8349-pci";
2131b3c5cdaSKumar Gala		device_type = "pci";
2141b3c5cdaSKumar Gala	};
215b359049fSKim Phillips};
216