1b359049fSKim Phillips/*
2b359049fSKim Phillips * MPC8313E RDB Device Tree Source
3b359049fSKim Phillips *
4b359049fSKim Phillips * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
5b359049fSKim Phillips *
6b359049fSKim Phillips * This program is free software; you can redistribute  it and/or modify it
7b359049fSKim Phillips * under  the terms of  the GNU General  Public License as published by the
8b359049fSKim Phillips * Free Software Foundation;  either version 2 of the  License, or (at your
9b359049fSKim Phillips * option) any later version.
10b359049fSKim Phillips */
11b359049fSKim Phillips
12b359049fSKim Phillips/ {
13b359049fSKim Phillips	model = "MPC8313ERDB";
14d71a1dc6SKumar Gala	compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
15b359049fSKim Phillips	#address-cells = <1>;
16b359049fSKim Phillips	#size-cells = <1>;
17b359049fSKim Phillips
18ea082fa9SKumar Gala	aliases {
19ea082fa9SKumar Gala		ethernet0 = &enet0;
20ea082fa9SKumar Gala		ethernet1 = &enet1;
21ea082fa9SKumar Gala		serial0 = &serial0;
22ea082fa9SKumar Gala		serial1 = &serial1;
23ea082fa9SKumar Gala		pci0 = &pci0;
24ea082fa9SKumar Gala	};
25ea082fa9SKumar Gala
26b359049fSKim Phillips	cpus {
27b359049fSKim Phillips		#address-cells = <1>;
28b359049fSKim Phillips		#size-cells = <0>;
29b359049fSKim Phillips
30b359049fSKim Phillips		PowerPC,8313@0 {
31b359049fSKim Phillips			device_type = "cpu";
32b359049fSKim Phillips			reg = <0>;
33b359049fSKim Phillips			d-cache-line-size = <20>;	// 32 bytes
34b359049fSKim Phillips			i-cache-line-size = <20>;	// 32 bytes
35b359049fSKim Phillips			d-cache-size = <4000>;		// L1, 16K
36b359049fSKim Phillips			i-cache-size = <4000>;		// L1, 16K
37b359049fSKim Phillips			timebase-frequency = <0>;	// from bootloader
38b359049fSKim Phillips			bus-frequency = <0>;		// from bootloader
39b359049fSKim Phillips			clock-frequency = <0>;		// from bootloader
40b359049fSKim Phillips		};
41b359049fSKim Phillips	};
42b359049fSKim Phillips
43b359049fSKim Phillips	memory {
44b359049fSKim Phillips		device_type = "memory";
45b359049fSKim Phillips		reg = <00000000 08000000>;	// 128MB at 0
46b359049fSKim Phillips	};
47b359049fSKim Phillips
48b359049fSKim Phillips	soc8313@e0000000 {
49b359049fSKim Phillips		#address-cells = <1>;
50b359049fSKim Phillips		#size-cells = <1>;
51b359049fSKim Phillips		device_type = "soc";
52b359049fSKim Phillips		ranges = <0 e0000000 00100000>;
53b359049fSKim Phillips		reg = <e0000000 00000200>;
54b359049fSKim Phillips		bus-frequency = <0>;
55b359049fSKim Phillips
56b359049fSKim Phillips		wdt@200 {
57b359049fSKim Phillips			device_type = "watchdog";
58b359049fSKim Phillips			compatible = "mpc83xx_wdt";
59b359049fSKim Phillips			reg = <200 100>;
60b359049fSKim Phillips		};
61b359049fSKim Phillips
62b359049fSKim Phillips		i2c@3000 {
63ec9686c4SKumar Gala			#address-cells = <1>;
64ec9686c4SKumar Gala			#size-cells = <0>;
65ec9686c4SKumar Gala			cell-index = <0>;
66b359049fSKim Phillips			compatible = "fsl-i2c";
67b359049fSKim Phillips			reg = <3000 100>;
68b359049fSKim Phillips			interrupts = <e 8>;
69d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
70b359049fSKim Phillips			dfsrr;
71b359049fSKim Phillips		};
72b359049fSKim Phillips
73b359049fSKim Phillips		i2c@3100 {
74ec9686c4SKumar Gala			#address-cells = <1>;
75ec9686c4SKumar Gala			#size-cells = <0>;
76ec9686c4SKumar Gala			cell-index = <1>;
77b359049fSKim Phillips			compatible = "fsl-i2c";
78b359049fSKim Phillips			reg = <3100 100>;
79b359049fSKim Phillips			interrupts = <f 8>;
80d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
81b359049fSKim Phillips			dfsrr;
82b359049fSKim Phillips		};
83b359049fSKim Phillips
84b359049fSKim Phillips		spi@7000 {
85b359049fSKim Phillips			device_type = "spi";
8633799e33SPeter Korsgaard			compatible = "fsl_spi";
87b359049fSKim Phillips			reg = <7000 1000>;
88b359049fSKim Phillips			interrupts = <10 8>;
89d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
9033799e33SPeter Korsgaard			mode = "cpu";
91b359049fSKim Phillips		};
92b359049fSKim Phillips
93b359049fSKim Phillips		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
94b359049fSKim Phillips		usb@23000 {
95b359049fSKim Phillips			device_type = "usb";
96b359049fSKim Phillips			compatible = "fsl-usb2-dr";
97b359049fSKim Phillips			reg = <23000 1000>;
98b359049fSKim Phillips			#address-cells = <1>;
99b359049fSKim Phillips			#size-cells = <0>;
100d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
101d71a1dc6SKumar Gala			interrupts = <26 8>;
102b359049fSKim Phillips			phy_type = "utmi_wide";
103b359049fSKim Phillips		};
104b359049fSKim Phillips
105b359049fSKim Phillips		mdio@24520 {
106b359049fSKim Phillips			#address-cells = <1>;
107b359049fSKim Phillips			#size-cells = <0>;
108e77b28ebSKumar Gala			compatible = "fsl,gianfar-mdio";
109e77b28ebSKumar Gala			reg = <24520 20>;
110d71a1dc6SKumar Gala			phy1: ethernet-phy@1 {
111d71a1dc6SKumar Gala				interrupt-parent = < &ipic >;
112d71a1dc6SKumar Gala				interrupts = <13 8>;
113b359049fSKim Phillips				reg = <1>;
114b359049fSKim Phillips				device_type = "ethernet-phy";
115b359049fSKim Phillips			};
116d71a1dc6SKumar Gala			phy4: ethernet-phy@4 {
117d71a1dc6SKumar Gala				interrupt-parent = < &ipic >;
118d71a1dc6SKumar Gala				interrupts = <14 8>;
119b359049fSKim Phillips				reg = <4>;
120b359049fSKim Phillips				device_type = "ethernet-phy";
121b359049fSKim Phillips			};
122b359049fSKim Phillips		};
123b359049fSKim Phillips
124e77b28ebSKumar Gala		enet0: ethernet@24000 {
125e77b28ebSKumar Gala			cell-index = <0>;
126b359049fSKim Phillips			device_type = "network";
127b359049fSKim Phillips			model = "eTSEC";
128b359049fSKim Phillips			compatible = "gianfar";
129b359049fSKim Phillips			reg = <24000 1000>;
130b359049fSKim Phillips			local-mac-address = [ 00 00 00 00 00 00 ];
131b359049fSKim Phillips			interrupts = <25 8 24 8 23 8>;
132d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
133d71a1dc6SKumar Gala			phy-handle = < &phy1 >;
134b359049fSKim Phillips		};
135b359049fSKim Phillips
136e77b28ebSKumar Gala		enet1: ethernet@25000 {
137e77b28ebSKumar Gala			cell-index = <1>;
138b359049fSKim Phillips			device_type = "network";
139b359049fSKim Phillips			model = "eTSEC";
140b359049fSKim Phillips			compatible = "gianfar";
141b359049fSKim Phillips			reg = <25000 1000>;
142b359049fSKim Phillips			local-mac-address = [ 00 00 00 00 00 00 ];
143b359049fSKim Phillips			interrupts = <22 8 21 8 20 8>;
144d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
145d71a1dc6SKumar Gala			phy-handle = < &phy4 >;
146b359049fSKim Phillips		};
147b359049fSKim Phillips
148ea082fa9SKumar Gala		serial0: serial@4500 {
149ea082fa9SKumar Gala			cell-index = <0>;
150b359049fSKim Phillips			device_type = "serial";
151b359049fSKim Phillips			compatible = "ns16550";
152b359049fSKim Phillips			reg = <4500 100>;
153b359049fSKim Phillips			clock-frequency = <0>;
154b359049fSKim Phillips			interrupts = <9 8>;
155d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
156b359049fSKim Phillips		};
157b359049fSKim Phillips
158ea082fa9SKumar Gala		serial1: serial@4600 {
159ea082fa9SKumar Gala			cell-index = <1>;
160b359049fSKim Phillips			device_type = "serial";
161b359049fSKim Phillips			compatible = "ns16550";
162b359049fSKim Phillips			reg = <4600 100>;
163b359049fSKim Phillips			clock-frequency = <0>;
164b359049fSKim Phillips			interrupts = <a 8>;
165d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
166b359049fSKim Phillips		};
167b359049fSKim Phillips
168b359049fSKim Phillips		crypto@30000 {
169b359049fSKim Phillips			device_type = "crypto";
170b359049fSKim Phillips			model = "SEC2";
171b359049fSKim Phillips			compatible = "talitos";
172b359049fSKim Phillips			reg = <30000 7000>;
173b359049fSKim Phillips			interrupts = <b 8>;
174d71a1dc6SKumar Gala			interrupt-parent = < &ipic >;
175b359049fSKim Phillips			/* Rev. 2.2 */
176b359049fSKim Phillips			num-channels = <1>;
177b359049fSKim Phillips			channel-fifo-len = <18>;
178b359049fSKim Phillips			exec-units-mask = <0000004c>;
179b359049fSKim Phillips			descriptor-types-mask = <0122003f>;
180b359049fSKim Phillips		};
181b359049fSKim Phillips
182b359049fSKim Phillips		/* IPIC
183b359049fSKim Phillips		 * interrupts cell = <intr #, sense>
184b359049fSKim Phillips		 * sense values match linux IORESOURCE_IRQ_* defines:
185b359049fSKim Phillips		 * sense == 8: Level, low assertion
186b359049fSKim Phillips		 * sense == 2: Edge, high-to-low change
187b359049fSKim Phillips		 */
188d71a1dc6SKumar Gala		ipic: pic@700 {
189b359049fSKim Phillips			interrupt-controller;
190b359049fSKim Phillips			#address-cells = <0>;
191b359049fSKim Phillips			#interrupt-cells = <2>;
192b359049fSKim Phillips			reg = <700 100>;
193b359049fSKim Phillips			device_type = "ipic";
194b359049fSKim Phillips		};
195b359049fSKim Phillips	};
1961b3c5cdaSKumar Gala
197ea082fa9SKumar Gala	pci0: pci@e0008500 {
198ea082fa9SKumar Gala		cell-index = <1>;
1991b3c5cdaSKumar Gala		interrupt-map-mask = <f800 0 0 7>;
2001b3c5cdaSKumar Gala		interrupt-map = <
2011b3c5cdaSKumar Gala
2021b3c5cdaSKumar Gala				/* IDSEL 0x0E -mini PCI */
2031b3c5cdaSKumar Gala				 7000 0 0 1 &ipic 12 8
2041b3c5cdaSKumar Gala				 7000 0 0 2 &ipic 12 8
2051b3c5cdaSKumar Gala				 7000 0 0 3 &ipic 12 8
2061b3c5cdaSKumar Gala				 7000 0 0 4 &ipic 12 8
2071b3c5cdaSKumar Gala
2081b3c5cdaSKumar Gala				/* IDSEL 0x0F - PCI slot */
2091b3c5cdaSKumar Gala				 7800 0 0 1 &ipic 11 8
2101b3c5cdaSKumar Gala				 7800 0 0 2 &ipic 12 8
2111b3c5cdaSKumar Gala				 7800 0 0 3 &ipic 11 8
2121b3c5cdaSKumar Gala				 7800 0 0 4 &ipic 12 8>;
2131b3c5cdaSKumar Gala		interrupt-parent = < &ipic >;
2141b3c5cdaSKumar Gala		interrupts = <42 8>;
2151b3c5cdaSKumar Gala		bus-range = <0 0>;
2161b3c5cdaSKumar Gala		ranges = <02000000 0 90000000 90000000 0 10000000
2171b3c5cdaSKumar Gala			  42000000 0 80000000 80000000 0 10000000
2181b3c5cdaSKumar Gala			  01000000 0 00000000 e2000000 0 00100000>;
2191b3c5cdaSKumar Gala		clock-frequency = <3f940aa>;
2201b3c5cdaSKumar Gala		#interrupt-cells = <1>;
2211b3c5cdaSKumar Gala		#size-cells = <2>;
2221b3c5cdaSKumar Gala		#address-cells = <3>;
2231b3c5cdaSKumar Gala		reg = <e0008500 100>;
2241b3c5cdaSKumar Gala		compatible = "fsl,mpc8349-pci";
2251b3c5cdaSKumar Gala		device_type = "pci";
2261b3c5cdaSKumar Gala	};
227b359049fSKim Phillips};
228