12874c5fdSThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 2c8bf6b52SJohn Bonesio/* 3c8bf6b52SJohn Bonesio * base MPC5200b Device Tree Source 4c8bf6b52SJohn Bonesio * 5c8bf6b52SJohn Bonesio * Copyright (C) 2010 SecretLab 6c8bf6b52SJohn Bonesio * Grant Likely <grant@secretlab.ca> 7c8bf6b52SJohn Bonesio * John Bonesio <bones@secretlab.ca> 8c8bf6b52SJohn Bonesio */ 9c8bf6b52SJohn Bonesio 10c8bf6b52SJohn Bonesio/dts-v1/; 11c8bf6b52SJohn Bonesio 12c8bf6b52SJohn Bonesio/ { 13c8bf6b52SJohn Bonesio model = "fsl,mpc5200b"; 14c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b"; 15c8bf6b52SJohn Bonesio #address-cells = <1>; 16c8bf6b52SJohn Bonesio #size-cells = <1>; 17c8bf6b52SJohn Bonesio interrupt-parent = <&mpc5200_pic>; 18c8bf6b52SJohn Bonesio 19c8bf6b52SJohn Bonesio cpus { 20c8bf6b52SJohn Bonesio #address-cells = <1>; 21c8bf6b52SJohn Bonesio #size-cells = <0>; 22c8bf6b52SJohn Bonesio 23c8bf6b52SJohn Bonesio powerpc: PowerPC,5200@0 { 24c8bf6b52SJohn Bonesio device_type = "cpu"; 25c8bf6b52SJohn Bonesio reg = <0>; 26c8bf6b52SJohn Bonesio d-cache-line-size = <32>; 27c8bf6b52SJohn Bonesio i-cache-line-size = <32>; 28c8bf6b52SJohn Bonesio d-cache-size = <0x4000>; // L1, 16K 29c8bf6b52SJohn Bonesio i-cache-size = <0x4000>; // L1, 16K 30c8bf6b52SJohn Bonesio timebase-frequency = <0>; // from bootloader 31c8bf6b52SJohn Bonesio bus-frequency = <0>; // from bootloader 32c8bf6b52SJohn Bonesio clock-frequency = <0>; // from bootloader 33c8bf6b52SJohn Bonesio }; 34c8bf6b52SJohn Bonesio }; 35c8bf6b52SJohn Bonesio 36c8bf6b52SJohn Bonesio memory: memory { 37c8bf6b52SJohn Bonesio device_type = "memory"; 38c8bf6b52SJohn Bonesio reg = <0x00000000 0x04000000>; // 64MB 39c8bf6b52SJohn Bonesio }; 40c8bf6b52SJohn Bonesio 41c8bf6b52SJohn Bonesio soc: soc5200@f0000000 { 42c8bf6b52SJohn Bonesio #address-cells = <1>; 43c8bf6b52SJohn Bonesio #size-cells = <1>; 44c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-immr"; 45c8bf6b52SJohn Bonesio ranges = <0 0xf0000000 0x0000c000>; 46c8bf6b52SJohn Bonesio reg = <0xf0000000 0x00000100>; 47c8bf6b52SJohn Bonesio bus-frequency = <0>; // from bootloader 48c8bf6b52SJohn Bonesio system-frequency = <0>; // from bootloader 49c8bf6b52SJohn Bonesio 50c8bf6b52SJohn Bonesio cdm@200 { 51c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 52c8bf6b52SJohn Bonesio reg = <0x200 0x38>; 53c8bf6b52SJohn Bonesio }; 54c8bf6b52SJohn Bonesio 55c8bf6b52SJohn Bonesio mpc5200_pic: interrupt-controller@500 { 56c8bf6b52SJohn Bonesio // 5200 interrupts are encoded into two levels; 57c8bf6b52SJohn Bonesio interrupt-controller; 58c8bf6b52SJohn Bonesio #interrupt-cells = <3>; 59c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 60c8bf6b52SJohn Bonesio reg = <0x500 0x80>; 61c8bf6b52SJohn Bonesio }; 62c8bf6b52SJohn Bonesio 634fd0a213SGrant Likely gpt0: timer@600 { // General Purpose Timer 64c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 654fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 66c8bf6b52SJohn Bonesio reg = <0x600 0x10>; 67c8bf6b52SJohn Bonesio interrupts = <1 9 0>; 684fd0a213SGrant Likely // add 'fsl,has-wdt' to enable watchdog 69c8bf6b52SJohn Bonesio }; 70c8bf6b52SJohn Bonesio 714fd0a213SGrant Likely gpt1: timer@610 { // General Purpose Timer 72c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 734fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 74c8bf6b52SJohn Bonesio reg = <0x610 0x10>; 75c8bf6b52SJohn Bonesio interrupts = <1 10 0>; 76c8bf6b52SJohn Bonesio }; 77c8bf6b52SJohn Bonesio 784fd0a213SGrant Likely gpt2: timer@620 { // General Purpose Timer 79c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 804fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 81c8bf6b52SJohn Bonesio reg = <0x620 0x10>; 82c8bf6b52SJohn Bonesio interrupts = <1 11 0>; 83c8bf6b52SJohn Bonesio }; 84c8bf6b52SJohn Bonesio 854fd0a213SGrant Likely gpt3: timer@630 { // General Purpose Timer 86c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 874fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 88c8bf6b52SJohn Bonesio reg = <0x630 0x10>; 89c8bf6b52SJohn Bonesio interrupts = <1 12 0>; 90c8bf6b52SJohn Bonesio }; 91c8bf6b52SJohn Bonesio 924fd0a213SGrant Likely gpt4: timer@640 { // General Purpose Timer 93c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 944fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 95c8bf6b52SJohn Bonesio reg = <0x640 0x10>; 96c8bf6b52SJohn Bonesio interrupts = <1 13 0>; 97c8bf6b52SJohn Bonesio }; 98c8bf6b52SJohn Bonesio 994fd0a213SGrant Likely gpt5: timer@650 { // General Purpose Timer 100c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 1014fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 102c8bf6b52SJohn Bonesio reg = <0x650 0x10>; 103c8bf6b52SJohn Bonesio interrupts = <1 14 0>; 104c8bf6b52SJohn Bonesio }; 105c8bf6b52SJohn Bonesio 1064fd0a213SGrant Likely gpt6: timer@660 { // General Purpose Timer 107c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 1084fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 109c8bf6b52SJohn Bonesio reg = <0x660 0x10>; 110c8bf6b52SJohn Bonesio interrupts = <1 15 0>; 111c8bf6b52SJohn Bonesio }; 112c8bf6b52SJohn Bonesio 1134fd0a213SGrant Likely gpt7: timer@670 { // General Purpose Timer 114c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 1154fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 116c8bf6b52SJohn Bonesio reg = <0x670 0x10>; 117c8bf6b52SJohn Bonesio interrupts = <1 16 0>; 118c8bf6b52SJohn Bonesio }; 119c8bf6b52SJohn Bonesio 120c8bf6b52SJohn Bonesio rtc@800 { // Real time clock 121c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 122c8bf6b52SJohn Bonesio reg = <0x800 0x100>; 123c8bf6b52SJohn Bonesio interrupts = <1 5 0 1 6 0>; 124c8bf6b52SJohn Bonesio }; 125c8bf6b52SJohn Bonesio 126c8bf6b52SJohn Bonesio can@900 { 127c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 128c8bf6b52SJohn Bonesio interrupts = <2 17 0>; 129c8bf6b52SJohn Bonesio reg = <0x900 0x80>; 130c8bf6b52SJohn Bonesio }; 131c8bf6b52SJohn Bonesio 132c8bf6b52SJohn Bonesio can@980 { 133c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 134c8bf6b52SJohn Bonesio interrupts = <2 18 0>; 135c8bf6b52SJohn Bonesio reg = <0x980 0x80>; 136c8bf6b52SJohn Bonesio }; 137c8bf6b52SJohn Bonesio 138c8bf6b52SJohn Bonesio gpio_simple: gpio@b00 { 139c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 140c8bf6b52SJohn Bonesio reg = <0xb00 0x40>; 141c8bf6b52SJohn Bonesio interrupts = <1 7 0>; 142c8bf6b52SJohn Bonesio gpio-controller; 143c8bf6b52SJohn Bonesio #gpio-cells = <2>; 144c8bf6b52SJohn Bonesio }; 145c8bf6b52SJohn Bonesio 146c8bf6b52SJohn Bonesio gpio_wkup: gpio@c00 { 147c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 148c8bf6b52SJohn Bonesio reg = <0xc00 0x40>; 149c8bf6b52SJohn Bonesio interrupts = <1 8 0 0 3 0>; 150c8bf6b52SJohn Bonesio gpio-controller; 151c8bf6b52SJohn Bonesio #gpio-cells = <2>; 152c8bf6b52SJohn Bonesio }; 153c8bf6b52SJohn Bonesio 154c8bf6b52SJohn Bonesio spi@f00 { 1556cf1d0b8SAnatolij Gustschin #address-cells = <1>; 1566cf1d0b8SAnatolij Gustschin #size-cells = <0>; 157c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 158c8bf6b52SJohn Bonesio reg = <0xf00 0x20>; 159c8bf6b52SJohn Bonesio interrupts = <2 13 0 2 14 0>; 160c8bf6b52SJohn Bonesio }; 161c8bf6b52SJohn Bonesio 162c8bf6b52SJohn Bonesio usb: usb@1000 { 163c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 164c8bf6b52SJohn Bonesio reg = <0x1000 0xff>; 165c8bf6b52SJohn Bonesio interrupts = <2 6 0>; 166c8bf6b52SJohn Bonesio }; 167c8bf6b52SJohn Bonesio 168c8bf6b52SJohn Bonesio dma-controller@1200 { 169c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 170c8bf6b52SJohn Bonesio reg = <0x1200 0x80>; 171c8bf6b52SJohn Bonesio interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 172c8bf6b52SJohn Bonesio 3 4 0 3 5 0 3 6 0 3 7 0 173c8bf6b52SJohn Bonesio 3 8 0 3 9 0 3 10 0 3 11 0 174c8bf6b52SJohn Bonesio 3 12 0 3 13 0 3 14 0 3 15 0>; 175c8bf6b52SJohn Bonesio }; 176c8bf6b52SJohn Bonesio 177c8bf6b52SJohn Bonesio xlb@1f00 { 178c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; 179c8bf6b52SJohn Bonesio reg = <0x1f00 0x100>; 180c8bf6b52SJohn Bonesio }; 181c8bf6b52SJohn Bonesio 182c8bf6b52SJohn Bonesio psc1: psc@2000 { // PSC1 183c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 184c8bf6b52SJohn Bonesio reg = <0x2000 0x100>; 185c8bf6b52SJohn Bonesio interrupts = <2 1 0>; 186c8bf6b52SJohn Bonesio }; 187c8bf6b52SJohn Bonesio 188c8bf6b52SJohn Bonesio psc2: psc@2200 { // PSC2 189c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 190c8bf6b52SJohn Bonesio reg = <0x2200 0x100>; 191c8bf6b52SJohn Bonesio interrupts = <2 2 0>; 192c8bf6b52SJohn Bonesio }; 193c8bf6b52SJohn Bonesio 194c8bf6b52SJohn Bonesio psc3: psc@2400 { // PSC3 195c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 196c8bf6b52SJohn Bonesio reg = <0x2400 0x100>; 197c8bf6b52SJohn Bonesio interrupts = <2 3 0>; 198c8bf6b52SJohn Bonesio }; 199c8bf6b52SJohn Bonesio 200c8bf6b52SJohn Bonesio psc4: psc@2600 { // PSC4 201c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 202c8bf6b52SJohn Bonesio reg = <0x2600 0x100>; 203c8bf6b52SJohn Bonesio interrupts = <2 11 0>; 204c8bf6b52SJohn Bonesio }; 205c8bf6b52SJohn Bonesio 206c8bf6b52SJohn Bonesio psc5: psc@2800 { // PSC5 207c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 208c8bf6b52SJohn Bonesio reg = <0x2800 0x100>; 209c8bf6b52SJohn Bonesio interrupts = <2 12 0>; 210c8bf6b52SJohn Bonesio }; 211c8bf6b52SJohn Bonesio 212c8bf6b52SJohn Bonesio psc6: psc@2c00 { // PSC6 213c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 214c8bf6b52SJohn Bonesio reg = <0x2c00 0x100>; 215c8bf6b52SJohn Bonesio interrupts = <2 4 0>; 216c8bf6b52SJohn Bonesio }; 217c8bf6b52SJohn Bonesio 218c8bf6b52SJohn Bonesio eth0: ethernet@3000 { 219c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 220c8bf6b52SJohn Bonesio reg = <0x3000 0x400>; 221c8bf6b52SJohn Bonesio local-mac-address = [ 00 00 00 00 00 00 ]; 222c8bf6b52SJohn Bonesio interrupts = <2 5 0>; 223c8bf6b52SJohn Bonesio }; 224c8bf6b52SJohn Bonesio 225c8bf6b52SJohn Bonesio mdio@3000 { 226c8bf6b52SJohn Bonesio #address-cells = <1>; 227c8bf6b52SJohn Bonesio #size-cells = <0>; 228c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 229c8bf6b52SJohn Bonesio reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 230c8bf6b52SJohn Bonesio interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 231c8bf6b52SJohn Bonesio }; 232c8bf6b52SJohn Bonesio 233c8bf6b52SJohn Bonesio ata@3a00 { 234c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 235c8bf6b52SJohn Bonesio reg = <0x3a00 0x100>; 236c8bf6b52SJohn Bonesio interrupts = <2 7 0>; 237c8bf6b52SJohn Bonesio }; 238c8bf6b52SJohn Bonesio 2397dfb736eSAnatolij Gustschin sclpc@3c00 { 2407dfb736eSAnatolij Gustschin compatible = "fsl,mpc5200-lpbfifo"; 2417dfb736eSAnatolij Gustschin reg = <0x3c00 0x60>; 2427dfb736eSAnatolij Gustschin interrupts = <2 23 0>; 2437dfb736eSAnatolij Gustschin }; 2447dfb736eSAnatolij Gustschin 245c8bf6b52SJohn Bonesio i2c@3d00 { 246c8bf6b52SJohn Bonesio #address-cells = <1>; 247c8bf6b52SJohn Bonesio #size-cells = <0>; 248c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 249c8bf6b52SJohn Bonesio reg = <0x3d00 0x40>; 250c8bf6b52SJohn Bonesio interrupts = <2 15 0>; 251c8bf6b52SJohn Bonesio }; 252c8bf6b52SJohn Bonesio 253c8bf6b52SJohn Bonesio i2c@3d40 { 254c8bf6b52SJohn Bonesio #address-cells = <1>; 255c8bf6b52SJohn Bonesio #size-cells = <0>; 256c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 257c8bf6b52SJohn Bonesio reg = <0x3d40 0x40>; 258c8bf6b52SJohn Bonesio interrupts = <2 16 0>; 259c8bf6b52SJohn Bonesio }; 260c8bf6b52SJohn Bonesio 261c8bf6b52SJohn Bonesio sram@8000 { 262c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; 263c8bf6b52SJohn Bonesio reg = <0x8000 0x4000>; 264c8bf6b52SJohn Bonesio }; 265c8bf6b52SJohn Bonesio }; 266c8bf6b52SJohn Bonesio 267c8bf6b52SJohn Bonesio pci: pci@f0000d00 { 268c8bf6b52SJohn Bonesio #interrupt-cells = <1>; 269c8bf6b52SJohn Bonesio #size-cells = <2>; 270c8bf6b52SJohn Bonesio #address-cells = <3>; 271c8bf6b52SJohn Bonesio device_type = "pci"; 272c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; 273c8bf6b52SJohn Bonesio reg = <0xf0000d00 0x100>; 274c8bf6b52SJohn Bonesio // interrupt-map-mask = need to add 275c8bf6b52SJohn Bonesio // interrupt-map = need to add 276c8bf6b52SJohn Bonesio clock-frequency = <0>; // From boot loader 277c8bf6b52SJohn Bonesio interrupts = <2 8 0 2 9 0 2 10 0>; 278c8bf6b52SJohn Bonesio bus-range = <0 0>; 279*e9efabc6SAnatolij Gustschin ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000>, 280*e9efabc6SAnatolij Gustschin <0x02000000 0 0x90000000 0x90000000 0 0x10000000>, 281*e9efabc6SAnatolij Gustschin <0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; 282c8bf6b52SJohn Bonesio }; 283c8bf6b52SJohn Bonesio 284c8bf6b52SJohn Bonesio localbus: localbus { 285c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; 286c8bf6b52SJohn Bonesio #address-cells = <2>; 287c8bf6b52SJohn Bonesio #size-cells = <1>; 288c8bf6b52SJohn Bonesio ranges = <0 0 0xfc000000 0x2000000>; 289c8bf6b52SJohn Bonesio }; 290c8bf6b52SJohn Bonesio}; 291