1c8bf6b52SJohn Bonesio/* 2c8bf6b52SJohn Bonesio * base MPC5200b Device Tree Source 3c8bf6b52SJohn Bonesio * 4c8bf6b52SJohn Bonesio * Copyright (C) 2010 SecretLab 5c8bf6b52SJohn Bonesio * Grant Likely <grant@secretlab.ca> 6c8bf6b52SJohn Bonesio * John Bonesio <bones@secretlab.ca> 7c8bf6b52SJohn Bonesio * 8c8bf6b52SJohn Bonesio * This program is free software; you can redistribute it and/or modify it 9c8bf6b52SJohn Bonesio * under the terms of the GNU General Public License as published by the 10c8bf6b52SJohn Bonesio * Free Software Foundation; either version 2 of the License, or (at your 11c8bf6b52SJohn Bonesio * option) any later version. 12c8bf6b52SJohn Bonesio */ 13c8bf6b52SJohn Bonesio 14c8bf6b52SJohn Bonesio/dts-v1/; 15c8bf6b52SJohn Bonesio 16c8bf6b52SJohn Bonesio/ { 17c8bf6b52SJohn Bonesio model = "fsl,mpc5200b"; 18c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b"; 19c8bf6b52SJohn Bonesio #address-cells = <1>; 20c8bf6b52SJohn Bonesio #size-cells = <1>; 21c8bf6b52SJohn Bonesio interrupt-parent = <&mpc5200_pic>; 22c8bf6b52SJohn Bonesio 23c8bf6b52SJohn Bonesio cpus { 24c8bf6b52SJohn Bonesio #address-cells = <1>; 25c8bf6b52SJohn Bonesio #size-cells = <0>; 26c8bf6b52SJohn Bonesio 27c8bf6b52SJohn Bonesio powerpc: PowerPC,5200@0 { 28c8bf6b52SJohn Bonesio device_type = "cpu"; 29c8bf6b52SJohn Bonesio reg = <0>; 30c8bf6b52SJohn Bonesio d-cache-line-size = <32>; 31c8bf6b52SJohn Bonesio i-cache-line-size = <32>; 32c8bf6b52SJohn Bonesio d-cache-size = <0x4000>; // L1, 16K 33c8bf6b52SJohn Bonesio i-cache-size = <0x4000>; // L1, 16K 34c8bf6b52SJohn Bonesio timebase-frequency = <0>; // from bootloader 35c8bf6b52SJohn Bonesio bus-frequency = <0>; // from bootloader 36c8bf6b52SJohn Bonesio clock-frequency = <0>; // from bootloader 37c8bf6b52SJohn Bonesio }; 38c8bf6b52SJohn Bonesio }; 39c8bf6b52SJohn Bonesio 40c8bf6b52SJohn Bonesio memory: memory { 41c8bf6b52SJohn Bonesio device_type = "memory"; 42c8bf6b52SJohn Bonesio reg = <0x00000000 0x04000000>; // 64MB 43c8bf6b52SJohn Bonesio }; 44c8bf6b52SJohn Bonesio 45c8bf6b52SJohn Bonesio soc: soc5200@f0000000 { 46c8bf6b52SJohn Bonesio #address-cells = <1>; 47c8bf6b52SJohn Bonesio #size-cells = <1>; 48c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-immr"; 49c8bf6b52SJohn Bonesio ranges = <0 0xf0000000 0x0000c000>; 50c8bf6b52SJohn Bonesio reg = <0xf0000000 0x00000100>; 51c8bf6b52SJohn Bonesio bus-frequency = <0>; // from bootloader 52c8bf6b52SJohn Bonesio system-frequency = <0>; // from bootloader 53c8bf6b52SJohn Bonesio 54c8bf6b52SJohn Bonesio cdm@200 { 55c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 56c8bf6b52SJohn Bonesio reg = <0x200 0x38>; 57c8bf6b52SJohn Bonesio }; 58c8bf6b52SJohn Bonesio 59c8bf6b52SJohn Bonesio mpc5200_pic: interrupt-controller@500 { 60c8bf6b52SJohn Bonesio // 5200 interrupts are encoded into two levels; 61c8bf6b52SJohn Bonesio interrupt-controller; 62c8bf6b52SJohn Bonesio #interrupt-cells = <3>; 63c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 64c8bf6b52SJohn Bonesio reg = <0x500 0x80>; 65c8bf6b52SJohn Bonesio }; 66c8bf6b52SJohn Bonesio 674fd0a213SGrant Likely gpt0: timer@600 { // General Purpose Timer 68c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 694fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 70c8bf6b52SJohn Bonesio reg = <0x600 0x10>; 71c8bf6b52SJohn Bonesio interrupts = <1 9 0>; 724fd0a213SGrant Likely // add 'fsl,has-wdt' to enable watchdog 73c8bf6b52SJohn Bonesio }; 74c8bf6b52SJohn Bonesio 754fd0a213SGrant Likely gpt1: timer@610 { // General Purpose Timer 76c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 774fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 78c8bf6b52SJohn Bonesio reg = <0x610 0x10>; 79c8bf6b52SJohn Bonesio interrupts = <1 10 0>; 80c8bf6b52SJohn Bonesio }; 81c8bf6b52SJohn Bonesio 824fd0a213SGrant Likely gpt2: timer@620 { // General Purpose Timer 83c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 844fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 85c8bf6b52SJohn Bonesio reg = <0x620 0x10>; 86c8bf6b52SJohn Bonesio interrupts = <1 11 0>; 87c8bf6b52SJohn Bonesio }; 88c8bf6b52SJohn Bonesio 894fd0a213SGrant Likely gpt3: timer@630 { // General Purpose Timer 90c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 914fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 92c8bf6b52SJohn Bonesio reg = <0x630 0x10>; 93c8bf6b52SJohn Bonesio interrupts = <1 12 0>; 94c8bf6b52SJohn Bonesio }; 95c8bf6b52SJohn Bonesio 964fd0a213SGrant Likely gpt4: timer@640 { // General Purpose Timer 97c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 984fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 99c8bf6b52SJohn Bonesio reg = <0x640 0x10>; 100c8bf6b52SJohn Bonesio interrupts = <1 13 0>; 101c8bf6b52SJohn Bonesio }; 102c8bf6b52SJohn Bonesio 1034fd0a213SGrant Likely gpt5: timer@650 { // General Purpose Timer 104c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 1054fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 106c8bf6b52SJohn Bonesio reg = <0x650 0x10>; 107c8bf6b52SJohn Bonesio interrupts = <1 14 0>; 108c8bf6b52SJohn Bonesio }; 109c8bf6b52SJohn Bonesio 1104fd0a213SGrant Likely gpt6: timer@660 { // General Purpose Timer 111c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 1124fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 113c8bf6b52SJohn Bonesio reg = <0x660 0x10>; 114c8bf6b52SJohn Bonesio interrupts = <1 15 0>; 115c8bf6b52SJohn Bonesio }; 116c8bf6b52SJohn Bonesio 1174fd0a213SGrant Likely gpt7: timer@670 { // General Purpose Timer 118c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 1194fd0a213SGrant Likely #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode 120c8bf6b52SJohn Bonesio reg = <0x670 0x10>; 121c8bf6b52SJohn Bonesio interrupts = <1 16 0>; 122c8bf6b52SJohn Bonesio }; 123c8bf6b52SJohn Bonesio 124c8bf6b52SJohn Bonesio rtc@800 { // Real time clock 125c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 126c8bf6b52SJohn Bonesio reg = <0x800 0x100>; 127c8bf6b52SJohn Bonesio interrupts = <1 5 0 1 6 0>; 128c8bf6b52SJohn Bonesio }; 129c8bf6b52SJohn Bonesio 130c8bf6b52SJohn Bonesio can@900 { 131c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 132c8bf6b52SJohn Bonesio interrupts = <2 17 0>; 133c8bf6b52SJohn Bonesio reg = <0x900 0x80>; 134c8bf6b52SJohn Bonesio }; 135c8bf6b52SJohn Bonesio 136c8bf6b52SJohn Bonesio can@980 { 137c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 138c8bf6b52SJohn Bonesio interrupts = <2 18 0>; 139c8bf6b52SJohn Bonesio reg = <0x980 0x80>; 140c8bf6b52SJohn Bonesio }; 141c8bf6b52SJohn Bonesio 142c8bf6b52SJohn Bonesio gpio_simple: gpio@b00 { 143c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 144c8bf6b52SJohn Bonesio reg = <0xb00 0x40>; 145c8bf6b52SJohn Bonesio interrupts = <1 7 0>; 146c8bf6b52SJohn Bonesio gpio-controller; 147c8bf6b52SJohn Bonesio #gpio-cells = <2>; 148c8bf6b52SJohn Bonesio }; 149c8bf6b52SJohn Bonesio 150c8bf6b52SJohn Bonesio gpio_wkup: gpio@c00 { 151c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 152c8bf6b52SJohn Bonesio reg = <0xc00 0x40>; 153c8bf6b52SJohn Bonesio interrupts = <1 8 0 0 3 0>; 154c8bf6b52SJohn Bonesio gpio-controller; 155c8bf6b52SJohn Bonesio #gpio-cells = <2>; 156c8bf6b52SJohn Bonesio }; 157c8bf6b52SJohn Bonesio 158c8bf6b52SJohn Bonesio spi@f00 { 1596cf1d0b8SAnatolij Gustschin #address-cells = <1>; 1606cf1d0b8SAnatolij Gustschin #size-cells = <0>; 161c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 162c8bf6b52SJohn Bonesio reg = <0xf00 0x20>; 163c8bf6b52SJohn Bonesio interrupts = <2 13 0 2 14 0>; 164c8bf6b52SJohn Bonesio }; 165c8bf6b52SJohn Bonesio 166c8bf6b52SJohn Bonesio usb: usb@1000 { 167c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 168c8bf6b52SJohn Bonesio reg = <0x1000 0xff>; 169c8bf6b52SJohn Bonesio interrupts = <2 6 0>; 170c8bf6b52SJohn Bonesio }; 171c8bf6b52SJohn Bonesio 172c8bf6b52SJohn Bonesio dma-controller@1200 { 173c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 174c8bf6b52SJohn Bonesio reg = <0x1200 0x80>; 175c8bf6b52SJohn Bonesio interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 176c8bf6b52SJohn Bonesio 3 4 0 3 5 0 3 6 0 3 7 0 177c8bf6b52SJohn Bonesio 3 8 0 3 9 0 3 10 0 3 11 0 178c8bf6b52SJohn Bonesio 3 12 0 3 13 0 3 14 0 3 15 0>; 179c8bf6b52SJohn Bonesio }; 180c8bf6b52SJohn Bonesio 181c8bf6b52SJohn Bonesio xlb@1f00 { 182c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; 183c8bf6b52SJohn Bonesio reg = <0x1f00 0x100>; 184c8bf6b52SJohn Bonesio }; 185c8bf6b52SJohn Bonesio 186c8bf6b52SJohn Bonesio psc1: psc@2000 { // PSC1 187c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 188c8bf6b52SJohn Bonesio reg = <0x2000 0x100>; 189c8bf6b52SJohn Bonesio interrupts = <2 1 0>; 190c8bf6b52SJohn Bonesio }; 191c8bf6b52SJohn Bonesio 192c8bf6b52SJohn Bonesio psc2: psc@2200 { // PSC2 193c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 194c8bf6b52SJohn Bonesio reg = <0x2200 0x100>; 195c8bf6b52SJohn Bonesio interrupts = <2 2 0>; 196c8bf6b52SJohn Bonesio }; 197c8bf6b52SJohn Bonesio 198c8bf6b52SJohn Bonesio psc3: psc@2400 { // PSC3 199c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 200c8bf6b52SJohn Bonesio reg = <0x2400 0x100>; 201c8bf6b52SJohn Bonesio interrupts = <2 3 0>; 202c8bf6b52SJohn Bonesio }; 203c8bf6b52SJohn Bonesio 204c8bf6b52SJohn Bonesio psc4: psc@2600 { // PSC4 205c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 206c8bf6b52SJohn Bonesio reg = <0x2600 0x100>; 207c8bf6b52SJohn Bonesio interrupts = <2 11 0>; 208c8bf6b52SJohn Bonesio }; 209c8bf6b52SJohn Bonesio 210c8bf6b52SJohn Bonesio psc5: psc@2800 { // PSC5 211c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 212c8bf6b52SJohn Bonesio reg = <0x2800 0x100>; 213c8bf6b52SJohn Bonesio interrupts = <2 12 0>; 214c8bf6b52SJohn Bonesio }; 215c8bf6b52SJohn Bonesio 216c8bf6b52SJohn Bonesio psc6: psc@2c00 { // PSC6 217c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; 218c8bf6b52SJohn Bonesio reg = <0x2c00 0x100>; 219c8bf6b52SJohn Bonesio interrupts = <2 4 0>; 220c8bf6b52SJohn Bonesio }; 221c8bf6b52SJohn Bonesio 222c8bf6b52SJohn Bonesio eth0: ethernet@3000 { 223c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 224c8bf6b52SJohn Bonesio reg = <0x3000 0x400>; 225c8bf6b52SJohn Bonesio local-mac-address = [ 00 00 00 00 00 00 ]; 226c8bf6b52SJohn Bonesio interrupts = <2 5 0>; 227c8bf6b52SJohn Bonesio }; 228c8bf6b52SJohn Bonesio 229c8bf6b52SJohn Bonesio mdio@3000 { 230c8bf6b52SJohn Bonesio #address-cells = <1>; 231c8bf6b52SJohn Bonesio #size-cells = <0>; 232c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 233c8bf6b52SJohn Bonesio reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 234c8bf6b52SJohn Bonesio interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 235c8bf6b52SJohn Bonesio }; 236c8bf6b52SJohn Bonesio 237c8bf6b52SJohn Bonesio ata@3a00 { 238c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 239c8bf6b52SJohn Bonesio reg = <0x3a00 0x100>; 240c8bf6b52SJohn Bonesio interrupts = <2 7 0>; 241c8bf6b52SJohn Bonesio }; 242c8bf6b52SJohn Bonesio 2437dfb736eSAnatolij Gustschin sclpc@3c00 { 2447dfb736eSAnatolij Gustschin compatible = "fsl,mpc5200-lpbfifo"; 2457dfb736eSAnatolij Gustschin reg = <0x3c00 0x60>; 2467dfb736eSAnatolij Gustschin interrupts = <2 23 0>; 2477dfb736eSAnatolij Gustschin }; 2487dfb736eSAnatolij Gustschin 249c8bf6b52SJohn Bonesio i2c@3d00 { 250c8bf6b52SJohn Bonesio #address-cells = <1>; 251c8bf6b52SJohn Bonesio #size-cells = <0>; 252c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 253c8bf6b52SJohn Bonesio reg = <0x3d00 0x40>; 254c8bf6b52SJohn Bonesio interrupts = <2 15 0>; 255c8bf6b52SJohn Bonesio }; 256c8bf6b52SJohn Bonesio 257c8bf6b52SJohn Bonesio i2c@3d40 { 258c8bf6b52SJohn Bonesio #address-cells = <1>; 259c8bf6b52SJohn Bonesio #size-cells = <0>; 260c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 261c8bf6b52SJohn Bonesio reg = <0x3d40 0x40>; 262c8bf6b52SJohn Bonesio interrupts = <2 16 0>; 263c8bf6b52SJohn Bonesio }; 264c8bf6b52SJohn Bonesio 265c8bf6b52SJohn Bonesio sram@8000 { 266c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; 267c8bf6b52SJohn Bonesio reg = <0x8000 0x4000>; 268c8bf6b52SJohn Bonesio }; 269c8bf6b52SJohn Bonesio }; 270c8bf6b52SJohn Bonesio 271c8bf6b52SJohn Bonesio pci: pci@f0000d00 { 272c8bf6b52SJohn Bonesio #interrupt-cells = <1>; 273c8bf6b52SJohn Bonesio #size-cells = <2>; 274c8bf6b52SJohn Bonesio #address-cells = <3>; 275c8bf6b52SJohn Bonesio device_type = "pci"; 276c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; 277c8bf6b52SJohn Bonesio reg = <0xf0000d00 0x100>; 278c8bf6b52SJohn Bonesio // interrupt-map-mask = need to add 279c8bf6b52SJohn Bonesio // interrupt-map = need to add 280c8bf6b52SJohn Bonesio clock-frequency = <0>; // From boot loader 281c8bf6b52SJohn Bonesio interrupts = <2 8 0 2 9 0 2 10 0>; 282c8bf6b52SJohn Bonesio bus-range = <0 0>; 283c8bf6b52SJohn Bonesio // ranges = need to add 284c8bf6b52SJohn Bonesio }; 285c8bf6b52SJohn Bonesio 286c8bf6b52SJohn Bonesio localbus: localbus { 287c8bf6b52SJohn Bonesio compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; 288c8bf6b52SJohn Bonesio #address-cells = <2>; 289c8bf6b52SJohn Bonesio #size-cells = <1>; 290c8bf6b52SJohn Bonesio ranges = <0 0 0xfc000000 0x2000000>; 291c8bf6b52SJohn Bonesio }; 292c8bf6b52SJohn Bonesio}; 293