1a9b6aae4SMatteo Facchinetti/* 2a9b6aae4SMatteo Facchinetti * STx/Freescale ADS5125 MPC5125 silicon 3a9b6aae4SMatteo Facchinetti * 4a9b6aae4SMatteo Facchinetti * Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved. 5a9b6aae4SMatteo Facchinetti * 6a9b6aae4SMatteo Facchinetti * Reworked by Matteo Facchinetti (engineering@sirius-es.it) 7a9b6aae4SMatteo Facchinetti * Copyright (C) 2013 Sirius Electronic Systems 8a9b6aae4SMatteo Facchinetti * 9a9b6aae4SMatteo Facchinetti * This program is free software; you can redistribute it and/or modify it 10a9b6aae4SMatteo Facchinetti * under the terms of the GNU General Public License as published by the 11a9b6aae4SMatteo Facchinetti * Free Software Foundation; either version 2 of the License, or (at your 12a9b6aae4SMatteo Facchinetti * option) any later version. 13a9b6aae4SMatteo Facchinetti */ 14a9b6aae4SMatteo Facchinetti 15a9b6aae4SMatteo Facchinetti/dts-v1/; 16a9b6aae4SMatteo Facchinetti 17a9b6aae4SMatteo Facchinetti/ { 18a9b6aae4SMatteo Facchinetti model = "mpc5125twr"; // In BSP "mpc5125ads" 19a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125ads", "fsl,mpc5125"; 20a9b6aae4SMatteo Facchinetti #address-cells = <1>; 21a9b6aae4SMatteo Facchinetti #size-cells = <1>; 22a9b6aae4SMatteo Facchinetti interrupt-parent = <&ipic>; 23a9b6aae4SMatteo Facchinetti 24a9b6aae4SMatteo Facchinetti aliases { 25a9b6aae4SMatteo Facchinetti gpio0 = &gpio0; 26a9b6aae4SMatteo Facchinetti gpio1 = &gpio1; 27a9b6aae4SMatteo Facchinetti ethernet0 = ð0; 28a9b6aae4SMatteo Facchinetti }; 29a9b6aae4SMatteo Facchinetti 30a9b6aae4SMatteo Facchinetti cpus { 31a9b6aae4SMatteo Facchinetti #address-cells = <1>; 32a9b6aae4SMatteo Facchinetti #size-cells = <0>; 33a9b6aae4SMatteo Facchinetti 34a9b6aae4SMatteo Facchinetti PowerPC,5125@0 { 35a9b6aae4SMatteo Facchinetti device_type = "cpu"; 36a9b6aae4SMatteo Facchinetti reg = <0>; 37a9b6aae4SMatteo Facchinetti d-cache-line-size = <0x20>; // 32 bytes 38a9b6aae4SMatteo Facchinetti i-cache-line-size = <0x20>; // 32 bytes 39a9b6aae4SMatteo Facchinetti d-cache-size = <0x8000>; // L1, 32K 40a9b6aae4SMatteo Facchinetti i-cache-size = <0x8000>; // L1, 32K 41a9b6aae4SMatteo Facchinetti timebase-frequency = <49500000>;// 49.5 MHz (csb/4) 42a9b6aae4SMatteo Facchinetti bus-frequency = <198000000>; // 198 MHz csb bus 43a9b6aae4SMatteo Facchinetti clock-frequency = <396000000>; // 396 MHz ppc core 44a9b6aae4SMatteo Facchinetti }; 45a9b6aae4SMatteo Facchinetti }; 46a9b6aae4SMatteo Facchinetti 47a9b6aae4SMatteo Facchinetti memory { 48a9b6aae4SMatteo Facchinetti device_type = "memory"; 49a9b6aae4SMatteo Facchinetti reg = <0x00000000 0x10000000>; // 256MB at 0 50a9b6aae4SMatteo Facchinetti }; 51a9b6aae4SMatteo Facchinetti 52a9b6aae4SMatteo Facchinetti sram@30000000 { 53a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-sram"; 54a9b6aae4SMatteo Facchinetti reg = <0x30000000 0x08000>; // 32K at 0x30000000 55a9b6aae4SMatteo Facchinetti }; 56a9b6aae4SMatteo Facchinetti 57a9b6aae4SMatteo Facchinetti soc@80000000 { 58a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-immr"; 59a9b6aae4SMatteo Facchinetti #address-cells = <1>; 60a9b6aae4SMatteo Facchinetti #size-cells = <1>; 61a9b6aae4SMatteo Facchinetti #interrupt-cells = <2>; 62a9b6aae4SMatteo Facchinetti ranges = <0x0 0x80000000 0x400000>; 63a9b6aae4SMatteo Facchinetti reg = <0x80000000 0x400000>; 64a9b6aae4SMatteo Facchinetti bus-frequency = <66000000>; // 66 MHz ips bus 65a9b6aae4SMatteo Facchinetti 66a9b6aae4SMatteo Facchinetti // IPIC 67a9b6aae4SMatteo Facchinetti // interrupts cell = <intr #, sense> 68a9b6aae4SMatteo Facchinetti // sense values match linux IORESOURCE_IRQ_* defines: 69a9b6aae4SMatteo Facchinetti // sense == 8: Level, low assertion 70a9b6aae4SMatteo Facchinetti // sense == 2: Edge, high-to-low change 71a9b6aae4SMatteo Facchinetti // 72a9b6aae4SMatteo Facchinetti ipic: interrupt-controller@c00 { 73a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-ipic", "fsl,ipic"; 74a9b6aae4SMatteo Facchinetti interrupt-controller; 75a9b6aae4SMatteo Facchinetti #address-cells = <0>; 76a9b6aae4SMatteo Facchinetti #interrupt-cells = <2>; 77a9b6aae4SMatteo Facchinetti reg = <0xc00 0x100>; 78a9b6aae4SMatteo Facchinetti }; 79a9b6aae4SMatteo Facchinetti 80a9b6aae4SMatteo Facchinetti rtc@a00 { // Real time clock 81a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-rtc"; 82a9b6aae4SMatteo Facchinetti reg = <0xa00 0x100>; 83a9b6aae4SMatteo Facchinetti interrupts = <79 0x8 80 0x8>; 84a9b6aae4SMatteo Facchinetti }; 85a9b6aae4SMatteo Facchinetti 86a9b6aae4SMatteo Facchinetti reset@e00 { // Reset module 87a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125-reset"; 88a9b6aae4SMatteo Facchinetti reg = <0xe00 0x100>; 89a9b6aae4SMatteo Facchinetti }; 90a9b6aae4SMatteo Facchinetti 91a9b6aae4SMatteo Facchinetti clock@f00 { // Clock control 92a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-clock"; 93a9b6aae4SMatteo Facchinetti reg = <0xf00 0x100>; 94a9b6aae4SMatteo Facchinetti }; 95a9b6aae4SMatteo Facchinetti 96a9b6aae4SMatteo Facchinetti pmc@1000{ // Power Management Controller 97a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-pmc"; 98a9b6aae4SMatteo Facchinetti reg = <0x1000 0x100>; 99a9b6aae4SMatteo Facchinetti interrupts = <83 0x2>; 100a9b6aae4SMatteo Facchinetti }; 101a9b6aae4SMatteo Facchinetti 102a9b6aae4SMatteo Facchinetti gpio0: gpio@1100 { 103a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125-gpio"; 104a9b6aae4SMatteo Facchinetti reg = <0x1100 0x080>; 105a9b6aae4SMatteo Facchinetti interrupts = <78 0x8>; 106a9b6aae4SMatteo Facchinetti }; 107a9b6aae4SMatteo Facchinetti 108a9b6aae4SMatteo Facchinetti gpio1: gpio@1180 { 109a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125-gpio"; 110a9b6aae4SMatteo Facchinetti reg = <0x1180 0x080>; 111a9b6aae4SMatteo Facchinetti interrupts = <86 0x8>; 112a9b6aae4SMatteo Facchinetti }; 113a9b6aae4SMatteo Facchinetti 114a9b6aae4SMatteo Facchinetti can@1300 { // CAN rev.2 115a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-mscan"; 116a9b6aae4SMatteo Facchinetti interrupts = <12 0x8>; 117a9b6aae4SMatteo Facchinetti reg = <0x1300 0x80>; 118a9b6aae4SMatteo Facchinetti }; 119a9b6aae4SMatteo Facchinetti 120a9b6aae4SMatteo Facchinetti can@1380 { 121a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-mscan"; 122a9b6aae4SMatteo Facchinetti interrupts = <13 0x8>; 123a9b6aae4SMatteo Facchinetti reg = <0x1380 0x80>; 124a9b6aae4SMatteo Facchinetti }; 125a9b6aae4SMatteo Facchinetti 126a9b6aae4SMatteo Facchinetti sdhc@1500 { 127a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-sdhc"; 128a9b6aae4SMatteo Facchinetti interrupts = <8 0x8>; 129a9b6aae4SMatteo Facchinetti reg = <0x1500 0x100>; 130a9b6aae4SMatteo Facchinetti }; 131a9b6aae4SMatteo Facchinetti 132a9b6aae4SMatteo Facchinetti i2c@1700 { 133a9b6aae4SMatteo Facchinetti #address-cells = <1>; 134a9b6aae4SMatteo Facchinetti #size-cells = <0>; 135a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 136a9b6aae4SMatteo Facchinetti reg = <0x1700 0x20>; 137a9b6aae4SMatteo Facchinetti interrupts = <0x9 0x8>; 138a9b6aae4SMatteo Facchinetti }; 139a9b6aae4SMatteo Facchinetti 140a9b6aae4SMatteo Facchinetti i2c@1720 { 141a9b6aae4SMatteo Facchinetti #address-cells = <1>; 142a9b6aae4SMatteo Facchinetti #size-cells = <0>; 143a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 144a9b6aae4SMatteo Facchinetti reg = <0x1720 0x20>; 145a9b6aae4SMatteo Facchinetti interrupts = <0xa 0x8>; 146a9b6aae4SMatteo Facchinetti }; 147a9b6aae4SMatteo Facchinetti 148a9b6aae4SMatteo Facchinetti i2c@1740 { 149a9b6aae4SMatteo Facchinetti #address-cells = <1>; 150a9b6aae4SMatteo Facchinetti #size-cells = <0>; 151a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 152a9b6aae4SMatteo Facchinetti reg = <0x1740 0x20>; 153a9b6aae4SMatteo Facchinetti interrupts = <0xb 0x8>; 154a9b6aae4SMatteo Facchinetti }; 155a9b6aae4SMatteo Facchinetti 156a9b6aae4SMatteo Facchinetti i2ccontrol@1760 { 157a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-i2c-ctrl"; 158a9b6aae4SMatteo Facchinetti reg = <0x1760 0x8>; 159a9b6aae4SMatteo Facchinetti }; 160a9b6aae4SMatteo Facchinetti 161a9b6aae4SMatteo Facchinetti diu@2100 { 162a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-diu"; 163a9b6aae4SMatteo Facchinetti reg = <0x2100 0x100>; 164a9b6aae4SMatteo Facchinetti interrupts = <64 0x8>; 165a9b6aae4SMatteo Facchinetti }; 166a9b6aae4SMatteo Facchinetti 167a9b6aae4SMatteo Facchinetti mdio@2800 { 168a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-fec-mdio"; 169a9b6aae4SMatteo Facchinetti reg = <0x2800 0x800>; 170a9b6aae4SMatteo Facchinetti #address-cells = <1>; 171a9b6aae4SMatteo Facchinetti #size-cells = <0>; 172a9b6aae4SMatteo Facchinetti phy0: ethernet-phy@0 { 173a9b6aae4SMatteo Facchinetti reg = <1>; 174a9b6aae4SMatteo Facchinetti }; 175a9b6aae4SMatteo Facchinetti }; 176a9b6aae4SMatteo Facchinetti 177a9b6aae4SMatteo Facchinetti eth0: ethernet@2800 { 178a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125-fec"; 179a9b6aae4SMatteo Facchinetti reg = <0x2800 0x800>; 180a9b6aae4SMatteo Facchinetti local-mac-address = [ 00 00 00 00 00 00 ]; 181a9b6aae4SMatteo Facchinetti interrupts = <4 0x8>; 182a9b6aae4SMatteo Facchinetti phy-handle = < &phy0 >; 183a9b6aae4SMatteo Facchinetti phy-connection-type = "rmii"; 184a9b6aae4SMatteo Facchinetti }; 185a9b6aae4SMatteo Facchinetti 186a9b6aae4SMatteo Facchinetti // IO control 187a9b6aae4SMatteo Facchinetti ioctl@a000 { 188a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125-ioctl"; 189a9b6aae4SMatteo Facchinetti reg = <0xA000 0x1000>; 190a9b6aae4SMatteo Facchinetti }; 191a9b6aae4SMatteo Facchinetti 192a9b6aae4SMatteo Facchinetti usb@3000 { 193a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-usb2-dr"; 194a9b6aae4SMatteo Facchinetti reg = <0x3000 0x400>; 195a9b6aae4SMatteo Facchinetti #address-cells = <1>; 196a9b6aae4SMatteo Facchinetti #size-cells = <0>; 197a9b6aae4SMatteo Facchinetti interrupts = <43 0x8>; 198a9b6aae4SMatteo Facchinetti dr_mode = "host"; 199a9b6aae4SMatteo Facchinetti phy_type = "ulpi"; 200a9b6aae4SMatteo Facchinetti }; 201a9b6aae4SMatteo Facchinetti 202a9b6aae4SMatteo Facchinetti // 5125 PSCs are not 52xx or 5121 PSC compatible 203a9b6aae4SMatteo Facchinetti // PSC1 uart0 aka ttyPSC0 204a9b6aae4SMatteo Facchinetti serial@11100 { 205a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc"; 206a9b6aae4SMatteo Facchinetti reg = <0x11100 0x100>; 207a9b6aae4SMatteo Facchinetti interrupts = <40 0x8>; 208a9b6aae4SMatteo Facchinetti fsl,rx-fifo-size = <16>; 209a9b6aae4SMatteo Facchinetti fsl,tx-fifo-size = <16>; 210a9b6aae4SMatteo Facchinetti }; 211a9b6aae4SMatteo Facchinetti 212a9b6aae4SMatteo Facchinetti // PSC9 uart1 aka ttyPSC1 213a9b6aae4SMatteo Facchinetti serial@11900 { 214a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc"; 215a9b6aae4SMatteo Facchinetti reg = <0x11900 0x100>; 216a9b6aae4SMatteo Facchinetti interrupts = <40 0x8>; 217a9b6aae4SMatteo Facchinetti fsl,rx-fifo-size = <16>; 218a9b6aae4SMatteo Facchinetti fsl,tx-fifo-size = <16>; 219a9b6aae4SMatteo Facchinetti }; 220a9b6aae4SMatteo Facchinetti 221a9b6aae4SMatteo Facchinetti pscfifo@11f00 { 222a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-psc-fifo"; 223a9b6aae4SMatteo Facchinetti reg = <0x11f00 0x100>; 224a9b6aae4SMatteo Facchinetti interrupts = <40 0x8>; 225a9b6aae4SMatteo Facchinetti }; 226a9b6aae4SMatteo Facchinetti 227a9b6aae4SMatteo Facchinetti dma@14000 { 228a9b6aae4SMatteo Facchinetti compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2" 229a9b6aae4SMatteo Facchinetti reg = <0x14000 0x1800>; 230a9b6aae4SMatteo Facchinetti interrupts = <65 0x8>; 231a9b6aae4SMatteo Facchinetti }; 232a9b6aae4SMatteo Facchinetti }; 233a9b6aae4SMatteo Facchinetti}; 234