1bd05f91fSJohn Rigby/* 24df64c3eSJohn Rigby * MPC5121E ADS Device Tree Source 3bd05f91fSJohn Rigby * 44df64c3eSJohn Rigby * Copyright 2007,2008 Freescale Semiconductor Inc. 5bd05f91fSJohn Rigby * 6bd05f91fSJohn Rigby * This program is free software; you can redistribute it and/or modify it 7bd05f91fSJohn Rigby * under the terms of the GNU General Public License as published by the 8bd05f91fSJohn Rigby * Free Software Foundation; either version 2 of the License, or (at your 9bd05f91fSJohn Rigby * option) any later version. 10bd05f91fSJohn Rigby */ 11bd05f91fSJohn Rigby 12bd05f91fSJohn Rigby/dts-v1/; 13bd05f91fSJohn Rigby 14bd05f91fSJohn Rigby/ { 15bd05f91fSJohn Rigby model = "mpc5121ads"; 16bd05f91fSJohn Rigby compatible = "fsl,mpc5121ads"; 17bd05f91fSJohn Rigby #address-cells = <1>; 18bd05f91fSJohn Rigby #size-cells = <1>; 19bd05f91fSJohn Rigby 204df64c3eSJohn Rigby aliases { 214df64c3eSJohn Rigby pci = &pci; 224df64c3eSJohn Rigby }; 234df64c3eSJohn Rigby 24bd05f91fSJohn Rigby cpus { 25bd05f91fSJohn Rigby #address-cells = <1>; 26bd05f91fSJohn Rigby #size-cells = <0>; 27bd05f91fSJohn Rigby 28bd05f91fSJohn Rigby PowerPC,5121@0 { 29bd05f91fSJohn Rigby device_type = "cpu"; 30bd05f91fSJohn Rigby reg = <0>; 31bd05f91fSJohn Rigby d-cache-line-size = <0x20>; // 32 bytes 32bd05f91fSJohn Rigby i-cache-line-size = <0x20>; // 32 bytes 33bd05f91fSJohn Rigby d-cache-size = <0x8000>; // L1, 32K 34bd05f91fSJohn Rigby i-cache-size = <0x8000>; // L1, 32K 35bd05f91fSJohn Rigby timebase-frequency = <49500000>;// 49.5 MHz (csb/4) 36bd05f91fSJohn Rigby bus-frequency = <198000000>; // 198 MHz csb bus 37bd05f91fSJohn Rigby clock-frequency = <396000000>; // 396 MHz ppc core 38bd05f91fSJohn Rigby }; 39bd05f91fSJohn Rigby }; 40bd05f91fSJohn Rigby 41bd05f91fSJohn Rigby memory { 42bd05f91fSJohn Rigby device_type = "memory"; 43bd05f91fSJohn Rigby reg = <0x00000000 0x10000000>; // 256MB at 0 44bd05f91fSJohn Rigby }; 45bd05f91fSJohn Rigby 464df64c3eSJohn Rigby mbx@20000000 { 474df64c3eSJohn Rigby compatible = "fsl,mpc5121-mbx"; 484df64c3eSJohn Rigby reg = <0x20000000 0x4000>; 494df64c3eSJohn Rigby interrupts = <66 0x8>; 504df64c3eSJohn Rigby interrupt-parent = < &ipic >; 514df64c3eSJohn Rigby }; 524df64c3eSJohn Rigby 534df64c3eSJohn Rigby sram@30000000 { 544df64c3eSJohn Rigby compatible = "fsl,mpc5121-sram"; 554df64c3eSJohn Rigby reg = <0x30000000 0x20000>; // 128K at 0x30000000 564df64c3eSJohn Rigby }; 574df64c3eSJohn Rigby 584df64c3eSJohn Rigby nfc@40000000 { 594df64c3eSJohn Rigby compatible = "fsl,mpc5121-nfc"; 604df64c3eSJohn Rigby reg = <0x40000000 0x100000>; // 1M at 0x40000000 614df64c3eSJohn Rigby interrupts = <6 8>; 624df64c3eSJohn Rigby interrupt-parent = < &ipic >; 634df64c3eSJohn Rigby #address-cells = <1>; 644df64c3eSJohn Rigby #size-cells = <1>; 654df64c3eSJohn Rigby bank-width = <1>; 664df64c3eSJohn Rigby // ADS has two Hynix 512MB Nand flash chips in a single 674df64c3eSJohn Rigby // stacked package . 684df64c3eSJohn Rigby chips = <2>; 694df64c3eSJohn Rigby nand0@0 { 704df64c3eSJohn Rigby label = "nand0"; 714df64c3eSJohn Rigby reg = <0x00000000 0x02000000>; // first 32 MB of chip 0 724df64c3eSJohn Rigby }; 734df64c3eSJohn Rigby nand1@20000000 { 744df64c3eSJohn Rigby label = "nand1"; 754df64c3eSJohn Rigby reg = <0x20000000 0x02000000>; // first 32 MB of chip 1 764df64c3eSJohn Rigby }; 774df64c3eSJohn Rigby }; 784df64c3eSJohn Rigby 79bd05f91fSJohn Rigby localbus@80000020 { 804df64c3eSJohn Rigby compatible = "fsl,mpc5121-localbus"; 81bd05f91fSJohn Rigby #address-cells = <2>; 82bd05f91fSJohn Rigby #size-cells = <1>; 83bd05f91fSJohn Rigby reg = <0x80000020 0x40>; 84bd05f91fSJohn Rigby 85bd05f91fSJohn Rigby ranges = <0x0 0x0 0xfc000000 0x04000000 86bd05f91fSJohn Rigby 0x2 0x0 0x82000000 0x00008000>; 87bd05f91fSJohn Rigby 88bd05f91fSJohn Rigby flash@0,0 { 89bd05f91fSJohn Rigby compatible = "cfi-flash"; 90bd05f91fSJohn Rigby reg = <0 0x0 0x4000000>; 914df64c3eSJohn Rigby #address-cells = <1>; 924df64c3eSJohn Rigby #size-cells = <1>; 93bd05f91fSJohn Rigby bank-width = <4>; 944df64c3eSJohn Rigby device-width = <2>; 954df64c3eSJohn Rigby protected@0 { 964df64c3eSJohn Rigby label = "protected"; 974df64c3eSJohn Rigby reg = <0x00000000 0x00040000>; // first sector is protected 984df64c3eSJohn Rigby read-only; 994df64c3eSJohn Rigby }; 1004df64c3eSJohn Rigby filesystem@40000 { 1014df64c3eSJohn Rigby label = "filesystem"; 1024df64c3eSJohn Rigby reg = <0x00040000 0x03c00000>; // 60M for filesystem 1034df64c3eSJohn Rigby }; 1044df64c3eSJohn Rigby kernel@3c40000 { 1054df64c3eSJohn Rigby label = "kernel"; 1064df64c3eSJohn Rigby reg = <0x03c40000 0x00280000>; // 2.5M for kernel 1074df64c3eSJohn Rigby }; 1084df64c3eSJohn Rigby device-tree@3ec0000 { 1094df64c3eSJohn Rigby label = "device-tree"; 1104df64c3eSJohn Rigby reg = <0x03ec0000 0x00040000>; // one sector for device tree 1114df64c3eSJohn Rigby }; 1124df64c3eSJohn Rigby u-boot@3f00000 { 1134df64c3eSJohn Rigby label = "u-boot"; 1144df64c3eSJohn Rigby reg = <0x03f00000 0x00100000>; // 1M for u-boot 1154df64c3eSJohn Rigby read-only; 1164df64c3eSJohn Rigby }; 117bd05f91fSJohn Rigby }; 118bd05f91fSJohn Rigby 119bd05f91fSJohn Rigby board-control@2,0 { 120bd05f91fSJohn Rigby compatible = "fsl,mpc5121ads-cpld"; 121bd05f91fSJohn Rigby reg = <0x2 0x0 0x8000>; 122bd05f91fSJohn Rigby }; 1234df64c3eSJohn Rigby 1244df64c3eSJohn Rigby cpld_pic: pic@2,a { 1254df64c3eSJohn Rigby compatible = "fsl,mpc5121ads-cpld-pic"; 1264df64c3eSJohn Rigby interrupt-controller; 1274df64c3eSJohn Rigby #interrupt-cells = <2>; 1284df64c3eSJohn Rigby reg = <0x2 0xa 0x5>; 1294df64c3eSJohn Rigby interrupt-parent = < &ipic >; 1304df64c3eSJohn Rigby // irq routing 1314df64c3eSJohn Rigby // all irqs but touch screen are routed to irq0 (ipic 48) 1324df64c3eSJohn Rigby // touch screen is statically routed to irq1 (ipic 17) 1334df64c3eSJohn Rigby // so don't use it here 1344df64c3eSJohn Rigby interrupts = <48 0x8>; 1354df64c3eSJohn Rigby }; 136bd05f91fSJohn Rigby }; 137bd05f91fSJohn Rigby 138bd05f91fSJohn Rigby soc@80000000 { 139bd05f91fSJohn Rigby compatible = "fsl,mpc5121-immr"; 140bd05f91fSJohn Rigby #address-cells = <1>; 141bd05f91fSJohn Rigby #size-cells = <1>; 142bd05f91fSJohn Rigby #interrupt-cells = <2>; 143bd05f91fSJohn Rigby ranges = <0x0 0x80000000 0x400000>; 144bd05f91fSJohn Rigby reg = <0x80000000 0x400000>; 145bd05f91fSJohn Rigby bus-frequency = <66000000>; // 66 MHz ips bus 146bd05f91fSJohn Rigby 147bd05f91fSJohn Rigby 148bd05f91fSJohn Rigby // IPIC 149bd05f91fSJohn Rigby // interrupts cell = <intr #, sense> 150bd05f91fSJohn Rigby // sense values match linux IORESOURCE_IRQ_* defines: 151bd05f91fSJohn Rigby // sense == 8: Level, low assertion 152bd05f91fSJohn Rigby // sense == 2: Edge, high-to-low change 153bd05f91fSJohn Rigby // 154bd05f91fSJohn Rigby ipic: interrupt-controller@c00 { 155bd05f91fSJohn Rigby compatible = "fsl,mpc5121-ipic", "fsl,ipic"; 156bd05f91fSJohn Rigby interrupt-controller; 157bd05f91fSJohn Rigby #address-cells = <0>; 158bd05f91fSJohn Rigby #interrupt-cells = <2>; 159bd05f91fSJohn Rigby reg = <0xc00 0x100>; 160bd05f91fSJohn Rigby }; 161bd05f91fSJohn Rigby 1624df64c3eSJohn Rigby rtc@a00 { // Real time clock 1634df64c3eSJohn Rigby compatible = "fsl,mpc5121-rtc"; 1644df64c3eSJohn Rigby reg = <0xa00 0x100>; 1654df64c3eSJohn Rigby interrupts = <79 0x8 80 0x8>; 1664df64c3eSJohn Rigby interrupt-parent = < &ipic >; 1674df64c3eSJohn Rigby }; 1684df64c3eSJohn Rigby 1694df64c3eSJohn Rigby clock@f00 { // Clock control 1704df64c3eSJohn Rigby compatible = "fsl,mpc5121-clock"; 1714df64c3eSJohn Rigby reg = <0xf00 0x100>; 1724df64c3eSJohn Rigby }; 1734df64c3eSJohn Rigby 1744df64c3eSJohn Rigby pmc@1000{ //Power Management Controller 1754df64c3eSJohn Rigby compatible = "fsl,mpc5121-pmc"; 1764df64c3eSJohn Rigby reg = <0x1000 0x100>; 1774df64c3eSJohn Rigby interrupts = <83 0x2>; 1784df64c3eSJohn Rigby interrupt-parent = < &ipic >; 1794df64c3eSJohn Rigby }; 1804df64c3eSJohn Rigby 1814df64c3eSJohn Rigby gpio@1100 { 1824df64c3eSJohn Rigby compatible = "fsl,mpc5121-gpio"; 1834df64c3eSJohn Rigby reg = <0x1100 0x100>; 1844df64c3eSJohn Rigby interrupts = <78 0x8>; 1854df64c3eSJohn Rigby interrupt-parent = < &ipic >; 1864df64c3eSJohn Rigby }; 1874df64c3eSJohn Rigby 1884df64c3eSJohn Rigby mscan@1300 { 1894df64c3eSJohn Rigby compatible = "fsl,mpc5121-mscan"; 1904df64c3eSJohn Rigby cell-index = <0>; 1914df64c3eSJohn Rigby interrupts = <12 0x8>; 1924df64c3eSJohn Rigby interrupt-parent = < &ipic >; 1934df64c3eSJohn Rigby reg = <0x1300 0x80>; 1944df64c3eSJohn Rigby }; 1954df64c3eSJohn Rigby 1964df64c3eSJohn Rigby mscan@1380 { 1974df64c3eSJohn Rigby compatible = "fsl,mpc5121-mscan"; 1984df64c3eSJohn Rigby cell-index = <1>; 1994df64c3eSJohn Rigby interrupts = <13 0x8>; 2004df64c3eSJohn Rigby interrupt-parent = < &ipic >; 2014df64c3eSJohn Rigby reg = <0x1380 0x80>; 2024df64c3eSJohn Rigby }; 2034df64c3eSJohn Rigby 2044df64c3eSJohn Rigby i2c@1700 { 2054df64c3eSJohn Rigby #address-cells = <1>; 2064df64c3eSJohn Rigby #size-cells = <0>; 2074df64c3eSJohn Rigby compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 2084df64c3eSJohn Rigby cell-index = <0>; 2094df64c3eSJohn Rigby reg = <0x1700 0x20>; 2104df64c3eSJohn Rigby interrupts = <9 0x8>; 2114df64c3eSJohn Rigby interrupt-parent = < &ipic >; 2124df64c3eSJohn Rigby fsl5200-clocking; 2134df64c3eSJohn Rigby }; 2144df64c3eSJohn Rigby 2154df64c3eSJohn Rigby i2c@1720 { 2164df64c3eSJohn Rigby #address-cells = <1>; 2174df64c3eSJohn Rigby #size-cells = <0>; 2184df64c3eSJohn Rigby compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 2194df64c3eSJohn Rigby cell-index = <1>; 2204df64c3eSJohn Rigby reg = <0x1720 0x20>; 2214df64c3eSJohn Rigby interrupts = <10 0x8>; 2224df64c3eSJohn Rigby interrupt-parent = < &ipic >; 2234df64c3eSJohn Rigby fsl5200-clocking; 2244df64c3eSJohn Rigby }; 2254df64c3eSJohn Rigby 2264df64c3eSJohn Rigby i2c@1740 { 2274df64c3eSJohn Rigby #address-cells = <1>; 2284df64c3eSJohn Rigby #size-cells = <0>; 2294df64c3eSJohn Rigby compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 2304df64c3eSJohn Rigby cell-index = <2>; 2314df64c3eSJohn Rigby reg = <0x1740 0x20>; 2324df64c3eSJohn Rigby interrupts = <11 0x8>; 2334df64c3eSJohn Rigby interrupt-parent = < &ipic >; 2344df64c3eSJohn Rigby fsl5200-clocking; 2354df64c3eSJohn Rigby }; 2364df64c3eSJohn Rigby 2374df64c3eSJohn Rigby i2ccontrol@1760 { 2384df64c3eSJohn Rigby compatible = "fsl,mpc5121-i2c-ctrl"; 2394df64c3eSJohn Rigby reg = <0x1760 0x8>; 2404df64c3eSJohn Rigby }; 2414df64c3eSJohn Rigby 2424df64c3eSJohn Rigby axe@2000 { 2434df64c3eSJohn Rigby compatible = "fsl,mpc5121-axe"; 2444df64c3eSJohn Rigby reg = <0x2000 0x100>; 2454df64c3eSJohn Rigby interrupts = <42 0x8>; 2464df64c3eSJohn Rigby interrupt-parent = < &ipic >; 2474df64c3eSJohn Rigby }; 2484df64c3eSJohn Rigby 2494df64c3eSJohn Rigby display@2100 { 2504df64c3eSJohn Rigby compatible = "fsl,mpc5121-diu", "fsl-diu"; 2514df64c3eSJohn Rigby reg = <0x2100 0x100>; 2524df64c3eSJohn Rigby interrupts = <64 0x8>; 2534df64c3eSJohn Rigby interrupt-parent = < &ipic >; 2544df64c3eSJohn Rigby }; 2554df64c3eSJohn Rigby 2564df64c3eSJohn Rigby mdio@2800 { 2574df64c3eSJohn Rigby compatible = "fsl,mpc5121-fec-mdio"; 2584df64c3eSJohn Rigby reg = <0x2800 0x800>; 2594df64c3eSJohn Rigby #address-cells = <1>; 2604df64c3eSJohn Rigby #size-cells = <0>; 2614df64c3eSJohn Rigby phy: ethernet-phy@0 { 2624df64c3eSJohn Rigby reg = <1>; 2634df64c3eSJohn Rigby device_type = "ethernet-phy"; 2644df64c3eSJohn Rigby }; 2654df64c3eSJohn Rigby }; 2664df64c3eSJohn Rigby 2674df64c3eSJohn Rigby ethernet@2800 { 2684df64c3eSJohn Rigby device_type = "network"; 2694df64c3eSJohn Rigby compatible = "fsl,mpc5121-fec"; 2704df64c3eSJohn Rigby reg = <0x2800 0x800>; 2714df64c3eSJohn Rigby local-mac-address = [ 00 00 00 00 00 00 ]; 2724df64c3eSJohn Rigby interrupts = <4 0x8>; 2734df64c3eSJohn Rigby interrupt-parent = < &ipic >; 2744df64c3eSJohn Rigby phy-handle = < &phy >; 2754df64c3eSJohn Rigby fsl,align-tx-packets = <4>; 2764df64c3eSJohn Rigby }; 2774df64c3eSJohn Rigby 2784df64c3eSJohn Rigby // 5121e has two dr usb modules 2794df64c3eSJohn Rigby // mpc5121_ads only uses USB0 2804df64c3eSJohn Rigby 2814df64c3eSJohn Rigby // USB1 using external ULPI PHY 2824df64c3eSJohn Rigby //usb@3000 { 2834df64c3eSJohn Rigby // compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; 2844df64c3eSJohn Rigby // reg = <0x3000 0x1000>; 2854df64c3eSJohn Rigby // #address-cells = <1>; 2864df64c3eSJohn Rigby // #size-cells = <0>; 2874df64c3eSJohn Rigby // interrupt-parent = < &ipic >; 2884df64c3eSJohn Rigby // interrupts = <43 0x8>; 2894df64c3eSJohn Rigby // dr_mode = "otg"; 2904df64c3eSJohn Rigby // phy_type = "ulpi"; 2914df64c3eSJohn Rigby // port1; 2924df64c3eSJohn Rigby //}; 2934df64c3eSJohn Rigby 2944df64c3eSJohn Rigby // USB0 using internal UTMI PHY 2954df64c3eSJohn Rigby usb@4000 { 2964df64c3eSJohn Rigby compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; 2974df64c3eSJohn Rigby reg = <0x4000 0x1000>; 2984df64c3eSJohn Rigby #address-cells = <1>; 2994df64c3eSJohn Rigby #size-cells = <0>; 3004df64c3eSJohn Rigby interrupt-parent = < &ipic >; 3014df64c3eSJohn Rigby interrupts = <44 0x8>; 3024df64c3eSJohn Rigby dr_mode = "otg"; 3034df64c3eSJohn Rigby phy_type = "utmi_wide"; 3044df64c3eSJohn Rigby port0; 3054df64c3eSJohn Rigby }; 3064df64c3eSJohn Rigby 3074df64c3eSJohn Rigby // IO control 3084df64c3eSJohn Rigby ioctl@a000 { 3094df64c3eSJohn Rigby compatible = "fsl,mpc5121-ioctl"; 3104df64c3eSJohn Rigby reg = <0xA000 0x1000>; 3114df64c3eSJohn Rigby }; 3124df64c3eSJohn Rigby 3134df64c3eSJohn Rigby pata@10200 { 3144df64c3eSJohn Rigby compatible = "fsl,mpc5121-pata"; 3154df64c3eSJohn Rigby reg = <0x10200 0x100>; 3164df64c3eSJohn Rigby interrupts = <5 0x8>; 3174df64c3eSJohn Rigby interrupt-parent = < &ipic >; 3184df64c3eSJohn Rigby }; 3194df64c3eSJohn Rigby 3204df64c3eSJohn Rigby // 512x PSCs are not 52xx PSC compatible 321bd05f91fSJohn Rigby // PSC3 serial port A aka ttyPSC0 322bd05f91fSJohn Rigby serial@11300 { 323bd05f91fSJohn Rigby device_type = "serial"; 3244df64c3eSJohn Rigby compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 325bd05f91fSJohn Rigby // Logical port assignment needed until driver 326bd05f91fSJohn Rigby // learns to use aliases 327bd05f91fSJohn Rigby port-number = <0>; 328bd05f91fSJohn Rigby cell-index = <3>; 329bd05f91fSJohn Rigby reg = <0x11300 0x100>; 3304df64c3eSJohn Rigby interrupts = <40 0x8>; 331bd05f91fSJohn Rigby interrupt-parent = < &ipic >; 3324df64c3eSJohn Rigby rx-fifo-size = <16>; 3334df64c3eSJohn Rigby tx-fifo-size = <16>; 334bd05f91fSJohn Rigby }; 335bd05f91fSJohn Rigby 336bd05f91fSJohn Rigby // PSC4 serial port B aka ttyPSC1 337bd05f91fSJohn Rigby serial@11400 { 338bd05f91fSJohn Rigby device_type = "serial"; 3394df64c3eSJohn Rigby compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 340bd05f91fSJohn Rigby // Logical port assignment needed until driver 341bd05f91fSJohn Rigby // learns to use aliases 342bd05f91fSJohn Rigby port-number = <1>; 343bd05f91fSJohn Rigby cell-index = <4>; 344bd05f91fSJohn Rigby reg = <0x11400 0x100>; 3454df64c3eSJohn Rigby interrupts = <40 0x8>; 3464df64c3eSJohn Rigby interrupt-parent = < &ipic >; 3474df64c3eSJohn Rigby rx-fifo-size = <16>; 3484df64c3eSJohn Rigby tx-fifo-size = <16>; 3494df64c3eSJohn Rigby }; 3504df64c3eSJohn Rigby 3514df64c3eSJohn Rigby // PSC5 in ac97 mode 3524df64c3eSJohn Rigby ac97@11500 { 3534df64c3eSJohn Rigby compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc"; 3544df64c3eSJohn Rigby cell-index = <5>; 3554df64c3eSJohn Rigby reg = <0x11500 0x100>; 3564df64c3eSJohn Rigby interrupts = <40 0x8>; 3574df64c3eSJohn Rigby interrupt-parent = < &ipic >; 3584df64c3eSJohn Rigby fsl,mode = "ac97-slave"; 3594df64c3eSJohn Rigby rx-fifo-size = <384>; 3604df64c3eSJohn Rigby tx-fifo-size = <384>; 3614df64c3eSJohn Rigby }; 3624df64c3eSJohn Rigby 3634df64c3eSJohn Rigby pscfifo@11f00 { 3644df64c3eSJohn Rigby compatible = "fsl,mpc5121-psc-fifo"; 3654df64c3eSJohn Rigby reg = <0x11f00 0x100>; 3664df64c3eSJohn Rigby interrupts = <40 0x8>; 367bd05f91fSJohn Rigby interrupt-parent = < &ipic >; 368bd05f91fSJohn Rigby }; 369bd05f91fSJohn Rigby 3704df64c3eSJohn Rigby dma@14000 { 3714df64c3eSJohn Rigby compatible = "fsl,mpc5121-dma2"; 3724df64c3eSJohn Rigby reg = <0x14000 0x1800>; 3734df64c3eSJohn Rigby interrupts = <65 0x8>; 374bd05f91fSJohn Rigby interrupt-parent = < &ipic >; 375bd05f91fSJohn Rigby }; 3764df64c3eSJohn Rigby 3774df64c3eSJohn Rigby }; 3784df64c3eSJohn Rigby 3794df64c3eSJohn Rigby pci: pci@80008500 { 3804df64c3eSJohn Rigby interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 3814df64c3eSJohn Rigby interrupt-map = < 3824df64c3eSJohn Rigby // IDSEL 0x15 - Slot 1 PCI 3834df64c3eSJohn Rigby 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8 3844df64c3eSJohn Rigby 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8 3854df64c3eSJohn Rigby 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8 3864df64c3eSJohn Rigby 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8 3874df64c3eSJohn Rigby 3884df64c3eSJohn Rigby // IDSEL 0x16 - Slot 2 MiniPCI 3894df64c3eSJohn Rigby 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8 3904df64c3eSJohn Rigby 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8 3914df64c3eSJohn Rigby 3924df64c3eSJohn Rigby // IDSEL 0x17 - Slot 3 MiniPCI 3934df64c3eSJohn Rigby 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8 3944df64c3eSJohn Rigby 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8 3954df64c3eSJohn Rigby >; 3964df64c3eSJohn Rigby interrupt-parent = < &ipic >; 3974df64c3eSJohn Rigby interrupts = <1 0x8>; 3984df64c3eSJohn Rigby bus-range = <0 0>; 3994df64c3eSJohn Rigby ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 4004df64c3eSJohn Rigby 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 4014df64c3eSJohn Rigby 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>; 4024df64c3eSJohn Rigby clock-frequency = <0>; 4034df64c3eSJohn Rigby #interrupt-cells = <1>; 4044df64c3eSJohn Rigby #size-cells = <2>; 4054df64c3eSJohn Rigby #address-cells = <3>; 4064df64c3eSJohn Rigby reg = <0x80008500 0x100>; 4074df64c3eSJohn Rigby compatible = "fsl,mpc5121-pci"; 4084df64c3eSJohn Rigby device_type = "pci"; 409bd05f91fSJohn Rigby }; 410bd05f91fSJohn Rigby}; 411