181c6fdb6SAnatolij Gustschin/* 281c6fdb6SAnatolij Gustschin * base MPC5121 Device Tree Source 381c6fdb6SAnatolij Gustschin * 481c6fdb6SAnatolij Gustschin * Copyright 2007-2008 Freescale Semiconductor Inc. 581c6fdb6SAnatolij Gustschin * 681c6fdb6SAnatolij Gustschin * This program is free software; you can redistribute it and/or modify it 781c6fdb6SAnatolij Gustschin * under the terms of the GNU General Public License as published by the 881c6fdb6SAnatolij Gustschin * Free Software Foundation; either version 2 of the License, or (at your 981c6fdb6SAnatolij Gustschin * option) any later version. 1081c6fdb6SAnatolij Gustschin */ 1181c6fdb6SAnatolij Gustschin 12f87ccd2eSGerhard Sittig#include <dt-bindings/clock/mpc512x-clock.h> 13f87ccd2eSGerhard Sittig 1481c6fdb6SAnatolij Gustschin/dts-v1/; 1581c6fdb6SAnatolij Gustschin 1681c6fdb6SAnatolij Gustschin/ { 1781c6fdb6SAnatolij Gustschin model = "mpc5121"; 1881c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121"; 1981c6fdb6SAnatolij Gustschin #address-cells = <1>; 2081c6fdb6SAnatolij Gustschin #size-cells = <1>; 2181c6fdb6SAnatolij Gustschin interrupt-parent = <&ipic>; 2281c6fdb6SAnatolij Gustschin 2381c6fdb6SAnatolij Gustschin aliases { 2481c6fdb6SAnatolij Gustschin ethernet0 = ð0; 2581c6fdb6SAnatolij Gustschin pci = &pci; 2681c6fdb6SAnatolij Gustschin }; 2781c6fdb6SAnatolij Gustschin 2881c6fdb6SAnatolij Gustschin cpus { 2981c6fdb6SAnatolij Gustschin #address-cells = <1>; 3081c6fdb6SAnatolij Gustschin #size-cells = <0>; 3181c6fdb6SAnatolij Gustschin 3281c6fdb6SAnatolij Gustschin PowerPC,5121@0 { 3381c6fdb6SAnatolij Gustschin device_type = "cpu"; 3481c6fdb6SAnatolij Gustschin reg = <0>; 3581c6fdb6SAnatolij Gustschin d-cache-line-size = <0x20>; /* 32 bytes */ 3681c6fdb6SAnatolij Gustschin i-cache-line-size = <0x20>; /* 32 bytes */ 3781c6fdb6SAnatolij Gustschin d-cache-size = <0x8000>; /* L1, 32K */ 3881c6fdb6SAnatolij Gustschin i-cache-size = <0x8000>; /* L1, 32K */ 3981c6fdb6SAnatolij Gustschin timebase-frequency = <49500000>;/* 49.5 MHz (csb/4) */ 4081c6fdb6SAnatolij Gustschin bus-frequency = <198000000>; /* 198 MHz csb bus */ 4181c6fdb6SAnatolij Gustschin clock-frequency = <396000000>; /* 396 MHz ppc core */ 4281c6fdb6SAnatolij Gustschin }; 4381c6fdb6SAnatolij Gustschin }; 4481c6fdb6SAnatolij Gustschin 4581c6fdb6SAnatolij Gustschin memory { 4681c6fdb6SAnatolij Gustschin device_type = "memory"; 4781c6fdb6SAnatolij Gustschin reg = <0x00000000 0x10000000>; /* 256MB at 0 */ 4881c6fdb6SAnatolij Gustschin }; 4981c6fdb6SAnatolij Gustschin 5081c6fdb6SAnatolij Gustschin mbx@20000000 { 5181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-mbx"; 5281c6fdb6SAnatolij Gustschin reg = <0x20000000 0x4000>; 5381c6fdb6SAnatolij Gustschin interrupts = <66 0x8>; 54124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_MBX_BUS>, 55124fe7c5SGerhard Sittig <&clks MPC512x_CLK_MBX_3D>, 56124fe7c5SGerhard Sittig <&clks MPC512x_CLK_MBX>; 57124fe7c5SGerhard Sittig clock-names = "mbx-bus", "mbx-3d", "mbx"; 5881c6fdb6SAnatolij Gustschin }; 5981c6fdb6SAnatolij Gustschin 6081c6fdb6SAnatolij Gustschin sram@30000000 { 6181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-sram"; 6281c6fdb6SAnatolij Gustschin reg = <0x30000000 0x20000>; /* 128K at 0x30000000 */ 6381c6fdb6SAnatolij Gustschin }; 6481c6fdb6SAnatolij Gustschin 6581c6fdb6SAnatolij Gustschin nfc@40000000 { 6681c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-nfc"; 6781c6fdb6SAnatolij Gustschin reg = <0x40000000 0x100000>; /* 1M at 0x40000000 */ 6881c6fdb6SAnatolij Gustschin interrupts = <6 8>; 6981c6fdb6SAnatolij Gustschin #address-cells = <1>; 7081c6fdb6SAnatolij Gustschin #size-cells = <1>; 71124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_NFC>; 72124fe7c5SGerhard Sittig clock-names = "ipg"; 7381c6fdb6SAnatolij Gustschin }; 7481c6fdb6SAnatolij Gustschin 7581c6fdb6SAnatolij Gustschin localbus@80000020 { 7681c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-localbus"; 7781c6fdb6SAnatolij Gustschin #address-cells = <2>; 7881c6fdb6SAnatolij Gustschin #size-cells = <1>; 7981c6fdb6SAnatolij Gustschin reg = <0x80000020 0x40>; 8081c6fdb6SAnatolij Gustschin interrupts = <7 0x8>; 8181c6fdb6SAnatolij Gustschin ranges = <0x0 0x0 0xfc000000 0x04000000>; 8281c6fdb6SAnatolij Gustschin }; 8381c6fdb6SAnatolij Gustschin 84f87ccd2eSGerhard Sittig clocks { 85f87ccd2eSGerhard Sittig #address-cells = <1>; 86f87ccd2eSGerhard Sittig #size-cells = <0>; 87f87ccd2eSGerhard Sittig 88f87ccd2eSGerhard Sittig osc: osc { 89f87ccd2eSGerhard Sittig compatible = "fixed-clock"; 90f87ccd2eSGerhard Sittig #clock-cells = <0>; 91f87ccd2eSGerhard Sittig clock-frequency = <33000000>; 92f87ccd2eSGerhard Sittig }; 93f87ccd2eSGerhard Sittig }; 94f87ccd2eSGerhard Sittig 9581c6fdb6SAnatolij Gustschin soc@80000000 { 9681c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-immr"; 9781c6fdb6SAnatolij Gustschin #address-cells = <1>; 9881c6fdb6SAnatolij Gustschin #size-cells = <1>; 9981c6fdb6SAnatolij Gustschin ranges = <0x0 0x80000000 0x400000>; 10081c6fdb6SAnatolij Gustschin reg = <0x80000000 0x400000>; 10181c6fdb6SAnatolij Gustschin bus-frequency = <66000000>; /* 66 MHz ips bus */ 10281c6fdb6SAnatolij Gustschin 10381c6fdb6SAnatolij Gustschin 10481c6fdb6SAnatolij Gustschin /* 10581c6fdb6SAnatolij Gustschin * IPIC 10681c6fdb6SAnatolij Gustschin * interrupts cell = <intr #, sense> 10781c6fdb6SAnatolij Gustschin * sense values match linux IORESOURCE_IRQ_* defines: 10881c6fdb6SAnatolij Gustschin * sense == 8: Level, low assertion 10981c6fdb6SAnatolij Gustschin * sense == 2: Edge, high-to-low change 11081c6fdb6SAnatolij Gustschin */ 11181c6fdb6SAnatolij Gustschin ipic: interrupt-controller@c00 { 11281c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-ipic", "fsl,ipic"; 11381c6fdb6SAnatolij Gustschin interrupt-controller; 11481c6fdb6SAnatolij Gustschin #address-cells = <0>; 11581c6fdb6SAnatolij Gustschin #interrupt-cells = <2>; 11681c6fdb6SAnatolij Gustschin reg = <0xc00 0x100>; 11781c6fdb6SAnatolij Gustschin }; 11881c6fdb6SAnatolij Gustschin 11981c6fdb6SAnatolij Gustschin /* Watchdog timer */ 12081c6fdb6SAnatolij Gustschin wdt@900 { 12181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-wdt"; 12281c6fdb6SAnatolij Gustschin reg = <0x900 0x100>; 12381c6fdb6SAnatolij Gustschin }; 12481c6fdb6SAnatolij Gustschin 12581c6fdb6SAnatolij Gustschin /* Real time clock */ 12681c6fdb6SAnatolij Gustschin rtc@a00 { 12781c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-rtc"; 12881c6fdb6SAnatolij Gustschin reg = <0xa00 0x100>; 12981c6fdb6SAnatolij Gustschin interrupts = <79 0x8 80 0x8>; 13081c6fdb6SAnatolij Gustschin }; 13181c6fdb6SAnatolij Gustschin 13281c6fdb6SAnatolij Gustschin /* Reset module */ 13381c6fdb6SAnatolij Gustschin reset@e00 { 13481c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-reset"; 13581c6fdb6SAnatolij Gustschin reg = <0xe00 0x100>; 13681c6fdb6SAnatolij Gustschin }; 13781c6fdb6SAnatolij Gustschin 13881c6fdb6SAnatolij Gustschin /* Clock control */ 139f87ccd2eSGerhard Sittig clks: clock@f00 { 14081c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-clock"; 14181c6fdb6SAnatolij Gustschin reg = <0xf00 0x100>; 142f87ccd2eSGerhard Sittig #clock-cells = <1>; 143f87ccd2eSGerhard Sittig clocks = <&osc>; 144f87ccd2eSGerhard Sittig clock-names = "osc"; 14581c6fdb6SAnatolij Gustschin }; 14681c6fdb6SAnatolij Gustschin 14781c6fdb6SAnatolij Gustschin /* Power Management Controller */ 14881c6fdb6SAnatolij Gustschin pmc@1000{ 14981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-pmc"; 15081c6fdb6SAnatolij Gustschin reg = <0x1000 0x100>; 15181c6fdb6SAnatolij Gustschin interrupts = <83 0x8>; 15281c6fdb6SAnatolij Gustschin }; 15381c6fdb6SAnatolij Gustschin 15481c6fdb6SAnatolij Gustschin gpio@1100 { 15581c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-gpio"; 15681c6fdb6SAnatolij Gustschin reg = <0x1100 0x100>; 15781c6fdb6SAnatolij Gustschin interrupts = <78 0x8>; 15881c6fdb6SAnatolij Gustschin }; 15981c6fdb6SAnatolij Gustschin 16081c6fdb6SAnatolij Gustschin can@1300 { 16181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-mscan"; 16281c6fdb6SAnatolij Gustschin reg = <0x1300 0x80>; 16381c6fdb6SAnatolij Gustschin interrupts = <12 0x8>; 164124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_BDLC>, 165124fe7c5SGerhard Sittig <&clks MPC512x_CLK_IPS>, 166124fe7c5SGerhard Sittig <&clks MPC512x_CLK_SYS>, 167124fe7c5SGerhard Sittig <&clks MPC512x_CLK_REF>, 168124fe7c5SGerhard Sittig <&clks MPC512x_CLK_MSCAN0_MCLK>; 169124fe7c5SGerhard Sittig clock-names = "ipg", "ips", "sys", "ref", "mclk"; 17081c6fdb6SAnatolij Gustschin }; 17181c6fdb6SAnatolij Gustschin 17281c6fdb6SAnatolij Gustschin can@1380 { 17381c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-mscan"; 17481c6fdb6SAnatolij Gustschin reg = <0x1380 0x80>; 17581c6fdb6SAnatolij Gustschin interrupts = <13 0x8>; 176124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_BDLC>, 177124fe7c5SGerhard Sittig <&clks MPC512x_CLK_IPS>, 178124fe7c5SGerhard Sittig <&clks MPC512x_CLK_SYS>, 179124fe7c5SGerhard Sittig <&clks MPC512x_CLK_REF>, 180124fe7c5SGerhard Sittig <&clks MPC512x_CLK_MSCAN1_MCLK>; 181124fe7c5SGerhard Sittig clock-names = "ipg", "ips", "sys", "ref", "mclk"; 18281c6fdb6SAnatolij Gustschin }; 18381c6fdb6SAnatolij Gustschin 18481c6fdb6SAnatolij Gustschin sdhc@1500 { 18581c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-sdhc"; 18681c6fdb6SAnatolij Gustschin reg = <0x1500 0x100>; 18781c6fdb6SAnatolij Gustschin interrupts = <8 0x8>; 188e48fc15aSAnatolij Gustschin dmas = <&dma0 30>; 189e48fc15aSAnatolij Gustschin dma-names = "rx-tx"; 190124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_IPS>, 191124fe7c5SGerhard Sittig <&clks MPC512x_CLK_SDHC>; 192124fe7c5SGerhard Sittig clock-names = "ipg", "per"; 19381c6fdb6SAnatolij Gustschin }; 19481c6fdb6SAnatolij Gustschin 19581c6fdb6SAnatolij Gustschin i2c@1700 { 19681c6fdb6SAnatolij Gustschin #address-cells = <1>; 19781c6fdb6SAnatolij Gustschin #size-cells = <0>; 19881c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 19981c6fdb6SAnatolij Gustschin reg = <0x1700 0x20>; 20081c6fdb6SAnatolij Gustschin interrupts = <9 0x8>; 201124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_I2C>; 202124fe7c5SGerhard Sittig clock-names = "ipg"; 20381c6fdb6SAnatolij Gustschin }; 20481c6fdb6SAnatolij Gustschin 20581c6fdb6SAnatolij Gustschin i2c@1720 { 20681c6fdb6SAnatolij Gustschin #address-cells = <1>; 20781c6fdb6SAnatolij Gustschin #size-cells = <0>; 20881c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 20981c6fdb6SAnatolij Gustschin reg = <0x1720 0x20>; 21081c6fdb6SAnatolij Gustschin interrupts = <10 0x8>; 211124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_I2C>; 212124fe7c5SGerhard Sittig clock-names = "ipg"; 21381c6fdb6SAnatolij Gustschin }; 21481c6fdb6SAnatolij Gustschin 21581c6fdb6SAnatolij Gustschin i2c@1740 { 21681c6fdb6SAnatolij Gustschin #address-cells = <1>; 21781c6fdb6SAnatolij Gustschin #size-cells = <0>; 21881c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 21981c6fdb6SAnatolij Gustschin reg = <0x1740 0x20>; 22081c6fdb6SAnatolij Gustschin interrupts = <11 0x8>; 221124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_I2C>; 222124fe7c5SGerhard Sittig clock-names = "ipg"; 22381c6fdb6SAnatolij Gustschin }; 22481c6fdb6SAnatolij Gustschin 22581c6fdb6SAnatolij Gustschin i2ccontrol@1760 { 22681c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-i2c-ctrl"; 22781c6fdb6SAnatolij Gustschin reg = <0x1760 0x8>; 22881c6fdb6SAnatolij Gustschin }; 22981c6fdb6SAnatolij Gustschin 23081c6fdb6SAnatolij Gustschin axe@2000 { 23181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-axe"; 23281c6fdb6SAnatolij Gustschin reg = <0x2000 0x100>; 23381c6fdb6SAnatolij Gustschin interrupts = <42 0x8>; 234124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_AXE>; 235124fe7c5SGerhard Sittig clock-names = "ipg"; 23681c6fdb6SAnatolij Gustschin }; 23781c6fdb6SAnatolij Gustschin 23881c6fdb6SAnatolij Gustschin display@2100 { 23981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-diu"; 24081c6fdb6SAnatolij Gustschin reg = <0x2100 0x100>; 24181c6fdb6SAnatolij Gustschin interrupts = <64 0x8>; 242124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_DIU>; 243124fe7c5SGerhard Sittig clock-names = "ipg"; 24481c6fdb6SAnatolij Gustschin }; 24581c6fdb6SAnatolij Gustschin 24681c6fdb6SAnatolij Gustschin can@2300 { 24781c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-mscan"; 24881c6fdb6SAnatolij Gustschin reg = <0x2300 0x80>; 24981c6fdb6SAnatolij Gustschin interrupts = <90 0x8>; 250124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_BDLC>, 251124fe7c5SGerhard Sittig <&clks MPC512x_CLK_IPS>, 252124fe7c5SGerhard Sittig <&clks MPC512x_CLK_SYS>, 253124fe7c5SGerhard Sittig <&clks MPC512x_CLK_REF>, 254124fe7c5SGerhard Sittig <&clks MPC512x_CLK_MSCAN2_MCLK>; 255124fe7c5SGerhard Sittig clock-names = "ipg", "ips", "sys", "ref", "mclk"; 25681c6fdb6SAnatolij Gustschin }; 25781c6fdb6SAnatolij Gustschin 25881c6fdb6SAnatolij Gustschin can@2380 { 25981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-mscan"; 26081c6fdb6SAnatolij Gustschin reg = <0x2380 0x80>; 26181c6fdb6SAnatolij Gustschin interrupts = <91 0x8>; 262124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_BDLC>, 263124fe7c5SGerhard Sittig <&clks MPC512x_CLK_IPS>, 264124fe7c5SGerhard Sittig <&clks MPC512x_CLK_SYS>, 265124fe7c5SGerhard Sittig <&clks MPC512x_CLK_REF>, 266124fe7c5SGerhard Sittig <&clks MPC512x_CLK_MSCAN3_MCLK>; 267124fe7c5SGerhard Sittig clock-names = "ipg", "ips", "sys", "ref", "mclk"; 26881c6fdb6SAnatolij Gustschin }; 26981c6fdb6SAnatolij Gustschin 27081c6fdb6SAnatolij Gustschin viu@2400 { 27181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-viu"; 27281c6fdb6SAnatolij Gustschin reg = <0x2400 0x400>; 27381c6fdb6SAnatolij Gustschin interrupts = <67 0x8>; 274124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_VIU>; 275124fe7c5SGerhard Sittig clock-names = "ipg"; 27681c6fdb6SAnatolij Gustschin }; 27781c6fdb6SAnatolij Gustschin 27881c6fdb6SAnatolij Gustschin mdio@2800 { 27981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-fec-mdio"; 28081c6fdb6SAnatolij Gustschin reg = <0x2800 0x800>; 28181c6fdb6SAnatolij Gustschin #address-cells = <1>; 28281c6fdb6SAnatolij Gustschin #size-cells = <0>; 283124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_FEC>; 284124fe7c5SGerhard Sittig clock-names = "per"; 28581c6fdb6SAnatolij Gustschin }; 28681c6fdb6SAnatolij Gustschin 28781c6fdb6SAnatolij Gustschin eth0: ethernet@2800 { 28881c6fdb6SAnatolij Gustschin device_type = "network"; 28981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-fec"; 29081c6fdb6SAnatolij Gustschin reg = <0x2800 0x800>; 29181c6fdb6SAnatolij Gustschin local-mac-address = [ 00 00 00 00 00 00 ]; 29281c6fdb6SAnatolij Gustschin interrupts = <4 0x8>; 293124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_FEC>; 294124fe7c5SGerhard Sittig clock-names = "per"; 29581c6fdb6SAnatolij Gustschin }; 29681c6fdb6SAnatolij Gustschin 29781c6fdb6SAnatolij Gustschin /* USB1 using external ULPI PHY */ 29881c6fdb6SAnatolij Gustschin usb@3000 { 29981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-usb2-dr"; 30081c6fdb6SAnatolij Gustschin reg = <0x3000 0x600>; 30181c6fdb6SAnatolij Gustschin #address-cells = <1>; 30281c6fdb6SAnatolij Gustschin #size-cells = <0>; 30381c6fdb6SAnatolij Gustschin interrupts = <43 0x8>; 30481c6fdb6SAnatolij Gustschin dr_mode = "otg"; 30581c6fdb6SAnatolij Gustschin phy_type = "ulpi"; 306124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_USB1>; 307124fe7c5SGerhard Sittig clock-names = "ipg"; 30881c6fdb6SAnatolij Gustschin }; 30981c6fdb6SAnatolij Gustschin 31081c6fdb6SAnatolij Gustschin /* USB0 using internal UTMI PHY */ 31181c6fdb6SAnatolij Gustschin usb@4000 { 31281c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-usb2-dr"; 31381c6fdb6SAnatolij Gustschin reg = <0x4000 0x600>; 31481c6fdb6SAnatolij Gustschin #address-cells = <1>; 31581c6fdb6SAnatolij Gustschin #size-cells = <0>; 31681c6fdb6SAnatolij Gustschin interrupts = <44 0x8>; 31781c6fdb6SAnatolij Gustschin dr_mode = "otg"; 31881c6fdb6SAnatolij Gustschin phy_type = "utmi_wide"; 319124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_USB2>; 320124fe7c5SGerhard Sittig clock-names = "ipg"; 32181c6fdb6SAnatolij Gustschin }; 32281c6fdb6SAnatolij Gustschin 32381c6fdb6SAnatolij Gustschin /* IO control */ 32481c6fdb6SAnatolij Gustschin ioctl@a000 { 32581c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-ioctl"; 32681c6fdb6SAnatolij Gustschin reg = <0xA000 0x1000>; 32781c6fdb6SAnatolij Gustschin }; 32881c6fdb6SAnatolij Gustschin 32981c6fdb6SAnatolij Gustschin /* LocalPlus controller */ 33081c6fdb6SAnatolij Gustschin lpc@10000 { 33181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-lpc"; 33281c6fdb6SAnatolij Gustschin reg = <0x10000 0x200>; 33381c6fdb6SAnatolij Gustschin }; 33481c6fdb6SAnatolij Gustschin 33581c6fdb6SAnatolij Gustschin pata@10200 { 33681c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-pata"; 33781c6fdb6SAnatolij Gustschin reg = <0x10200 0x100>; 33881c6fdb6SAnatolij Gustschin interrupts = <5 0x8>; 339124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PATA>; 340124fe7c5SGerhard Sittig clock-names = "ipg"; 34181c6fdb6SAnatolij Gustschin }; 34281c6fdb6SAnatolij Gustschin 34381c6fdb6SAnatolij Gustschin /* 512x PSCs are not 52xx PSC compatible */ 34481c6fdb6SAnatolij Gustschin 34581c6fdb6SAnatolij Gustschin /* PSC0 */ 34681c6fdb6SAnatolij Gustschin psc@11000 { 34781c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 34881c6fdb6SAnatolij Gustschin reg = <0x11000 0x100>; 34981c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 35081c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 35181c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 352124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC0>, 353124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC0_MCLK>; 354124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 35581c6fdb6SAnatolij Gustschin }; 35681c6fdb6SAnatolij Gustschin 35781c6fdb6SAnatolij Gustschin /* PSC1 */ 35881c6fdb6SAnatolij Gustschin psc@11100 { 35981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 36081c6fdb6SAnatolij Gustschin reg = <0x11100 0x100>; 36181c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 36281c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 36381c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 364124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC1>, 365124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC1_MCLK>; 366124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 36781c6fdb6SAnatolij Gustschin }; 36881c6fdb6SAnatolij Gustschin 36981c6fdb6SAnatolij Gustschin /* PSC2 */ 37081c6fdb6SAnatolij Gustschin psc@11200 { 37181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 37281c6fdb6SAnatolij Gustschin reg = <0x11200 0x100>; 37381c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 37481c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 37581c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 376124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC2>, 377124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC2_MCLK>; 378124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 37981c6fdb6SAnatolij Gustschin }; 38081c6fdb6SAnatolij Gustschin 38181c6fdb6SAnatolij Gustschin /* PSC3 */ 38281c6fdb6SAnatolij Gustschin psc@11300 { 38381c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 38481c6fdb6SAnatolij Gustschin reg = <0x11300 0x100>; 38581c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 38681c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 38781c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 388124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC3>, 389124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC3_MCLK>; 390124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 39181c6fdb6SAnatolij Gustschin }; 39281c6fdb6SAnatolij Gustschin 39381c6fdb6SAnatolij Gustschin /* PSC4 */ 39481c6fdb6SAnatolij Gustschin psc@11400 { 39581c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 39681c6fdb6SAnatolij Gustschin reg = <0x11400 0x100>; 39781c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 39881c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 39981c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 400124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC4>, 401124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC4_MCLK>; 402124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 40381c6fdb6SAnatolij Gustschin }; 40481c6fdb6SAnatolij Gustschin 40581c6fdb6SAnatolij Gustschin /* PSC5 */ 40681c6fdb6SAnatolij Gustschin psc@11500 { 40781c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 40881c6fdb6SAnatolij Gustschin reg = <0x11500 0x100>; 40981c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 41081c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 41181c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 412124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC5>, 413124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC5_MCLK>; 414124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 41581c6fdb6SAnatolij Gustschin }; 41681c6fdb6SAnatolij Gustschin 41781c6fdb6SAnatolij Gustschin /* PSC6 */ 41881c6fdb6SAnatolij Gustschin psc@11600 { 41981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 42081c6fdb6SAnatolij Gustschin reg = <0x11600 0x100>; 42181c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 42281c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 42381c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 424124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC6>, 425124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC6_MCLK>; 426124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 42781c6fdb6SAnatolij Gustschin }; 42881c6fdb6SAnatolij Gustschin 42981c6fdb6SAnatolij Gustschin /* PSC7 */ 43081c6fdb6SAnatolij Gustschin psc@11700 { 43181c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 43281c6fdb6SAnatolij Gustschin reg = <0x11700 0x100>; 43381c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 43481c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 43581c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 436124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC7>, 437124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC7_MCLK>; 438124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 43981c6fdb6SAnatolij Gustschin }; 44081c6fdb6SAnatolij Gustschin 44181c6fdb6SAnatolij Gustschin /* PSC8 */ 44281c6fdb6SAnatolij Gustschin psc@11800 { 44381c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 44481c6fdb6SAnatolij Gustschin reg = <0x11800 0x100>; 44581c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 44681c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 44781c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 448124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC8>, 449124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC8_MCLK>; 450124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 45181c6fdb6SAnatolij Gustschin }; 45281c6fdb6SAnatolij Gustschin 45381c6fdb6SAnatolij Gustschin /* PSC9 */ 45481c6fdb6SAnatolij Gustschin psc@11900 { 45581c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 45681c6fdb6SAnatolij Gustschin reg = <0x11900 0x100>; 45781c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 45881c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 45981c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 460124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC9>, 461124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC9_MCLK>; 462124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 46381c6fdb6SAnatolij Gustschin }; 46481c6fdb6SAnatolij Gustschin 46581c6fdb6SAnatolij Gustschin /* PSC10 */ 46681c6fdb6SAnatolij Gustschin psc@11a00 { 46781c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 46881c6fdb6SAnatolij Gustschin reg = <0x11a00 0x100>; 46981c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 47081c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 47181c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 472124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC10>, 473124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC10_MCLK>; 474124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 47581c6fdb6SAnatolij Gustschin }; 47681c6fdb6SAnatolij Gustschin 47781c6fdb6SAnatolij Gustschin /* PSC11 */ 47881c6fdb6SAnatolij Gustschin psc@11b00 { 47981c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc"; 48081c6fdb6SAnatolij Gustschin reg = <0x11b00 0x100>; 48181c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 48281c6fdb6SAnatolij Gustschin fsl,rx-fifo-size = <16>; 48381c6fdb6SAnatolij Gustschin fsl,tx-fifo-size = <16>; 484124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC11>, 485124fe7c5SGerhard Sittig <&clks MPC512x_CLK_PSC11_MCLK>; 486124fe7c5SGerhard Sittig clock-names = "ipg", "mclk"; 48781c6fdb6SAnatolij Gustschin }; 48881c6fdb6SAnatolij Gustschin 48981c6fdb6SAnatolij Gustschin pscfifo@11f00 { 49081c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-psc-fifo"; 49181c6fdb6SAnatolij Gustschin reg = <0x11f00 0x100>; 49281c6fdb6SAnatolij Gustschin interrupts = <40 0x8>; 493124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PSC_FIFO>; 494124fe7c5SGerhard Sittig clock-names = "ipg"; 49581c6fdb6SAnatolij Gustschin }; 49681c6fdb6SAnatolij Gustschin 497fdeaf0e2SAnatolij Gustschin dma0: dma@14000 { 49881c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-dma"; 49981c6fdb6SAnatolij Gustschin reg = <0x14000 0x1800>; 50081c6fdb6SAnatolij Gustschin interrupts = <65 0x8>; 50181c6fdb6SAnatolij Gustschin }; 50281c6fdb6SAnatolij Gustschin }; 50381c6fdb6SAnatolij Gustschin 50481c6fdb6SAnatolij Gustschin pci: pci@80008500 { 50581c6fdb6SAnatolij Gustschin compatible = "fsl,mpc5121-pci"; 50681c6fdb6SAnatolij Gustschin device_type = "pci"; 50781c6fdb6SAnatolij Gustschin interrupts = <1 0x8>; 50881c6fdb6SAnatolij Gustschin clock-frequency = <0>; 50981c6fdb6SAnatolij Gustschin #address-cells = <3>; 51081c6fdb6SAnatolij Gustschin #size-cells = <2>; 51181c6fdb6SAnatolij Gustschin #interrupt-cells = <1>; 512124fe7c5SGerhard Sittig clocks = <&clks MPC512x_CLK_PCI>; 513124fe7c5SGerhard Sittig clock-names = "ipg"; 51481c6fdb6SAnatolij Gustschin 51581c6fdb6SAnatolij Gustschin reg = <0x80008500 0x100 /* internal registers */ 51681c6fdb6SAnatolij Gustschin 0x80008300 0x8>; /* config space access registers */ 51781c6fdb6SAnatolij Gustschin bus-range = <0x0 0x0>; 51881c6fdb6SAnatolij Gustschin ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 51981c6fdb6SAnatolij Gustschin 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 52081c6fdb6SAnatolij Gustschin 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>; 52181c6fdb6SAnatolij Gustschin }; 52281c6fdb6SAnatolij Gustschin}; 523