1/* 2 * Motion-PRO board Device Tree Source 3 * 4 * Copyright (C) 2007 Semihalf 5 * Marian Balakowicz <m8@semihalf.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13/* 14 * WARNING: Do not depend on this tree layout remaining static just yet. 15 * The MPC5200 device tree conventions are still in flux 16 * Keep an eye on the linuxppc-dev mailing list for more details 17 */ 18 19/ { 20 model = "promess,motionpro"; 21 compatible = "promess,motionpro"; 22 #address-cells = <1>; 23 #size-cells = <1>; 24 25 cpus { 26 #address-cells = <1>; 27 #size-cells = <0>; 28 29 PowerPC,5200@0 { 30 device_type = "cpu"; 31 reg = <0>; 32 d-cache-line-size = <20>; 33 i-cache-line-size = <20>; 34 d-cache-size = <4000>; // L1, 16K 35 i-cache-size = <4000>; // L1, 16K 36 timebase-frequency = <0>; // from bootloader 37 bus-frequency = <0>; // from bootloader 38 clock-frequency = <0>; // from bootloader 39 }; 40 }; 41 42 memory { 43 device_type = "memory"; 44 reg = <00000000 04000000>; // 64MB 45 }; 46 47 soc5200@f0000000 { 48 #address-cells = <1>; 49 #size-cells = <1>; 50 model = "fsl,mpc5200b"; 51 compatible = "fsl,mpc5200b"; 52 revision = ""; // from bootloader 53 device_type = "soc"; 54 ranges = <0 f0000000 0000c000>; 55 reg = <f0000000 00000100>; 56 bus-frequency = <0>; // from bootloader 57 system-frequency = <0>; // from bootloader 58 59 cdm@200 { 60 compatible = "mpc5200b-cdm","mpc5200-cdm"; 61 reg = <200 38>; 62 }; 63 64 mpc5200_pic: pic@500 { 65 // 5200 interrupts are encoded into two levels; 66 interrupt-controller; 67 #interrupt-cells = <3>; 68 compatible = "mpc5200b-pic","mpc5200-pic"; 69 reg = <500 80>; 70 }; 71 72 gpt@600 { // General Purpose Timer 73 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 reg = <600 10>; 75 interrupts = <1 9 0>; 76 interrupt-parent = <&mpc5200_pic>; 77 fsl,has-wdt; 78 }; 79 80 gpt@610 { // General Purpose Timer 81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 82 reg = <610 10>; 83 interrupts = <1 a 0>; 84 interrupt-parent = <&mpc5200_pic>; 85 }; 86 87 gpt@620 { // General Purpose Timer 88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 89 reg = <620 10>; 90 interrupts = <1 b 0>; 91 interrupt-parent = <&mpc5200_pic>; 92 }; 93 94 gpt@630 { // General Purpose Timer 95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 96 reg = <630 10>; 97 interrupts = <1 c 0>; 98 interrupt-parent = <&mpc5200_pic>; 99 }; 100 101 gpt@640 { // General Purpose Timer 102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 103 reg = <640 10>; 104 interrupts = <1 d 0>; 105 interrupt-parent = <&mpc5200_pic>; 106 }; 107 108 gpt@650 { // General Purpose Timer 109 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 110 reg = <650 10>; 111 interrupts = <1 e 0>; 112 interrupt-parent = <&mpc5200_pic>; 113 }; 114 115 motionpro-led@660 { // Motion-PRO status LED 116 compatible = "promess,motionpro-led"; 117 label = "motionpro-statusled"; 118 reg = <660 10>; 119 interrupts = <1 f 0>; 120 interrupt-parent = <&mpc5200_pic>; 121 blink-delay = <64>; // 100 msec 122 }; 123 124 motionpro-led@670 { // Motion-PRO ready LED 125 compatible = "promess,motionpro-led"; 126 label = "motionpro-readyled"; 127 reg = <670 10>; 128 interrupts = <1 10 0>; 129 interrupt-parent = <&mpc5200_pic>; 130 }; 131 132 rtc@800 { // Real time clock 133 compatible = "mpc5200b-rtc","mpc5200-rtc"; 134 reg = <800 100>; 135 interrupts = <1 5 0 1 6 0>; 136 interrupt-parent = <&mpc5200_pic>; 137 }; 138 139 mscan@980 { 140 compatible = "mpc5200b-mscan","mpc5200-mscan"; 141 interrupts = <2 12 0>; 142 interrupt-parent = <&mpc5200_pic>; 143 reg = <980 80>; 144 }; 145 146 gpio@b00 { 147 compatible = "mpc5200b-gpio","mpc5200-gpio"; 148 reg = <b00 40>; 149 interrupts = <1 7 0>; 150 interrupt-parent = <&mpc5200_pic>; 151 }; 152 153 gpio-wkup@c00 { 154 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 155 reg = <c00 40>; 156 interrupts = <1 8 0 0 3 0>; 157 interrupt-parent = <&mpc5200_pic>; 158 }; 159 160 161 spi@f00 { 162 compatible = "mpc5200b-spi","mpc5200-spi"; 163 reg = <f00 20>; 164 interrupts = <2 d 0 2 e 0>; 165 interrupt-parent = <&mpc5200_pic>; 166 }; 167 168 usb@1000 { 169 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be"; 170 reg = <1000 ff>; 171 interrupts = <2 6 0>; 172 interrupt-parent = <&mpc5200_pic>; 173 }; 174 175 dma-controller@1200 { 176 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 177 reg = <1200 80>; 178 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 179 3 4 0 3 5 0 3 6 0 3 7 0 180 3 8 0 3 9 0 3 a 0 3 b 0 181 3 c 0 3 d 0 3 e 0 3 f 0>; 182 interrupt-parent = <&mpc5200_pic>; 183 }; 184 185 xlb@1f00 { 186 compatible = "mpc5200b-xlb","mpc5200-xlb"; 187 reg = <1f00 100>; 188 }; 189 190 serial@2000 { // PSC1 191 device_type = "serial"; 192 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 193 port-number = <0>; // Logical port assignment 194 reg = <2000 100>; 195 interrupts = <2 1 0>; 196 interrupt-parent = <&mpc5200_pic>; 197 }; 198 199 // PSC2 in spi master mode 200 spi@2200 { // PSC2 201 compatible = "mpc5200b-psc-spi","mpc5200-psc-spi"; 202 cell-index = <1>; 203 reg = <2200 100>; 204 interrupts = <2 2 0>; 205 interrupt-parent = <&mpc5200_pic>; 206 }; 207 208 // PSC5 in uart mode 209 serial@2800 { // PSC5 210 device_type = "serial"; 211 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 212 port-number = <4>; // Logical port assignment 213 reg = <2800 100>; 214 interrupts = <2 c 0>; 215 interrupt-parent = <&mpc5200_pic>; 216 }; 217 218 ethernet@3000 { 219 device_type = "network"; 220 compatible = "mpc5200b-fec","mpc5200-fec"; 221 reg = <3000 800>; 222 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 223 interrupts = <2 5 0>; 224 interrupt-parent = <&mpc5200_pic>; 225 }; 226 227 ata@3a00 { 228 compatible = "mpc5200b-ata","mpc5200-ata"; 229 reg = <3a00 100>; 230 interrupts = <2 7 0>; 231 interrupt-parent = <&mpc5200_pic>; 232 }; 233 234 i2c@3d40 { 235 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 236 reg = <3d40 40>; 237 interrupts = <2 10 0>; 238 interrupt-parent = <&mpc5200_pic>; 239 fsl5200-clocking; 240 }; 241 242 sram@8000 { 243 compatible = "mpc5200b-sram","mpc5200-sram"; 244 reg = <8000 4000>; 245 }; 246 }; 247 248 lpb { 249 model = "fsl,lpb"; 250 compatible = "fsl,lpb"; 251 #address-cells = <2>; 252 #size-cells = <1>; 253 ranges = <1 0 50000000 00010000 254 2 0 50010000 00010000 255 3 0 50020000 00010000>; 256 257 // 8-bit DualPort SRAM on LocalPlus Bus CS1 258 kollmorgen@1,0 { 259 compatible = "promess,motionpro-kollmorgen"; 260 reg = <1 0 10000>; 261 interrupts = <1 1 0>; 262 interrupt-parent = <&mpc5200_pic>; 263 }; 264 265 // 8-bit board CPLD on LocalPlus Bus CS2 266 cpld@2,0 { 267 compatible = "promess,motionpro-cpld"; 268 reg = <2 0 10000>; 269 }; 270 271 // 8-bit custom Anybus Module on LocalPlus Bus CS3 272 anybus@3,0 { 273 compatible = "promess,motionpro-anybus"; 274 reg = <3 0 10000>; 275 }; 276 pro_module_general@3,0 { 277 compatible = "promess,pro_module_general"; 278 reg = <3 0 3>; 279 }; 280 pro_module_dio@3,800 { 281 compatible = "promess,pro_module_dio"; 282 reg = <3 800 2>; 283 }; 284 }; 285 286 pci@f0000d00 { 287 #interrupt-cells = <1>; 288 #size-cells = <2>; 289 #address-cells = <3>; 290 device_type = "pci"; 291 compatible = "mpc5200b-pci","mpc5200-pci"; 292 reg = <f0000d00 100>; 293 interrupt-map-mask = <f800 0 0 7>; 294 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 295 c000 0 0 2 &mpc5200_pic 1 1 3 296 c000 0 0 3 &mpc5200_pic 1 2 3 297 c000 0 0 4 &mpc5200_pic 1 3 3 298 299 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot 300 c800 0 0 2 &mpc5200_pic 1 2 3 301 c800 0 0 3 &mpc5200_pic 1 3 3 302 c800 0 0 4 &mpc5200_pic 0 0 3>; 303 clock-frequency = <0>; // From boot loader 304 interrupts = <2 8 0 2 9 0 2 a 0>; 305 interrupt-parent = <&mpc5200_pic>; 306 bus-range = <0 0>; 307 ranges = <42000000 0 80000000 80000000 0 20000000 308 02000000 0 a0000000 a0000000 0 10000000 309 01000000 0 00000000 b0000000 0 01000000>; 310 }; 311}; 312