1/* 2 * Motion-PRO board Device Tree Source 3 * 4 * Copyright (C) 2007 Semihalf 5 * Marian Balakowicz <m8@semihalf.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13/ { 14 model = "promess,motionpro"; 15 compatible = "promess,motionpro"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 19 cpus { 20 #address-cells = <1>; 21 #size-cells = <0>; 22 23 PowerPC,5200@0 { 24 device_type = "cpu"; 25 reg = <0>; 26 d-cache-line-size = <20>; 27 i-cache-line-size = <20>; 28 d-cache-size = <4000>; // L1, 16K 29 i-cache-size = <4000>; // L1, 16K 30 timebase-frequency = <0>; // from bootloader 31 bus-frequency = <0>; // from bootloader 32 clock-frequency = <0>; // from bootloader 33 }; 34 }; 35 36 memory { 37 device_type = "memory"; 38 reg = <00000000 04000000>; // 64MB 39 }; 40 41 soc5200@f0000000 { 42 #address-cells = <1>; 43 #size-cells = <1>; 44 compatible = "fsl,mpc5200b-immr"; 45 ranges = <0 f0000000 0000c000>; 46 reg = <f0000000 00000100>; 47 bus-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader 49 50 cdm@200 { 51 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 52 reg = <200 38>; 53 }; 54 55 mpc5200_pic: interrupt-controller@500 { 56 // 5200 interrupts are encoded into two levels; 57 interrupt-controller; 58 #interrupt-cells = <3>; 59 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 60 reg = <500 80>; 61 }; 62 63 timer@600 { // General Purpose Timer 64 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 65 reg = <600 10>; 66 interrupts = <1 9 0>; 67 interrupt-parent = <&mpc5200_pic>; 68 fsl,has-wdt; 69 }; 70 71 timer@610 { // General Purpose Timer 72 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 73 reg = <610 10>; 74 interrupts = <1 a 0>; 75 interrupt-parent = <&mpc5200_pic>; 76 }; 77 78 timer@620 { // General Purpose Timer 79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 reg = <620 10>; 81 interrupts = <1 b 0>; 82 interrupt-parent = <&mpc5200_pic>; 83 }; 84 85 timer@630 { // General Purpose Timer 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 87 reg = <630 10>; 88 interrupts = <1 c 0>; 89 interrupt-parent = <&mpc5200_pic>; 90 }; 91 92 timer@640 { // General Purpose Timer 93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 94 reg = <640 10>; 95 interrupts = <1 d 0>; 96 interrupt-parent = <&mpc5200_pic>; 97 }; 98 99 timer@650 { // General Purpose Timer 100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 101 reg = <650 10>; 102 interrupts = <1 e 0>; 103 interrupt-parent = <&mpc5200_pic>; 104 }; 105 106 motionpro-led@660 { // Motion-PRO status LED 107 compatible = "promess,motionpro-led"; 108 label = "motionpro-statusled"; 109 reg = <660 10>; 110 interrupts = <1 f 0>; 111 interrupt-parent = <&mpc5200_pic>; 112 blink-delay = <64>; // 100 msec 113 }; 114 115 motionpro-led@670 { // Motion-PRO ready LED 116 compatible = "promess,motionpro-led"; 117 label = "motionpro-readyled"; 118 reg = <670 10>; 119 interrupts = <1 10 0>; 120 interrupt-parent = <&mpc5200_pic>; 121 }; 122 123 rtc@800 { // Real time clock 124 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 125 reg = <800 100>; 126 interrupts = <1 5 0 1 6 0>; 127 interrupt-parent = <&mpc5200_pic>; 128 }; 129 130 mscan@980 { 131 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 132 interrupts = <2 12 0>; 133 interrupt-parent = <&mpc5200_pic>; 134 reg = <980 80>; 135 }; 136 137 gpio@b00 { 138 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 139 reg = <b00 40>; 140 interrupts = <1 7 0>; 141 interrupt-parent = <&mpc5200_pic>; 142 }; 143 144 gpio@c00 { 145 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 146 reg = <c00 40>; 147 interrupts = <1 8 0 0 3 0>; 148 interrupt-parent = <&mpc5200_pic>; 149 }; 150 151 spi@f00 { 152 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 153 reg = <f00 20>; 154 interrupts = <2 d 0 2 e 0>; 155 interrupt-parent = <&mpc5200_pic>; 156 }; 157 158 usb@1000 { 159 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 160 reg = <1000 ff>; 161 interrupts = <2 6 0>; 162 interrupt-parent = <&mpc5200_pic>; 163 }; 164 165 dma-controller@1200 { 166 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 167 reg = <1200 80>; 168 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 169 3 4 0 3 5 0 3 6 0 3 7 0 170 3 8 0 3 9 0 3 a 0 3 b 0 171 3 c 0 3 d 0 3 e 0 3 f 0>; 172 interrupt-parent = <&mpc5200_pic>; 173 }; 174 175 xlb@1f00 { 176 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; 177 reg = <1f00 100>; 178 }; 179 180 serial@2000 { // PSC1 181 device_type = "serial"; 182 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 183 port-number = <0>; // Logical port assignment 184 reg = <2000 100>; 185 interrupts = <2 1 0>; 186 interrupt-parent = <&mpc5200_pic>; 187 }; 188 189 // PSC2 in spi master mode 190 spi@2200 { // PSC2 191 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; 192 cell-index = <1>; 193 reg = <2200 100>; 194 interrupts = <2 2 0>; 195 interrupt-parent = <&mpc5200_pic>; 196 }; 197 198 // PSC5 in uart mode 199 serial@2800 { // PSC5 200 device_type = "serial"; 201 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 202 port-number = <4>; // Logical port assignment 203 reg = <2800 100>; 204 interrupts = <2 c 0>; 205 interrupt-parent = <&mpc5200_pic>; 206 }; 207 208 ethernet@3000 { 209 device_type = "network"; 210 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 211 reg = <3000 400>; 212 local-mac-address = [ 00 00 00 00 00 00 ]; 213 interrupts = <2 5 0>; 214 interrupt-parent = <&mpc5200_pic>; 215 phy-handle = <&phy0>; 216 }; 217 218 mdio@3000 { 219 #address-cells = <1>; 220 #size-cells = <0>; 221 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 222 reg = <3000 400>; // fec range, since we need to setup fec interrupts 223 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 224 interrupt-parent = <&mpc5200_pic>; 225 226 phy0: ethernet-phy@2 { 227 device_type = "ethernet-phy"; 228 reg = <2>; 229 }; 230 }; 231 232 ata@3a00 { 233 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 234 reg = <3a00 100>; 235 interrupts = <2 7 0>; 236 interrupt-parent = <&mpc5200_pic>; 237 }; 238 239 i2c@3d40 { 240 #address-cells = <1>; 241 #size-cells = <0>; 242 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 243 reg = <3d40 40>; 244 interrupts = <2 10 0>; 245 interrupt-parent = <&mpc5200_pic>; 246 fsl5200-clocking; 247 248 rtc@68 { 249 device_type = "rtc"; 250 compatible = "dallas,ds1339"; 251 reg = <68>; 252 }; 253 }; 254 255 sram@8000 { 256 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; 257 reg = <8000 4000>; 258 }; 259 }; 260 261 lpb { 262 compatible = "fsl,lpb"; 263 #address-cells = <2>; 264 #size-cells = <1>; 265 ranges = <0 0 ff000000 01000000 266 1 0 50000000 00010000 267 2 0 50010000 00010000 268 3 0 50020000 00010000>; 269 270 // 8-bit DualPort SRAM on LocalPlus Bus CS1 271 kollmorgen@1,0 { 272 compatible = "promess,motionpro-kollmorgen"; 273 reg = <1 0 10000>; 274 interrupts = <1 1 0>; 275 interrupt-parent = <&mpc5200_pic>; 276 }; 277 278 // 8-bit board CPLD on LocalPlus Bus CS2 279 cpld@2,0 { 280 compatible = "promess,motionpro-cpld"; 281 reg = <2 0 10000>; 282 }; 283 284 // 8-bit custom Anybus Module on LocalPlus Bus CS3 285 anybus@3,0 { 286 compatible = "promess,motionpro-anybus"; 287 reg = <3 0 10000>; 288 }; 289 pro_module_general@3,0 { 290 compatible = "promess,pro_module_general"; 291 reg = <3 0 3>; 292 }; 293 pro_module_dio@3,800 { 294 compatible = "promess,pro_module_dio"; 295 reg = <3 800 2>; 296 }; 297 298 // 16-bit flash device at LocalPlus Bus CS0 299 flash@0,0 { 300 compatible = "cfi-flash"; 301 reg = <0 0 01000000>; 302 bank-width = <2>; 303 device-width = <2>; 304 #size-cells = <1>; 305 #address-cells = <1>; 306 }; 307 }; 308}; 309