1/* 2 * Device Tree for the MGCOGE plattform from keymile 3 * 4 * Copyright 2008 DENX Software Engineering GmbH 5 * Heiko Schocher <hs@denx.de> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13/dts-v1/; 14/ { 15 model = "MGCOGE"; 16 compatible = "keymile,km82xx"; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 aliases { 21 ethernet0 = ð0; 22 serial0 = &smc2; 23 }; 24 25 cpus { 26 #address-cells = <1>; 27 #size-cells = <0>; 28 29 PowerPC,8247@0 { 30 device_type = "cpu"; 31 reg = <0>; 32 d-cache-line-size = <32>; 33 i-cache-line-size = <32>; 34 d-cache-size = <16384>; 35 i-cache-size = <16384>; 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 clock-frequency = <0>; /* Filled in by U-Boot */ 38 bus-frequency = <0>; /* Filled in by U-Boot */ 39 }; 40 }; 41 42 localbus@f0010100 { 43 compatible = "fsl,mpc8247-localbus", 44 "fsl,pq2-localbus", 45 "simple-bus"; 46 #address-cells = <2>; 47 #size-cells = <1>; 48 reg = <0xf0010100 0x40>; 49 50 ranges = <0 0 0xfe000000 0x00400000 51 1 0 0x30000000 0x00010000 52 2 0 0x40000000 0x00010000 53 5 0 0x50000000 0x04000000 54 >; 55 56 flash@0,0 { 57 compatible = "cfi-flash"; 58 reg = <0 0x0 0x400000>; 59 #address-cells = <1>; 60 #size-cells = <1>; 61 bank-width = <1>; 62 device-width = <1>; 63 partition@0 { 64 label = "u-boot"; 65 reg = <0x00000 0xC0000>; 66 }; 67 partition@1 { 68 label = "env"; 69 reg = <0xC0000 0x20000>; 70 }; 71 partition@2 { 72 label = "envred"; 73 reg = <0xE0000 0x20000>; 74 }; 75 partition@3 { 76 label = "free"; 77 reg = <0x100000 0x300000>; 78 }; 79 }; 80 81 flash@5,0 { 82 compatible = "cfi-flash"; 83 reg = <5 0x00000000 0x02000000 84 5 0x02000000 0x02000000>; 85 #address-cells = <1>; 86 #size-cells = <1>; 87 bank-width = <2>; 88 partition@app { /* 64 MBytes */ 89 label = "ubi0"; 90 reg = <0x00000000 0x04000000>; 91 }; 92 }; 93 }; 94 95 memory { 96 device_type = "memory"; 97 reg = <0 0>; /* Filled in by U-Boot */ 98 }; 99 100 soc@f0000000 { 101 #address-cells = <1>; 102 #size-cells = <1>; 103 compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus"; 104 ranges = <0x00000000 0xf0000000 0x00053000>; 105 106 // Temporary until code stops depending on it. 107 device_type = "soc"; 108 109 cpm@119c0 { 110 #address-cells = <1>; 111 #size-cells = <1>; 112 #interrupt-cells = <2>; 113 compatible = "fsl,mpc8247-cpm", "fsl,cpm2", 114 "simple-bus"; 115 reg = <0x119c0 0x30>; 116 ranges; 117 118 muram { 119 compatible = "fsl,cpm-muram"; 120 #address-cells = <1>; 121 #size-cells = <1>; 122 ranges = <0 0 0x10000>; 123 124 data@0 { 125 compatible = "fsl,cpm-muram-data"; 126 reg = <0x80 0x1f80 0x9800 0x800>; 127 }; 128 }; 129 130 brg@119f0 { 131 compatible = "fsl,mpc8247-brg", 132 "fsl,cpm2-brg", 133 "fsl,cpm-brg"; 134 reg = <0x119f0 0x10 0x115f0 0x10>; 135 }; 136 137 /* Monitor port/SMC2 */ 138 smc2: serial@11a90 { 139 device_type = "serial"; 140 compatible = "fsl,mpc8247-smc-uart", 141 "fsl,cpm2-smc-uart"; 142 reg = <0x11a90 0x20 0x88fc 0x02>; 143 interrupts = <5 8>; 144 interrupt-parent = <&PIC>; 145 fsl,cpm-brg = <2>; 146 fsl,cpm-command = <0x21200000>; 147 current-speed = <0>; /* Filled in by U-Boot */ 148 }; 149 150 eth0: ethernet@11a60 { 151 device_type = "network"; 152 compatible = "fsl,mpc8247-scc-enet", 153 "fsl,cpm2-scc-enet"; 154 reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>; 155 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 156 interrupts = <43 8>; 157 interrupt-parent = <&PIC>; 158 linux,network-index = <0>; 159 fsl,cpm-command = <0xce00000>; 160 fixed-link = <0 0 10 0 0>; 161 }; 162 163 i2c@11860 { 164 compatible = "fsl,mpc8272-i2c", 165 "fsl,cpm2-i2c"; 166 reg = <0x11860 0x20 0x8afc 0x2>; 167 interrupts = <1 8>; 168 interrupt-parent = <&PIC>; 169 fsl,cpm-command = <0x29600000>; 170 #address-cells = <1>; 171 #size-cells = <0>; 172 }; 173 174 mdio@10d40 { 175 compatible = "fsl,cpm2-mdio-bitbang"; 176 reg = <0x10d00 0x14>; 177 #address-cells = <1>; 178 #size-cells = <0>; 179 fsl,mdio-pin = <12>; 180 fsl,mdc-pin = <13>; 181 182 phy0: ethernet-phy@0 { 183 reg = <0x0>; 184 }; 185 186 phy1: ethernet-phy@1 { 187 reg = <0x1>; 188 }; 189 }; 190 191 /* FCC1 management to switch */ 192 ethernet@11300 { 193 device_type = "network"; 194 compatible = "fsl,cpm2-fcc-enet"; 195 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; 196 local-mac-address = [ 00 01 02 03 04 07 ]; 197 interrupts = <32 8>; 198 interrupt-parent = <&PIC>; 199 phy-handle = <&phy0>; 200 linux,network-index = <1>; 201 fsl,cpm-command = <0x12000300>; 202 }; 203 204 /* FCC2 to redundant core unit over backplane */ 205 ethernet@11320 { 206 device_type = "network"; 207 compatible = "fsl,cpm2-fcc-enet"; 208 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; 209 local-mac-address = [ 00 01 02 03 04 08 ]; 210 interrupts = <33 8>; 211 interrupt-parent = <&PIC>; 212 phy-handle = <&phy1>; 213 linux,network-index = <2>; 214 fsl,cpm-command = <0x16200300>; 215 }; 216 }; 217 218 cpm2_pio_c: gpio-controller@10d40 { 219 #gpio-cells = <2>; 220 compatible = "fsl,cpm2-pario-bank"; 221 reg = <0x10d40 0x14>; 222 gpio-controller; 223 }; 224 225 PIC: interrupt-controller@10c00 { 226 #interrupt-cells = <2>; 227 interrupt-controller; 228 reg = <0x10c00 0x80>; 229 compatible = "fsl,mpc8247-pic", "fsl,pq2-pic"; 230 }; 231 }; 232}; 233