1/*
2 * Device Tree Source for AMCC Makalu (405EX)
3 *
4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2.  This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/ {
14	#address-cells = <1>;
15	#size-cells = <1>;
16	model = "amcc,makalu";
17	compatible = "amcc,makalu";
18	dcr-parent = <&{/cpus/cpu@0}>;
19
20	aliases {
21		ethernet0 = &EMAC0;
22		ethernet1 = &EMAC1;
23		serial0 = &UART0;
24		serial1 = &UART1;
25	};
26
27	cpus {
28		#address-cells = <1>;
29		#size-cells = <0>;
30
31		cpu@0 {
32			device_type = "cpu";
33			model = "PowerPC,405EX";
34			reg = <0x00000000>;
35			clock-frequency = <0>; /* Filled in by U-Boot */
36			timebase-frequency = <0>; /* Filled in by U-Boot */
37			i-cache-line-size = <32>;
38			d-cache-line-size = <32>;
39			i-cache-size = <16384>; /* 16 kB */
40			d-cache-size = <16384>; /* 16 kB */
41			dcr-controller;
42			dcr-access-method = "native";
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
49	};
50
51	UIC0: interrupt-controller {
52		compatible = "ibm,uic-405ex", "ibm,uic";
53		interrupt-controller;
54		cell-index = <0>;
55		dcr-reg = <0x0c0 0x009>;
56		#address-cells = <0>;
57		#size-cells = <0>;
58		#interrupt-cells = <2>;
59	};
60
61	UIC1: interrupt-controller1 {
62		compatible = "ibm,uic-405ex","ibm,uic";
63		interrupt-controller;
64		cell-index = <1>;
65		dcr-reg = <0x0d0 0x009>;
66		#address-cells = <0>;
67		#size-cells = <0>;
68		#interrupt-cells = <2>;
69		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
70		interrupt-parent = <&UIC0>;
71	};
72
73	UIC2: interrupt-controller2 {
74		compatible = "ibm,uic-405ex","ibm,uic";
75		interrupt-controller;
76		cell-index = <2>;
77		dcr-reg = <0x0e0 0x009>;
78		#address-cells = <0>;
79		#size-cells = <0>;
80		#interrupt-cells = <2>;
81		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
82		interrupt-parent = <&UIC0>;
83	};
84
85	plb {
86		compatible = "ibm,plb-405ex", "ibm,plb4";
87		#address-cells = <1>;
88		#size-cells = <1>;
89		ranges;
90		clock-frequency = <0>; /* Filled in by U-Boot */
91
92		SDRAM0: memory-controller {
93			compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
94			dcr-reg = <0x010 0x002>;
95			interrupt-parent = <&UIC2>;
96			interrupts = <0x5 0x4 /* ECC DED Error */
97			              0x6 0x4 /* ECC SEC Error */ >;
98		};
99
100		MAL0: mcmal {
101			compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
102			dcr-reg = <0x180 0x062>;
103			num-tx-chans = <2>;
104			num-rx-chans = <2>;
105			interrupt-parent = <&MAL0>;
106			interrupts = <0x0 0x1 0x2 0x3 0x4>;
107			#interrupt-cells = <1>;
108			#address-cells = <0>;
109			#size-cells = <0>;
110			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
111					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
112					/*SERR*/  0x2 &UIC1 0x0 0x4
113					/*TXDE*/  0x3 &UIC1 0x1 0x4
114					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
115			interrupt-map-mask = <0xffffffff>;
116		};
117
118		POB0: opb {
119			compatible = "ibm,opb-405ex", "ibm,opb";
120			#address-cells = <1>;
121			#size-cells = <1>;
122			ranges = <0x80000000 0x80000000 0x10000000
123				  0xef600000 0xef600000 0x00a00000
124				  0xf0000000 0xf0000000 0x10000000>;
125			dcr-reg = <0x0a0 0x005>;
126			clock-frequency = <0>; /* Filled in by U-Boot */
127
128			EBC0: ebc {
129				compatible = "ibm,ebc-405ex", "ibm,ebc";
130				dcr-reg = <0x012 0x002>;
131				#address-cells = <2>;
132				#size-cells = <1>;
133				clock-frequency = <0>; /* Filled in by U-Boot */
134				/* ranges property is supplied by U-Boot */
135				interrupts = <0x5 0x1>;
136				interrupt-parent = <&UIC1>;
137
138				nor_flash@0,0 {
139					compatible = "amd,s29gl512n", "cfi-flash";
140					bank-width = <2>;
141					reg = <0x00000000 0x00000000 0x04000000>;
142					#address-cells = <1>;
143					#size-cells = <1>;
144					partition@0 {
145						label = "kernel";
146						reg = <0x00000000 0x00200000>;
147					};
148					partition@200000 {
149						label = "root";
150						reg = <0x00200000 0x00200000>;
151					};
152					partition@400000 {
153						label = "user";
154						reg = <0x00400000 0x03b60000>;
155					};
156					partition@3f60000 {
157						label = "env";
158						reg = <0x03f60000 0x00040000>;
159					};
160					partition@3fa0000 {
161						label = "u-boot";
162						reg = <0x03fa0000 0x00060000>;
163					};
164				};
165			};
166
167			UART0: serial@ef600200 {
168				device_type = "serial";
169				compatible = "ns16550";
170				reg = <0xef600200 0x00000008>;
171				virtual-reg = <0xef600200>;
172				clock-frequency = <0>; /* Filled in by U-Boot */
173				current-speed = <0>;
174				interrupt-parent = <&UIC0>;
175				interrupts = <0x1a 0x4>;
176			};
177
178			UART1: serial@ef600300 {
179				device_type = "serial";
180				compatible = "ns16550";
181				reg = <0xef600300 0x00000008>;
182				virtual-reg = <0xef600300>;
183				clock-frequency = <0>; /* Filled in by U-Boot */
184				current-speed = <0>;
185				interrupt-parent = <&UIC0>;
186				interrupts = <0x1 0x4>;
187			};
188
189			IIC0: i2c@ef600400 {
190				compatible = "ibm,iic-405ex", "ibm,iic";
191				reg = <0xef600400 0x00000014>;
192				interrupt-parent = <&UIC0>;
193				interrupts = <0x2 0x4>;
194			};
195
196			IIC1: i2c@ef600500 {
197				compatible = "ibm,iic-405ex", "ibm,iic";
198				reg = <0xef600500 0x00000014>;
199				interrupt-parent = <&UIC0>;
200				interrupts = <0x7 0x4>;
201			};
202
203
204			RGMII0: emac-rgmii@ef600b00 {
205				compatible = "ibm,rgmii-405ex", "ibm,rgmii";
206				reg = <0xef600b00 0x00000104>;
207				has-mdio;
208			};
209
210			EMAC0: ethernet@ef600900 {
211				linux,network-index = <0x0>;
212				device_type = "network";
213				compatible = "ibm,emac-405ex", "ibm,emac4sync";
214				interrupt-parent = <&EMAC0>;
215				interrupts = <0x0 0x1>;
216				#interrupt-cells = <1>;
217				#address-cells = <0>;
218				#size-cells = <0>;
219				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
220						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
221				reg = <0xef600900 0x000000c4>;
222				local-mac-address = [000000000000]; /* Filled in by U-Boot */
223				mal-device = <&MAL0>;
224				mal-tx-channel = <0>;
225				mal-rx-channel = <0>;
226				cell-index = <0>;
227				max-frame-size = <9000>;
228				rx-fifo-size = <4096>;
229				tx-fifo-size = <2048>;
230				rx-fifo-size-gige = <16384>;
231				tx-fifo-size-gige = <16384>;
232				phy-mode = "rgmii";
233				phy-map = <0x0000003f>;	/* Start at 6 */
234				rgmii-device = <&RGMII0>;
235				rgmii-channel = <0>;
236				has-inverted-stacr-oc;
237				has-new-stacr-staopc;
238			};
239
240			EMAC1: ethernet@ef600a00 {
241				linux,network-index = <0x1>;
242				device_type = "network";
243				compatible = "ibm,emac-405ex", "ibm,emac4sync";
244				interrupt-parent = <&EMAC1>;
245				interrupts = <0x0 0x1>;
246				#interrupt-cells = <1>;
247				#address-cells = <0>;
248				#size-cells = <0>;
249				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
250						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
251				reg = <0xef600a00 0x000000c4>;
252				local-mac-address = [000000000000]; /* Filled in by U-Boot */
253				mal-device = <&MAL0>;
254				mal-tx-channel = <1>;
255				mal-rx-channel = <1>;
256				cell-index = <1>;
257				max-frame-size = <9000>;
258				rx-fifo-size = <4096>;
259				tx-fifo-size = <2048>;
260                                rx-fifo-size-gige = <16384>;
261                                tx-fifo-size-gige = <16384>;
262				phy-mode = "rgmii";
263				phy-map = <0x00000000>;
264				rgmii-device = <&RGMII0>;
265				rgmii-channel = <1>;
266				has-inverted-stacr-oc;
267				has-new-stacr-staopc;
268			};
269		};
270
271		PCIE0: pciex@0a0000000 {
272			device_type = "pci";
273			#interrupt-cells = <1>;
274			#size-cells = <2>;
275			#address-cells = <3>;
276			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
277			primary;
278			port = <0x0>; /* port number */
279			reg = <0xa0000000 0x20000000	/* Config space access */
280			       0xef000000 0x00001000>;	/* Registers */
281			dcr-reg = <0x040 0x020>;
282			sdr-base = <0x400>;
283
284			/* Outbound ranges, one memory and one IO,
285			 * later cannot be changed
286			 */
287			ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
288				  0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
289
290			/* Inbound 2GB range starting at 0 */
291			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
292
293			/* This drives busses 0x00 to 0x3f */
294			bus-range = <0x0 0x3f>;
295
296			/* Legacy interrupts (note the weird polarity, the bridge seems
297			 * to invert PCIe legacy interrupts).
298			 * We are de-swizzling here because the numbers are actually for
299			 * port of the root complex virtual P2P bridge. But I want
300			 * to avoid putting a node for it in the tree, so the numbers
301			 * below are basically de-swizzled numbers.
302			 * The real slot is on idsel 0, so the swizzling is 1:1
303			 */
304			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
305			interrupt-map = <
306				0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
307				0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
308				0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
309				0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
310		};
311
312		PCIE1: pciex@0c0000000 {
313			device_type = "pci";
314			#interrupt-cells = <1>;
315			#size-cells = <2>;
316			#address-cells = <3>;
317			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
318			primary;
319			port = <0x1>; /* port number */
320			reg = <0xc0000000 0x20000000	/* Config space access */
321			       0xef001000 0x00001000>;	/* Registers */
322			dcr-reg = <0x060 0x020>;
323			sdr-base = <0x440>;
324
325			/* Outbound ranges, one memory and one IO,
326			 * later cannot be changed
327			 */
328			ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
329				  0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
330
331			/* Inbound 2GB range starting at 0 */
332			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
333
334			/* This drives busses 0x40 to 0x7f */
335			bus-range = <0x40 0x7f>;
336
337			/* Legacy interrupts (note the weird polarity, the bridge seems
338			 * to invert PCIe legacy interrupts).
339			 * We are de-swizzling here because the numbers are actually for
340			 * port of the root complex virtual P2P bridge. But I want
341			 * to avoid putting a node for it in the tree, so the numbers
342			 * below are basically de-swizzled numbers.
343			 * The real slot is on idsel 0, so the swizzling is 1:1
344			 */
345			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
346			interrupt-map = <
347				0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
348				0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
349				0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
350				0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
351		};
352	};
353};
354