1c6d4d657SGrant Likely/* 2c6d4d657SGrant Likely * Lite5200B board Device Tree Source 3c6d4d657SGrant Likely * 405cbbc69SGrant Likely * Copyright 2006-2007 Secret Lab Technologies Ltd. 5c6d4d657SGrant Likely * Grant Likely <grant.likely@secretlab.ca> 6c6d4d657SGrant Likely * 7c6d4d657SGrant Likely * This program is free software; you can redistribute it and/or modify it 8c6d4d657SGrant Likely * under the terms of the GNU General Public License as published by the 9c6d4d657SGrant Likely * Free Software Foundation; either version 2 of the License, or (at your 10c6d4d657SGrant Likely * option) any later version. 11c6d4d657SGrant Likely */ 12c6d4d657SGrant Likely 13a2884f37SGrant Likely/dts-v1/; 14121361f7SGrant Likely 15c6d4d657SGrant Likely/ { 1605cbbc69SGrant Likely model = "fsl,lite5200b"; 175b5820d0SMarian Balakowicz compatible = "fsl,lite5200b"; 18c6d4d657SGrant Likely #address-cells = <1>; 19c6d4d657SGrant Likely #size-cells = <1>; 20b8842451SGrant Likely interrupt-parent = <&mpc5200_pic>; 21c6d4d657SGrant Likely 22c6d4d657SGrant Likely cpus { 23c6d4d657SGrant Likely #address-cells = <1>; 24c6d4d657SGrant Likely #size-cells = <0>; 25c6d4d657SGrant Likely 26c6d4d657SGrant Likely PowerPC,5200@0 { 27c6d4d657SGrant Likely device_type = "cpu"; 28c6d4d657SGrant Likely reg = <0>; 29a2884f37SGrant Likely d-cache-line-size = <32>; 30a2884f37SGrant Likely i-cache-line-size = <32>; 31a2884f37SGrant Likely d-cache-size = <0x4000>; // L1, 16K 32a2884f37SGrant Likely i-cache-size = <0x4000>; // L1, 16K 33c6d4d657SGrant Likely timebase-frequency = <0>; // from bootloader 34c6d4d657SGrant Likely bus-frequency = <0>; // from bootloader 35c6d4d657SGrant Likely clock-frequency = <0>; // from bootloader 36c6d4d657SGrant Likely }; 37c6d4d657SGrant Likely }; 38c6d4d657SGrant Likely 39c6d4d657SGrant Likely memory { 40c6d4d657SGrant Likely device_type = "memory"; 41a2884f37SGrant Likely reg = <0x00000000 0x10000000>; // 256MB 42c6d4d657SGrant Likely }; 43c6d4d657SGrant Likely 44c6d4d657SGrant Likely soc5200@f0000000 { 4558a5be39SPaul Gortmaker #address-cells = <1>; 4658a5be39SPaul Gortmaker #size-cells = <1>; 4724ce6bc4SGrant Likely compatible = "fsl,mpc5200b-immr"; 48a2884f37SGrant Likely ranges = <0 0xf0000000 0x0000c000>; 49a2884f37SGrant Likely reg = <0xf0000000 0x00000100>; 50c6d4d657SGrant Likely bus-frequency = <0>; // from bootloader 5105cbbc69SGrant Likely system-frequency = <0>; // from bootloader 52c6d4d657SGrant Likely 53c6d4d657SGrant Likely cdm@200 { 5424ce6bc4SGrant Likely compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 55a2884f37SGrant Likely reg = <0x200 0x38>; 56c6d4d657SGrant Likely }; 57c6d4d657SGrant Likely 5824ce6bc4SGrant Likely mpc5200_pic: interrupt-controller@500 { 59c6d4d657SGrant Likely // 5200 interrupts are encoded into two levels; 60c6d4d657SGrant Likely interrupt-controller; 61c6d4d657SGrant Likely #interrupt-cells = <3>; 6224ce6bc4SGrant Likely compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 63a2884f37SGrant Likely reg = <0x500 0x80>; 64c6d4d657SGrant Likely }; 65c6d4d657SGrant Likely 6624ce6bc4SGrant Likely timer@600 { // General Purpose Timer 67d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 68a2884f37SGrant Likely reg = <0x600 0x10>; 69c6d4d657SGrant Likely interrupts = <1 9 0>; 70d24bc314SMarian Balakowicz fsl,has-wdt; 71c6d4d657SGrant Likely }; 72c6d4d657SGrant Likely 7324ce6bc4SGrant Likely timer@610 { // General Purpose Timer 74d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 75a2884f37SGrant Likely reg = <0x610 0x10>; 76a2884f37SGrant Likely interrupts = <1 10 0>; 77c6d4d657SGrant Likely }; 78c6d4d657SGrant Likely 7924ce6bc4SGrant Likely timer@620 { // General Purpose Timer 80d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 81a2884f37SGrant Likely reg = <0x620 0x10>; 82a2884f37SGrant Likely interrupts = <1 11 0>; 83c6d4d657SGrant Likely }; 84c6d4d657SGrant Likely 8524ce6bc4SGrant Likely timer@630 { // General Purpose Timer 86d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 87a2884f37SGrant Likely reg = <0x630 0x10>; 88a2884f37SGrant Likely interrupts = <1 12 0>; 89c6d4d657SGrant Likely }; 90c6d4d657SGrant Likely 9124ce6bc4SGrant Likely timer@640 { // General Purpose Timer 92d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 93a2884f37SGrant Likely reg = <0x640 0x10>; 94a2884f37SGrant Likely interrupts = <1 13 0>; 95c6d4d657SGrant Likely }; 96c6d4d657SGrant Likely 9724ce6bc4SGrant Likely timer@650 { // General Purpose Timer 98d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 99a2884f37SGrant Likely reg = <0x650 0x10>; 100a2884f37SGrant Likely interrupts = <1 14 0>; 101c6d4d657SGrant Likely }; 102c6d4d657SGrant Likely 10324ce6bc4SGrant Likely timer@660 { // General Purpose Timer 104d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 105a2884f37SGrant Likely reg = <0x660 0x10>; 106a2884f37SGrant Likely interrupts = <1 15 0>; 107c6d4d657SGrant Likely }; 108c6d4d657SGrant Likely 10924ce6bc4SGrant Likely timer@670 { // General Purpose Timer 110d24bc314SMarian Balakowicz compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 111a2884f37SGrant Likely reg = <0x670 0x10>; 112a2884f37SGrant Likely interrupts = <1 16 0>; 113c6d4d657SGrant Likely }; 114c6d4d657SGrant Likely 115c6d4d657SGrant Likely rtc@800 { // Real time clock 11624ce6bc4SGrant Likely compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 117a2884f37SGrant Likely reg = <0x800 0x100>; 118c6d4d657SGrant Likely interrupts = <1 5 0 1 6 0>; 119c6d4d657SGrant Likely }; 120c6d4d657SGrant Likely 12124ce6bc4SGrant Likely can@900 { 12224ce6bc4SGrant Likely compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 123a2884f37SGrant Likely interrupts = <2 17 0>; 124a2884f37SGrant Likely reg = <0x900 0x80>; 125c6d4d657SGrant Likely }; 126c6d4d657SGrant Likely 12724ce6bc4SGrant Likely can@980 { 12824ce6bc4SGrant Likely compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 129a2884f37SGrant Likely interrupts = <2 18 0>; 130a2884f37SGrant Likely reg = <0x980 0x80>; 131c6d4d657SGrant Likely }; 132c6d4d657SGrant Likely 133b8842451SGrant Likely gpio_simple: gpio@b00 { 13424ce6bc4SGrant Likely compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 135a2884f37SGrant Likely reg = <0xb00 0x40>; 136c6d4d657SGrant Likely interrupts = <1 7 0>; 137b8842451SGrant Likely gpio-controller; 138b8842451SGrant Likely #gpio-cells = <2>; 139c6d4d657SGrant Likely }; 140c6d4d657SGrant Likely 141b8842451SGrant Likely gpio_wkup: gpio@c00 { 14224ce6bc4SGrant Likely compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 143a2884f37SGrant Likely reg = <0xc00 0x40>; 144c6d4d657SGrant Likely interrupts = <1 8 0 0 3 0>; 145b8842451SGrant Likely gpio-controller; 146b8842451SGrant Likely #gpio-cells = <2>; 147c6d4d657SGrant Likely }; 148c6d4d657SGrant Likely 149c6d4d657SGrant Likely spi@f00 { 15024ce6bc4SGrant Likely compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 151a2884f37SGrant Likely reg = <0xf00 0x20>; 152a2884f37SGrant Likely interrupts = <2 13 0 2 14 0>; 153c6d4d657SGrant Likely }; 154c6d4d657SGrant Likely 155c6d4d657SGrant Likely usb@1000 { 15624ce6bc4SGrant Likely compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 157a2884f37SGrant Likely reg = <0x1000 0xff>; 158c6d4d657SGrant Likely interrupts = <2 6 0>; 159c6d4d657SGrant Likely }; 160c6d4d657SGrant Likely 16124ce6bc4SGrant Likely dma-controller@1200 { 16224ce6bc4SGrant Likely compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 163a2884f37SGrant Likely reg = <0x1200 0x80>; 164c6d4d657SGrant Likely interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 165c6d4d657SGrant Likely 3 4 0 3 5 0 3 6 0 3 7 0 166a2884f37SGrant Likely 3 8 0 3 9 0 3 10 0 3 11 0 167a2884f37SGrant Likely 3 12 0 3 13 0 3 14 0 3 15 0>; 168c6d4d657SGrant Likely }; 169c6d4d657SGrant Likely 170c6d4d657SGrant Likely xlb@1f00 { 17124ce6bc4SGrant Likely compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; 172a2884f37SGrant Likely reg = <0x1f00 0x100>; 173c6d4d657SGrant Likely }; 174c6d4d657SGrant Likely 175c6d4d657SGrant Likely serial@2000 { // PSC1 17624ce6bc4SGrant Likely compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 17705cbbc69SGrant Likely cell-index = <0>; 178a2884f37SGrant Likely reg = <0x2000 0x100>; 179c6d4d657SGrant Likely interrupts = <2 1 0>; 180c6d4d657SGrant Likely }; 181c6d4d657SGrant Likely 18205cbbc69SGrant Likely // PSC2 in ac97 mode example 18305cbbc69SGrant Likely //ac97@2200 { // PSC2 18424ce6bc4SGrant Likely // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; 18505cbbc69SGrant Likely // cell-index = <1>; 186a2884f37SGrant Likely // reg = <0x2200 0x100>; 18705cbbc69SGrant Likely // interrupts = <2 2 0>; 18805cbbc69SGrant Likely //}; 189c6d4d657SGrant Likely 190c6d4d657SGrant Likely // PSC3 in CODEC mode example 19105cbbc69SGrant Likely //i2s@2400 { // PSC3 19224ce6bc4SGrant Likely // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible 19305cbbc69SGrant Likely // cell-index = <2>; 194a2884f37SGrant Likely // reg = <0x2400 0x100>; 19505cbbc69SGrant Likely // interrupts = <2 3 0>; 19605cbbc69SGrant Likely //}; 197c6d4d657SGrant Likely 19805cbbc69SGrant Likely // PSC4 in uart mode example 199c6d4d657SGrant Likely //serial@2600 { // PSC4 20024ce6bc4SGrant Likely // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 20105cbbc69SGrant Likely // cell-index = <3>; 202a2884f37SGrant Likely // reg = <0x2600 0x100>; 203a2884f37SGrant Likely // interrupts = <2 11 0>; 204c6d4d657SGrant Likely //}; 205c6d4d657SGrant Likely 20605cbbc69SGrant Likely // PSC5 in uart mode example 207c6d4d657SGrant Likely //serial@2800 { // PSC5 20824ce6bc4SGrant Likely // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 20905cbbc69SGrant Likely // cell-index = <4>; 210a2884f37SGrant Likely // reg = <0x2800 0x100>; 211a2884f37SGrant Likely // interrupts = <2 12 0>; 212c6d4d657SGrant Likely //}; 213c6d4d657SGrant Likely 21405cbbc69SGrant Likely // PSC6 in spi mode example 21505cbbc69SGrant Likely //spi@2c00 { // PSC6 21624ce6bc4SGrant Likely // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; 21705cbbc69SGrant Likely // cell-index = <5>; 218a2884f37SGrant Likely // reg = <0x2c00 0x100>; 21905cbbc69SGrant Likely // interrupts = <2 4 0>; 22005cbbc69SGrant Likely //}; 221c6d4d657SGrant Likely 222c6d4d657SGrant Likely ethernet@3000 { 22324ce6bc4SGrant Likely compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 224a2884f37SGrant Likely reg = <0x3000 0x400>; 22524ce6bc4SGrant Likely local-mac-address = [ 00 00 00 00 00 00 ]; 226c6d4d657SGrant Likely interrupts = <2 5 0>; 227b147d93dSDomen Puncer phy-handle = <&phy0>; 228b147d93dSDomen Puncer }; 229b147d93dSDomen Puncer 230b147d93dSDomen Puncer mdio@3000 { 231b147d93dSDomen Puncer #address-cells = <1>; 232b147d93dSDomen Puncer #size-cells = <0>; 2335492a7e4SGrant Likely compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 234a2884f37SGrant Likely reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 235b147d93dSDomen Puncer interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 236b147d93dSDomen Puncer 237b147d93dSDomen Puncer phy0: ethernet-phy@0 { 238b147d93dSDomen Puncer reg = <0>; 239b147d93dSDomen Puncer }; 240c6d4d657SGrant Likely }; 241c6d4d657SGrant Likely 242c6d4d657SGrant Likely ata@3a00 { 24324ce6bc4SGrant Likely compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 244a2884f37SGrant Likely reg = <0x3a00 0x100>; 245c6d4d657SGrant Likely interrupts = <2 7 0>; 246c6d4d657SGrant Likely }; 247c6d4d657SGrant Likely 248c6d4d657SGrant Likely i2c@3d00 { 249ec9686c4SKumar Gala #address-cells = <1>; 250ec9686c4SKumar Gala #size-cells = <0>; 25124ce6bc4SGrant Likely compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 252a2884f37SGrant Likely reg = <0x3d00 0x40>; 253a2884f37SGrant Likely interrupts = <2 15 0>; 2545cae84c9SDomen Puncer fsl5200-clocking; 255c6d4d657SGrant Likely }; 256c6d4d657SGrant Likely 257c6d4d657SGrant Likely i2c@3d40 { 258ec9686c4SKumar Gala #address-cells = <1>; 259ec9686c4SKumar Gala #size-cells = <0>; 26024ce6bc4SGrant Likely compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 261a2884f37SGrant Likely reg = <0x3d40 0x40>; 262a2884f37SGrant Likely interrupts = <2 16 0>; 2635cae84c9SDomen Puncer fsl5200-clocking; 264c6d4d657SGrant Likely }; 265b8842451SGrant Likely 266c6d4d657SGrant Likely sram@8000 { 267b8842451SGrant Likely compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; 268a2884f37SGrant Likely reg = <0x8000 0x4000>; 269c6d4d657SGrant Likely }; 270c6d4d657SGrant Likely }; 2711b3c5cdaSKumar Gala 2721b3c5cdaSKumar Gala pci@f0000d00 { 2731b3c5cdaSKumar Gala #interrupt-cells = <1>; 2741b3c5cdaSKumar Gala #size-cells = <2>; 2751b3c5cdaSKumar Gala #address-cells = <3>; 2761b3c5cdaSKumar Gala device_type = "pci"; 27724ce6bc4SGrant Likely compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; 278a2884f37SGrant Likely reg = <0xf0000d00 0x100>; 279a2884f37SGrant Likely interrupt-map-mask = <0xf800 0 0 7>; 280a2884f37SGrant Likely interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 281a2884f37SGrant Likely 0xc000 0 0 2 &mpc5200_pic 1 1 3 282a2884f37SGrant Likely 0xc000 0 0 3 &mpc5200_pic 1 2 3 283a2884f37SGrant Likely 0xc000 0 0 4 &mpc5200_pic 1 3 3 2841b3c5cdaSKumar Gala 285a2884f37SGrant Likely 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot 286a2884f37SGrant Likely 0xc800 0 0 2 &mpc5200_pic 1 2 3 287a2884f37SGrant Likely 0xc800 0 0 3 &mpc5200_pic 1 3 3 288a2884f37SGrant Likely 0xc800 0 0 4 &mpc5200_pic 0 0 3>; 2891b3c5cdaSKumar Gala clock-frequency = <0>; // From boot loader 290a2884f37SGrant Likely interrupts = <2 8 0 2 9 0 2 10 0>; 2911b3c5cdaSKumar Gala bus-range = <0 0>; 292a2884f37SGrant Likely ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 293a2884f37SGrant Likely 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 294a2884f37SGrant Likely 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; 2951b3c5cdaSKumar Gala }; 296c6d4d657SGrant Likely}; 297