1c6d4d657SGrant Likely/*
2c6d4d657SGrant Likely * Lite5200B board Device Tree Source
3c6d4d657SGrant Likely *
405cbbc69SGrant Likely * Copyright 2006-2007 Secret Lab Technologies Ltd.
5c6d4d657SGrant Likely * Grant Likely <grant.likely@secretlab.ca>
6c6d4d657SGrant Likely *
7c6d4d657SGrant Likely * This program is free software; you can redistribute  it and/or modify it
8c6d4d657SGrant Likely * under  the terms of  the GNU General  Public License as published by the
9c6d4d657SGrant Likely * Free Software Foundation;  either version 2 of the  License, or (at your
10c6d4d657SGrant Likely * option) any later version.
11c6d4d657SGrant Likely */
12c6d4d657SGrant Likely
13a2884f37SGrant Likely/dts-v1/;
14121361f7SGrant Likely
15c6d4d657SGrant Likely/ {
1605cbbc69SGrant Likely	model = "fsl,lite5200b";
175b5820d0SMarian Balakowicz	compatible = "fsl,lite5200b";
18c6d4d657SGrant Likely	#address-cells = <1>;
19c6d4d657SGrant Likely	#size-cells = <1>;
20c6d4d657SGrant Likely
21c6d4d657SGrant Likely	cpus {
22c6d4d657SGrant Likely		#address-cells = <1>;
23c6d4d657SGrant Likely		#size-cells = <0>;
24c6d4d657SGrant Likely
25c6d4d657SGrant Likely		PowerPC,5200@0 {
26c6d4d657SGrant Likely			device_type = "cpu";
27c6d4d657SGrant Likely			reg = <0>;
28a2884f37SGrant Likely			d-cache-line-size = <32>;
29a2884f37SGrant Likely			i-cache-line-size = <32>;
30a2884f37SGrant Likely			d-cache-size = <0x4000>;	// L1, 16K
31a2884f37SGrant Likely			i-cache-size = <0x4000>;	// L1, 16K
32c6d4d657SGrant Likely			timebase-frequency = <0>;	// from bootloader
33c6d4d657SGrant Likely			bus-frequency = <0>;		// from bootloader
34c6d4d657SGrant Likely			clock-frequency = <0>;		// from bootloader
35c6d4d657SGrant Likely		};
36c6d4d657SGrant Likely	};
37c6d4d657SGrant Likely
38c6d4d657SGrant Likely	memory {
39c6d4d657SGrant Likely		device_type = "memory";
40a2884f37SGrant Likely		reg = <0x00000000 0x10000000>;	// 256MB
41c6d4d657SGrant Likely	};
42c6d4d657SGrant Likely
43c6d4d657SGrant Likely	soc5200@f0000000 {
4458a5be39SPaul Gortmaker		#address-cells = <1>;
4558a5be39SPaul Gortmaker		#size-cells = <1>;
4624ce6bc4SGrant Likely		compatible = "fsl,mpc5200b-immr";
47a2884f37SGrant Likely		ranges = <0 0xf0000000 0x0000c000>;
48a2884f37SGrant Likely		reg = <0xf0000000 0x00000100>;
49c6d4d657SGrant Likely		bus-frequency = <0>;		// from bootloader
5005cbbc69SGrant Likely		system-frequency = <0>;		// from bootloader
51c6d4d657SGrant Likely
52c6d4d657SGrant Likely		cdm@200 {
5324ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
54a2884f37SGrant Likely			reg = <0x200 0x38>;
55c6d4d657SGrant Likely		};
56c6d4d657SGrant Likely
5724ce6bc4SGrant Likely		mpc5200_pic: interrupt-controller@500 {
58c6d4d657SGrant Likely			// 5200 interrupts are encoded into two levels;
59c6d4d657SGrant Likely			interrupt-controller;
60c6d4d657SGrant Likely			#interrupt-cells = <3>;
61c6d4d657SGrant Likely			device_type = "interrupt-controller";
6224ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
63a2884f37SGrant Likely			reg = <0x500 0x80>;
64c6d4d657SGrant Likely		};
65c6d4d657SGrant Likely
6624ce6bc4SGrant Likely		timer@600 {	// General Purpose Timer
67d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
6805cbbc69SGrant Likely			cell-index = <0>;
69a2884f37SGrant Likely			reg = <0x600 0x10>;
70c6d4d657SGrant Likely			interrupts = <1 9 0>;
715c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
72d24bc314SMarian Balakowicz			fsl,has-wdt;
73c6d4d657SGrant Likely		};
74c6d4d657SGrant Likely
7524ce6bc4SGrant Likely		timer@610 {	// General Purpose Timer
76d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
7705cbbc69SGrant Likely			cell-index = <1>;
78a2884f37SGrant Likely			reg = <0x610 0x10>;
79a2884f37SGrant Likely			interrupts = <1 10 0>;
805c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
81c6d4d657SGrant Likely		};
82c6d4d657SGrant Likely
8324ce6bc4SGrant Likely		timer@620 {	// General Purpose Timer
84d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
8505cbbc69SGrant Likely			cell-index = <2>;
86a2884f37SGrant Likely			reg = <0x620 0x10>;
87a2884f37SGrant Likely			interrupts = <1 11 0>;
885c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
89c6d4d657SGrant Likely		};
90c6d4d657SGrant Likely
9124ce6bc4SGrant Likely		timer@630 {	// General Purpose Timer
92d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
9305cbbc69SGrant Likely			cell-index = <3>;
94a2884f37SGrant Likely			reg = <0x630 0x10>;
95a2884f37SGrant Likely			interrupts = <1 12 0>;
965c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
97c6d4d657SGrant Likely		};
98c6d4d657SGrant Likely
9924ce6bc4SGrant Likely		timer@640 {	// General Purpose Timer
100d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
10105cbbc69SGrant Likely			cell-index = <4>;
102a2884f37SGrant Likely			reg = <0x640 0x10>;
103a2884f37SGrant Likely			interrupts = <1 13 0>;
1045c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
105c6d4d657SGrant Likely		};
106c6d4d657SGrant Likely
10724ce6bc4SGrant Likely		timer@650 {	// General Purpose Timer
108d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
10905cbbc69SGrant Likely			cell-index = <5>;
110a2884f37SGrant Likely			reg = <0x650 0x10>;
111a2884f37SGrant Likely			interrupts = <1 14 0>;
1125c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
113c6d4d657SGrant Likely		};
114c6d4d657SGrant Likely
11524ce6bc4SGrant Likely		timer@660 {	// General Purpose Timer
116d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
11705cbbc69SGrant Likely			cell-index = <6>;
118a2884f37SGrant Likely			reg = <0x660 0x10>;
119a2884f37SGrant Likely			interrupts = <1 15 0>;
1205c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
121c6d4d657SGrant Likely		};
122c6d4d657SGrant Likely
12324ce6bc4SGrant Likely		timer@670 {	// General Purpose Timer
124d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
12505cbbc69SGrant Likely			cell-index = <7>;
126a2884f37SGrant Likely			reg = <0x670 0x10>;
127a2884f37SGrant Likely			interrupts = <1 16 0>;
1285c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
129c6d4d657SGrant Likely		};
130c6d4d657SGrant Likely
131c6d4d657SGrant Likely		rtc@800 {	// Real time clock
13224ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
133c6d4d657SGrant Likely			device_type = "rtc";
134a2884f37SGrant Likely			reg = <0x800 0x100>;
135c6d4d657SGrant Likely			interrupts = <1 5 0 1 6 0>;
1365c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
137c6d4d657SGrant Likely		};
138c6d4d657SGrant Likely
13924ce6bc4SGrant Likely		can@900 {
14024ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
14105cbbc69SGrant Likely			cell-index = <0>;
142a2884f37SGrant Likely			interrupts = <2 17 0>;
1435c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
144a2884f37SGrant Likely			reg = <0x900 0x80>;
145c6d4d657SGrant Likely		};
146c6d4d657SGrant Likely
14724ce6bc4SGrant Likely		can@980 {
14824ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
14905cbbc69SGrant Likely			cell-index = <1>;
150a2884f37SGrant Likely			interrupts = <2 18 0>;
1515c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
152a2884f37SGrant Likely			reg = <0x980 0x80>;
153c6d4d657SGrant Likely		};
154c6d4d657SGrant Likely
155c6d4d657SGrant Likely		gpio@b00 {
15624ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
157a2884f37SGrant Likely			reg = <0xb00 0x40>;
158c6d4d657SGrant Likely			interrupts = <1 7 0>;
1595c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
160c6d4d657SGrant Likely		};
161c6d4d657SGrant Likely
16224ce6bc4SGrant Likely		gpio@c00 {
16324ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
164a2884f37SGrant Likely			reg = <0xc00 0x40>;
165c6d4d657SGrant Likely			interrupts = <1 8 0 0 3 0>;
1665c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
167c6d4d657SGrant Likely		};
168c6d4d657SGrant Likely
169c6d4d657SGrant Likely		spi@f00 {
17024ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
171a2884f37SGrant Likely			reg = <0xf00 0x20>;
172a2884f37SGrant Likely			interrupts = <2 13 0 2 14 0>;
1735c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
174c6d4d657SGrant Likely		};
175c6d4d657SGrant Likely
176c6d4d657SGrant Likely		usb@1000 {
17724ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
178a2884f37SGrant Likely			reg = <0x1000 0xff>;
179c6d4d657SGrant Likely			interrupts = <2 6 0>;
1805c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
181c6d4d657SGrant Likely		};
182c6d4d657SGrant Likely
18324ce6bc4SGrant Likely		dma-controller@1200 {
184c6d4d657SGrant Likely			device_type = "dma-controller";
18524ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
186a2884f37SGrant Likely			reg = <0x1200 0x80>;
187c6d4d657SGrant Likely			interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
188c6d4d657SGrant Likely			              3 4 0  3 5 0  3 6 0  3 7 0
189a2884f37SGrant Likely			              3 8 0  3 9 0  3 10 0  3 11 0
190a2884f37SGrant Likely			              3 12 0  3 13 0  3 14 0  3 15 0>;
1915c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
192c6d4d657SGrant Likely		};
193c6d4d657SGrant Likely
194c6d4d657SGrant Likely		xlb@1f00 {
19524ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
196a2884f37SGrant Likely			reg = <0x1f00 0x100>;
197c6d4d657SGrant Likely		};
198c6d4d657SGrant Likely
199c6d4d657SGrant Likely		serial@2000 {		// PSC1
200c6d4d657SGrant Likely			device_type = "serial";
20124ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
202c6d4d657SGrant Likely			port-number = <0>;  // Logical port assignment
20305cbbc69SGrant Likely			cell-index = <0>;
204a2884f37SGrant Likely			reg = <0x2000 0x100>;
205c6d4d657SGrant Likely			interrupts = <2 1 0>;
2065c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
207c6d4d657SGrant Likely		};
208c6d4d657SGrant Likely
20905cbbc69SGrant Likely		// PSC2 in ac97 mode example
21005cbbc69SGrant Likely		//ac97@2200 {		// PSC2
21124ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
21205cbbc69SGrant Likely		//	cell-index = <1>;
213a2884f37SGrant Likely		//	reg = <0x2200 0x100>;
21405cbbc69SGrant Likely		//	interrupts = <2 2 0>;
2155c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
21605cbbc69SGrant Likely		//};
217c6d4d657SGrant Likely
218c6d4d657SGrant Likely		// PSC3 in CODEC mode example
21905cbbc69SGrant Likely		//i2s@2400 {		// PSC3
22024ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
22105cbbc69SGrant Likely		//	cell-index = <2>;
222a2884f37SGrant Likely		//	reg = <0x2400 0x100>;
22305cbbc69SGrant Likely		//	interrupts = <2 3 0>;
2245c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
22505cbbc69SGrant Likely		//};
226c6d4d657SGrant Likely
22705cbbc69SGrant Likely		// PSC4 in uart mode example
228c6d4d657SGrant Likely		//serial@2600 {		// PSC4
229c6d4d657SGrant Likely		//	device_type = "serial";
23024ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
23105cbbc69SGrant Likely		//	cell-index = <3>;
232a2884f37SGrant Likely		//	reg = <0x2600 0x100>;
233a2884f37SGrant Likely		//	interrupts = <2 11 0>;
2345c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
235c6d4d657SGrant Likely		//};
236c6d4d657SGrant Likely
23705cbbc69SGrant Likely		// PSC5 in uart mode example
238c6d4d657SGrant Likely		//serial@2800 {		// PSC5
239c6d4d657SGrant Likely		//	device_type = "serial";
24024ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
24105cbbc69SGrant Likely		//	cell-index = <4>;
242a2884f37SGrant Likely		//	reg = <0x2800 0x100>;
243a2884f37SGrant Likely		//	interrupts = <2 12 0>;
2445c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
245c6d4d657SGrant Likely		//};
246c6d4d657SGrant Likely
24705cbbc69SGrant Likely		// PSC6 in spi mode example
24805cbbc69SGrant Likely		//spi@2c00 {		// PSC6
24924ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
25005cbbc69SGrant Likely		//	cell-index = <5>;
251a2884f37SGrant Likely		//	reg = <0x2c00 0x100>;
25205cbbc69SGrant Likely		//	interrupts = <2 4 0>;
2535c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
25405cbbc69SGrant Likely		//};
255c6d4d657SGrant Likely
256c6d4d657SGrant Likely		ethernet@3000 {
257c6d4d657SGrant Likely			device_type = "network";
25824ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
259a2884f37SGrant Likely			reg = <0x3000 0x400>;
26024ce6bc4SGrant Likely			local-mac-address = [ 00 00 00 00 00 00 ];
261c6d4d657SGrant Likely			interrupts = <2 5 0>;
2625c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
263b147d93dSDomen Puncer			phy-handle = <&phy0>;
264b147d93dSDomen Puncer		};
265b147d93dSDomen Puncer
266b147d93dSDomen Puncer		mdio@3000 {
267b147d93dSDomen Puncer			#address-cells = <1>;
268b147d93dSDomen Puncer			#size-cells = <0>;
2695492a7e4SGrant Likely			compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
270a2884f37SGrant Likely			reg = <0x3000 0x400>;	// fec range, since we need to setup fec interrupts
271b147d93dSDomen Puncer			interrupts = <2 5 0>;	// these are for "mii command finished", not link changes & co.
272b147d93dSDomen Puncer			interrupt-parent = <&mpc5200_pic>;
273b147d93dSDomen Puncer
274b147d93dSDomen Puncer			phy0: ethernet-phy@0 {
275b147d93dSDomen Puncer				device_type = "ethernet-phy";
276b147d93dSDomen Puncer				reg = <0>;
277b147d93dSDomen Puncer			};
278c6d4d657SGrant Likely		};
279c6d4d657SGrant Likely
280c6d4d657SGrant Likely		ata@3a00 {
281c6d4d657SGrant Likely			device_type = "ata";
28224ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
283a2884f37SGrant Likely			reg = <0x3a00 0x100>;
284c6d4d657SGrant Likely			interrupts = <2 7 0>;
2855c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
286c6d4d657SGrant Likely		};
287c6d4d657SGrant Likely
288c6d4d657SGrant Likely		i2c@3d00 {
289ec9686c4SKumar Gala			#address-cells = <1>;
290ec9686c4SKumar Gala			#size-cells = <0>;
29124ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
29205cbbc69SGrant Likely			cell-index = <0>;
293a2884f37SGrant Likely			reg = <0x3d00 0x40>;
294a2884f37SGrant Likely			interrupts = <2 15 0>;
2955c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
2965cae84c9SDomen Puncer			fsl5200-clocking;
297c6d4d657SGrant Likely		};
298c6d4d657SGrant Likely
299c6d4d657SGrant Likely		i2c@3d40 {
300ec9686c4SKumar Gala			#address-cells = <1>;
301ec9686c4SKumar Gala			#size-cells = <0>;
30224ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
30305cbbc69SGrant Likely			cell-index = <1>;
304a2884f37SGrant Likely			reg = <0x3d40 0x40>;
305a2884f37SGrant Likely			interrupts = <2 16 0>;
3065c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
3075cae84c9SDomen Puncer			fsl5200-clocking;
308c6d4d657SGrant Likely		};
309c6d4d657SGrant Likely		sram@8000 {
31024ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
311a2884f37SGrant Likely			reg = <0x8000 0x4000>;
312c6d4d657SGrant Likely		};
313c6d4d657SGrant Likely	};
3141b3c5cdaSKumar Gala
3151b3c5cdaSKumar Gala	pci@f0000d00 {
3161b3c5cdaSKumar Gala		#interrupt-cells = <1>;
3171b3c5cdaSKumar Gala		#size-cells = <2>;
3181b3c5cdaSKumar Gala		#address-cells = <3>;
3191b3c5cdaSKumar Gala		device_type = "pci";
32024ce6bc4SGrant Likely		compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
321a2884f37SGrant Likely		reg = <0xf0000d00 0x100>;
322a2884f37SGrant Likely		interrupt-map-mask = <0xf800 0 0 7>;
323a2884f37SGrant Likely		interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
324a2884f37SGrant Likely				 0xc000 0 0 2 &mpc5200_pic 1 1 3
325a2884f37SGrant Likely				 0xc000 0 0 3 &mpc5200_pic 1 2 3
326a2884f37SGrant Likely				 0xc000 0 0 4 &mpc5200_pic 1 3 3
3271b3c5cdaSKumar Gala
328a2884f37SGrant Likely				 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
329a2884f37SGrant Likely				 0xc800 0 0 2 &mpc5200_pic 1 2 3
330a2884f37SGrant Likely				 0xc800 0 0 3 &mpc5200_pic 1 3 3
331a2884f37SGrant Likely				 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
3321b3c5cdaSKumar Gala		clock-frequency = <0>; // From boot loader
333a2884f37SGrant Likely		interrupts = <2 8 0 2 9 0 2 10 0>;
3341b3c5cdaSKumar Gala		interrupt-parent = <&mpc5200_pic>;
3351b3c5cdaSKumar Gala		bus-range = <0 0>;
336a2884f37SGrant Likely		ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
337a2884f37SGrant Likely			  0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
338a2884f37SGrant Likely			  0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
3391b3c5cdaSKumar Gala	};
340c6d4d657SGrant Likely};
341