1c6d4d657SGrant Likely/*
2c6d4d657SGrant Likely * Lite5200B board Device Tree Source
3c6d4d657SGrant Likely *
405cbbc69SGrant Likely * Copyright 2006-2007 Secret Lab Technologies Ltd.
5c6d4d657SGrant Likely * Grant Likely <grant.likely@secretlab.ca>
6c6d4d657SGrant Likely *
7c6d4d657SGrant Likely * This program is free software; you can redistribute  it and/or modify it
8c6d4d657SGrant Likely * under  the terms of  the GNU General  Public License as published by the
9c6d4d657SGrant Likely * Free Software Foundation;  either version 2 of the  License, or (at your
10c6d4d657SGrant Likely * option) any later version.
11c6d4d657SGrant Likely */
12c6d4d657SGrant Likely
13121361f7SGrant Likely/*
14121361f7SGrant Likely * WARNING: Do not depend on this tree layout remaining static just yet.
15121361f7SGrant Likely * The MPC5200 device tree conventions are still in flux
16121361f7SGrant Likely * Keep an eye on the linuxppc-dev mailing list for more details
17121361f7SGrant Likely */
18121361f7SGrant Likely
19c6d4d657SGrant Likely/ {
2005cbbc69SGrant Likely	model = "fsl,lite5200b";
215b5820d0SMarian Balakowicz	compatible = "fsl,lite5200b";
22c6d4d657SGrant Likely	#address-cells = <1>;
23c6d4d657SGrant Likely	#size-cells = <1>;
24c6d4d657SGrant Likely
25c6d4d657SGrant Likely	cpus {
26c6d4d657SGrant Likely		#address-cells = <1>;
27c6d4d657SGrant Likely		#size-cells = <0>;
28c6d4d657SGrant Likely
29c6d4d657SGrant Likely		PowerPC,5200@0 {
30c6d4d657SGrant Likely			device_type = "cpu";
31c6d4d657SGrant Likely			reg = <0>;
32c6d4d657SGrant Likely			d-cache-line-size = <20>;
33c6d4d657SGrant Likely			i-cache-line-size = <20>;
34c6d4d657SGrant Likely			d-cache-size = <4000>;		// L1, 16K
35c6d4d657SGrant Likely			i-cache-size = <4000>;		// L1, 16K
36c6d4d657SGrant Likely			timebase-frequency = <0>;	// from bootloader
37c6d4d657SGrant Likely			bus-frequency = <0>;		// from bootloader
38c6d4d657SGrant Likely			clock-frequency = <0>;		// from bootloader
39c6d4d657SGrant Likely		};
40c6d4d657SGrant Likely	};
41c6d4d657SGrant Likely
42c6d4d657SGrant Likely	memory {
43c6d4d657SGrant Likely		device_type = "memory";
44c6d4d657SGrant Likely		reg = <00000000 10000000>;	// 256MB
45c6d4d657SGrant Likely	};
46c6d4d657SGrant Likely
47c6d4d657SGrant Likely	soc5200@f0000000 {
4858a5be39SPaul Gortmaker		#address-cells = <1>;
4958a5be39SPaul Gortmaker		#size-cells = <1>;
5024ce6bc4SGrant Likely		compatible = "fsl,mpc5200b-immr";
51f0c8ac80SKumar Gala		ranges = <0 f0000000 0000c000>;
52f0c8ac80SKumar Gala		reg = <f0000000 00000100>;
53c6d4d657SGrant Likely		bus-frequency = <0>;		// from bootloader
5405cbbc69SGrant Likely		system-frequency = <0>;		// from bootloader
55c6d4d657SGrant Likely
56c6d4d657SGrant Likely		cdm@200 {
5724ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
58c6d4d657SGrant Likely			reg = <200 38>;
59c6d4d657SGrant Likely		};
60c6d4d657SGrant Likely
6124ce6bc4SGrant Likely		mpc5200_pic: interrupt-controller@500 {
62c6d4d657SGrant Likely			// 5200 interrupts are encoded into two levels;
63c6d4d657SGrant Likely			interrupt-controller;
64c6d4d657SGrant Likely			#interrupt-cells = <3>;
65c6d4d657SGrant Likely			device_type = "interrupt-controller";
6624ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
67c6d4d657SGrant Likely			reg = <500 80>;
68c6d4d657SGrant Likely		};
69c6d4d657SGrant Likely
7024ce6bc4SGrant Likely		timer@600 {	// General Purpose Timer
71d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
7205cbbc69SGrant Likely			cell-index = <0>;
73c6d4d657SGrant Likely			reg = <600 10>;
74c6d4d657SGrant Likely			interrupts = <1 9 0>;
755c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
76d24bc314SMarian Balakowicz			fsl,has-wdt;
77c6d4d657SGrant Likely		};
78c6d4d657SGrant Likely
7924ce6bc4SGrant Likely		timer@610 {	// General Purpose Timer
80d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
8105cbbc69SGrant Likely			cell-index = <1>;
82c6d4d657SGrant Likely			reg = <610 10>;
83c6d4d657SGrant Likely			interrupts = <1 a 0>;
845c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
85c6d4d657SGrant Likely		};
86c6d4d657SGrant Likely
8724ce6bc4SGrant Likely		timer@620 {	// General Purpose Timer
88d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
8905cbbc69SGrant Likely			cell-index = <2>;
90c6d4d657SGrant Likely			reg = <620 10>;
91c6d4d657SGrant Likely			interrupts = <1 b 0>;
925c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
93c6d4d657SGrant Likely		};
94c6d4d657SGrant Likely
9524ce6bc4SGrant Likely		timer@630 {	// General Purpose Timer
96d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
9705cbbc69SGrant Likely			cell-index = <3>;
98c6d4d657SGrant Likely			reg = <630 10>;
99c6d4d657SGrant Likely			interrupts = <1 c 0>;
1005c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
101c6d4d657SGrant Likely		};
102c6d4d657SGrant Likely
10324ce6bc4SGrant Likely		timer@640 {	// General Purpose Timer
104d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
10505cbbc69SGrant Likely			cell-index = <4>;
106c6d4d657SGrant Likely			reg = <640 10>;
107c6d4d657SGrant Likely			interrupts = <1 d 0>;
1085c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
109c6d4d657SGrant Likely		};
110c6d4d657SGrant Likely
11124ce6bc4SGrant Likely		timer@650 {	// General Purpose Timer
112d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
11305cbbc69SGrant Likely			cell-index = <5>;
114c6d4d657SGrant Likely			reg = <650 10>;
115c6d4d657SGrant Likely			interrupts = <1 e 0>;
1165c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
117c6d4d657SGrant Likely		};
118c6d4d657SGrant Likely
11924ce6bc4SGrant Likely		timer@660 {	// General Purpose Timer
120d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
12105cbbc69SGrant Likely			cell-index = <6>;
122c6d4d657SGrant Likely			reg = <660 10>;
123c6d4d657SGrant Likely			interrupts = <1 f 0>;
1245c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
125c6d4d657SGrant Likely		};
126c6d4d657SGrant Likely
12724ce6bc4SGrant Likely		timer@670 {	// General Purpose Timer
128d24bc314SMarian Balakowicz			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
12905cbbc69SGrant Likely			cell-index = <7>;
130c6d4d657SGrant Likely			reg = <670 10>;
131c6d4d657SGrant Likely			interrupts = <1 10 0>;
1325c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
133c6d4d657SGrant Likely		};
134c6d4d657SGrant Likely
135c6d4d657SGrant Likely		rtc@800 {	// Real time clock
13624ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
137c6d4d657SGrant Likely			device_type = "rtc";
138c6d4d657SGrant Likely			reg = <800 100>;
139c6d4d657SGrant Likely			interrupts = <1 5 0 1 6 0>;
1405c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
141c6d4d657SGrant Likely		};
142c6d4d657SGrant Likely
14324ce6bc4SGrant Likely		can@900 {
14424ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
14505cbbc69SGrant Likely			cell-index = <0>;
146c6d4d657SGrant Likely			interrupts = <2 11 0>;
1475c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
148c6d4d657SGrant Likely			reg = <900 80>;
149c6d4d657SGrant Likely		};
150c6d4d657SGrant Likely
15124ce6bc4SGrant Likely		can@980 {
15224ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
15305cbbc69SGrant Likely			cell-index = <1>;
1540d0f4bc7SDomen Puncer			interrupts = <2 12 0>;
1555c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
156c6d4d657SGrant Likely			reg = <980 80>;
157c6d4d657SGrant Likely		};
158c6d4d657SGrant Likely
159c6d4d657SGrant Likely		gpio@b00 {
16024ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
161c6d4d657SGrant Likely			reg = <b00 40>;
162c6d4d657SGrant Likely			interrupts = <1 7 0>;
1635c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
164c6d4d657SGrant Likely		};
165c6d4d657SGrant Likely
16624ce6bc4SGrant Likely		gpio@c00 {
16724ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
168c6d4d657SGrant Likely			reg = <c00 40>;
169c6d4d657SGrant Likely			interrupts = <1 8 0 0 3 0>;
1705c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
171c6d4d657SGrant Likely		};
172c6d4d657SGrant Likely
173c6d4d657SGrant Likely		spi@f00 {
17424ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
175c6d4d657SGrant Likely			reg = <f00 20>;
176c6d4d657SGrant Likely			interrupts = <2 d 0 2 e 0>;
1775c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
178c6d4d657SGrant Likely		};
179c6d4d657SGrant Likely
180c6d4d657SGrant Likely		usb@1000 {
18124ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
182c6d4d657SGrant Likely			reg = <1000 ff>;
183c6d4d657SGrant Likely			interrupts = <2 6 0>;
1845c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
185c6d4d657SGrant Likely		};
186c6d4d657SGrant Likely
18724ce6bc4SGrant Likely		dma-controller@1200 {
188c6d4d657SGrant Likely			device_type = "dma-controller";
18924ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
190c6d4d657SGrant Likely			reg = <1200 80>;
191c6d4d657SGrant Likely			interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
192c6d4d657SGrant Likely			              3 4 0  3 5 0  3 6 0  3 7 0
193c6d4d657SGrant Likely			              3 8 0  3 9 0  3 a 0  3 b 0
194c6d4d657SGrant Likely			              3 c 0  3 d 0  3 e 0  3 f 0>;
1955c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
196c6d4d657SGrant Likely		};
197c6d4d657SGrant Likely
198c6d4d657SGrant Likely		xlb@1f00 {
19924ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
200c6d4d657SGrant Likely			reg = <1f00 100>;
201c6d4d657SGrant Likely		};
202c6d4d657SGrant Likely
203c6d4d657SGrant Likely		serial@2000 {		// PSC1
204c6d4d657SGrant Likely			device_type = "serial";
20524ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
206c6d4d657SGrant Likely			port-number = <0>;  // Logical port assignment
20705cbbc69SGrant Likely			cell-index = <0>;
208c6d4d657SGrant Likely			reg = <2000 100>;
209c6d4d657SGrant Likely			interrupts = <2 1 0>;
2105c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
211c6d4d657SGrant Likely		};
212c6d4d657SGrant Likely
21305cbbc69SGrant Likely		// PSC2 in ac97 mode example
21405cbbc69SGrant Likely		//ac97@2200 {		// PSC2
21524ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
21605cbbc69SGrant Likely		//	cell-index = <1>;
21705cbbc69SGrant Likely		//	reg = <2200 100>;
21805cbbc69SGrant Likely		//	interrupts = <2 2 0>;
2195c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
22005cbbc69SGrant Likely		//};
221c6d4d657SGrant Likely
222c6d4d657SGrant Likely		// PSC3 in CODEC mode example
22305cbbc69SGrant Likely		//i2s@2400 {		// PSC3
22424ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
22505cbbc69SGrant Likely		//	cell-index = <2>;
22605cbbc69SGrant Likely		//	reg = <2400 100>;
22705cbbc69SGrant Likely		//	interrupts = <2 3 0>;
2285c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
22905cbbc69SGrant Likely		//};
230c6d4d657SGrant Likely
23105cbbc69SGrant Likely		// PSC4 in uart mode example
232c6d4d657SGrant Likely		//serial@2600 {		// PSC4
233c6d4d657SGrant Likely		//	device_type = "serial";
23424ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
23505cbbc69SGrant Likely		//	cell-index = <3>;
236c6d4d657SGrant Likely		//	reg = <2600 100>;
237c6d4d657SGrant Likely		//	interrupts = <2 b 0>;
2385c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
239c6d4d657SGrant Likely		//};
240c6d4d657SGrant Likely
24105cbbc69SGrant Likely		// PSC5 in uart mode example
242c6d4d657SGrant Likely		//serial@2800 {		// PSC5
243c6d4d657SGrant Likely		//	device_type = "serial";
24424ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
24505cbbc69SGrant Likely		//	cell-index = <4>;
246c6d4d657SGrant Likely		//	reg = <2800 100>;
247c6d4d657SGrant Likely		//	interrupts = <2 c 0>;
2485c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
249c6d4d657SGrant Likely		//};
250c6d4d657SGrant Likely
25105cbbc69SGrant Likely		// PSC6 in spi mode example
25205cbbc69SGrant Likely		//spi@2c00 {		// PSC6
25324ce6bc4SGrant Likely		//	compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
25405cbbc69SGrant Likely		//	cell-index = <5>;
25505cbbc69SGrant Likely		//	reg = <2c00 100>;
25605cbbc69SGrant Likely		//	interrupts = <2 4 0>;
2575c1992f8SKumar Gala		//	interrupt-parent = <&mpc5200_pic>;
25805cbbc69SGrant Likely		//};
259c6d4d657SGrant Likely
260c6d4d657SGrant Likely		ethernet@3000 {
261c6d4d657SGrant Likely			device_type = "network";
26224ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
263b147d93dSDomen Puncer			reg = <3000 400>;
26424ce6bc4SGrant Likely			local-mac-address = [ 00 00 00 00 00 00 ];
265c6d4d657SGrant Likely			interrupts = <2 5 0>;
2665c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
267b147d93dSDomen Puncer			phy-handle = <&phy0>;
268b147d93dSDomen Puncer		};
269b147d93dSDomen Puncer
270b147d93dSDomen Puncer		mdio@3000 {
271b147d93dSDomen Puncer			#address-cells = <1>;
272b147d93dSDomen Puncer			#size-cells = <0>;
27324ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-mdio";
274b147d93dSDomen Puncer			reg = <3000 400>;	// fec range, since we need to setup fec interrupts
275b147d93dSDomen Puncer			interrupts = <2 5 0>;	// these are for "mii command finished", not link changes & co.
276b147d93dSDomen Puncer			interrupt-parent = <&mpc5200_pic>;
277b147d93dSDomen Puncer
278b147d93dSDomen Puncer			phy0:ethernet-phy@0 {
279b147d93dSDomen Puncer				device_type = "ethernet-phy";
280b147d93dSDomen Puncer				reg = <0>;
281b147d93dSDomen Puncer			};
282c6d4d657SGrant Likely		};
283c6d4d657SGrant Likely
284c6d4d657SGrant Likely		ata@3a00 {
285c6d4d657SGrant Likely			device_type = "ata";
28624ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
287c6d4d657SGrant Likely			reg = <3a00 100>;
288c6d4d657SGrant Likely			interrupts = <2 7 0>;
2895c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
290c6d4d657SGrant Likely		};
291c6d4d657SGrant Likely
292c6d4d657SGrant Likely		i2c@3d00 {
293ec9686c4SKumar Gala			#address-cells = <1>;
294ec9686c4SKumar Gala			#size-cells = <0>;
29524ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
29605cbbc69SGrant Likely			cell-index = <0>;
297c6d4d657SGrant Likely			reg = <3d00 40>;
298c6d4d657SGrant Likely			interrupts = <2 f 0>;
2995c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
3005cae84c9SDomen Puncer			fsl5200-clocking;
301c6d4d657SGrant Likely		};
302c6d4d657SGrant Likely
303c6d4d657SGrant Likely		i2c@3d40 {
304ec9686c4SKumar Gala			#address-cells = <1>;
305ec9686c4SKumar Gala			#size-cells = <0>;
30624ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
30705cbbc69SGrant Likely			cell-index = <1>;
308c6d4d657SGrant Likely			reg = <3d40 40>;
309c6d4d657SGrant Likely			interrupts = <2 10 0>;
3105c1992f8SKumar Gala			interrupt-parent = <&mpc5200_pic>;
3115cae84c9SDomen Puncer			fsl5200-clocking;
312c6d4d657SGrant Likely		};
313c6d4d657SGrant Likely		sram@8000 {
31424ce6bc4SGrant Likely			compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
315c6d4d657SGrant Likely			reg = <8000 4000>;
316c6d4d657SGrant Likely		};
317c6d4d657SGrant Likely	};
3181b3c5cdaSKumar Gala
3191b3c5cdaSKumar Gala	pci@f0000d00 {
3201b3c5cdaSKumar Gala		#interrupt-cells = <1>;
3211b3c5cdaSKumar Gala		#size-cells = <2>;
3221b3c5cdaSKumar Gala		#address-cells = <3>;
3231b3c5cdaSKumar Gala		device_type = "pci";
32424ce6bc4SGrant Likely		compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
3251b3c5cdaSKumar Gala		reg = <f0000d00 100>;
3261b3c5cdaSKumar Gala		interrupt-map-mask = <f800 0 0 7>;
3271b3c5cdaSKumar Gala		interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
3281b3c5cdaSKumar Gala				 c000 0 0 2 &mpc5200_pic 1 1 3
3291b3c5cdaSKumar Gala				 c000 0 0 3 &mpc5200_pic 1 2 3
3301b3c5cdaSKumar Gala				 c000 0 0 4 &mpc5200_pic 1 3 3
3311b3c5cdaSKumar Gala
3321b3c5cdaSKumar Gala				 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
3331b3c5cdaSKumar Gala				 c800 0 0 2 &mpc5200_pic 1 2 3
3341b3c5cdaSKumar Gala				 c800 0 0 3 &mpc5200_pic 1 3 3
3351b3c5cdaSKumar Gala				 c800 0 0 4 &mpc5200_pic 0 0 3>;
3361b3c5cdaSKumar Gala		clock-frequency = <0>; // From boot loader
3371b3c5cdaSKumar Gala		interrupts = <2 8 0 2 9 0 2 a 0>;
3381b3c5cdaSKumar Gala		interrupt-parent = <&mpc5200_pic>;
3391b3c5cdaSKumar Gala		bus-range = <0 0>;
3401b3c5cdaSKumar Gala		ranges = <42000000 0 80000000 80000000 0 20000000
3411b3c5cdaSKumar Gala			  02000000 0 a0000000 a0000000 0 10000000
3421b3c5cdaSKumar Gala			  01000000 0 00000000 b0000000 0 01000000>;
3431b3c5cdaSKumar Gala	};
344c6d4d657SGrant Likely};
345