12874c5fdSThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 2c6d4d657SGrant Likely/* 3c6d4d657SGrant Likely * Lite5200 board Device Tree Source 4c6d4d657SGrant Likely * 505cbbc69SGrant Likely * Copyright 2006-2007 Secret Lab Technologies Ltd. 6c6d4d657SGrant Likely * Grant Likely <grant.likely@secretlab.ca> 7c6d4d657SGrant Likely */ 8c6d4d657SGrant Likely 9a2884f37SGrant Likely/dts-v1/; 10a2884f37SGrant Likely 11c6d4d657SGrant Likely/ { 1205cbbc69SGrant Likely model = "fsl,lite5200"; 135b5820d0SMarian Balakowicz compatible = "fsl,lite5200"; 14c6d4d657SGrant Likely #address-cells = <1>; 15c6d4d657SGrant Likely #size-cells = <1>; 16b8842451SGrant Likely interrupt-parent = <&mpc5200_pic>; 17c6d4d657SGrant Likely 18c6d4d657SGrant Likely cpus { 19c6d4d657SGrant Likely #address-cells = <1>; 20c6d4d657SGrant Likely #size-cells = <0>; 21c6d4d657SGrant Likely 22c6d4d657SGrant Likely PowerPC,5200@0 { 23c6d4d657SGrant Likely device_type = "cpu"; 24c6d4d657SGrant Likely reg = <0>; 25a2884f37SGrant Likely d-cache-line-size = <32>; 26a2884f37SGrant Likely i-cache-line-size = <32>; 27a2884f37SGrant Likely d-cache-size = <0x4000>; // L1, 16K 28a2884f37SGrant Likely i-cache-size = <0x4000>; // L1, 16K 29c6d4d657SGrant Likely timebase-frequency = <0>; // from bootloader 30c6d4d657SGrant Likely bus-frequency = <0>; // from bootloader 31c6d4d657SGrant Likely clock-frequency = <0>; // from bootloader 32c6d4d657SGrant Likely }; 33c6d4d657SGrant Likely }; 34c6d4d657SGrant Likely 35*aed2886aSAnatolij Gustschin memory@0 { 36c6d4d657SGrant Likely device_type = "memory"; 37a2884f37SGrant Likely reg = <0x00000000 0x04000000>; // 64MB 38c6d4d657SGrant Likely }; 39c6d4d657SGrant Likely 40c6d4d657SGrant Likely soc5200@f0000000 { 4158a5be39SPaul Gortmaker #address-cells = <1>; 4258a5be39SPaul Gortmaker #size-cells = <1>; 4324ce6bc4SGrant Likely compatible = "fsl,mpc5200-immr"; 44a2884f37SGrant Likely ranges = <0 0xf0000000 0x0000c000>; 45a2884f37SGrant Likely reg = <0xf0000000 0x00000100>; 46c6d4d657SGrant Likely bus-frequency = <0>; // from bootloader 4705cbbc69SGrant Likely system-frequency = <0>; // from bootloader 48c6d4d657SGrant Likely 49c6d4d657SGrant Likely cdm@200 { 5024ce6bc4SGrant Likely compatible = "fsl,mpc5200-cdm"; 51a2884f37SGrant Likely reg = <0x200 0x38>; 52c6d4d657SGrant Likely }; 53c6d4d657SGrant Likely 5424ce6bc4SGrant Likely mpc5200_pic: interrupt-controller@500 { 55c6d4d657SGrant Likely // 5200 interrupts are encoded into two levels; 56c6d4d657SGrant Likely interrupt-controller; 57c6d4d657SGrant Likely #interrupt-cells = <3>; 5824ce6bc4SGrant Likely compatible = "fsl,mpc5200-pic"; 59a2884f37SGrant Likely reg = <0x500 0x80>; 60c6d4d657SGrant Likely }; 61c6d4d657SGrant Likely 6224ce6bc4SGrant Likely timer@600 { // General Purpose Timer 63d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 64a2884f37SGrant Likely reg = <0x600 0x10>; 65c6d4d657SGrant Likely interrupts = <1 9 0>; 66d24bc314SMarian Balakowicz fsl,has-wdt; 67c6d4d657SGrant Likely }; 68c6d4d657SGrant Likely 6924ce6bc4SGrant Likely timer@610 { // General Purpose Timer 70d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 71a2884f37SGrant Likely reg = <0x610 0x10>; 72a2884f37SGrant Likely interrupts = <1 10 0>; 73c6d4d657SGrant Likely }; 74c6d4d657SGrant Likely 7524ce6bc4SGrant Likely timer@620 { // General Purpose Timer 76d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 77a2884f37SGrant Likely reg = <0x620 0x10>; 78a2884f37SGrant Likely interrupts = <1 11 0>; 79c6d4d657SGrant Likely }; 80c6d4d657SGrant Likely 8124ce6bc4SGrant Likely timer@630 { // General Purpose Timer 82d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 83a2884f37SGrant Likely reg = <0x630 0x10>; 84a2884f37SGrant Likely interrupts = <1 12 0>; 85c6d4d657SGrant Likely }; 86c6d4d657SGrant Likely 8724ce6bc4SGrant Likely timer@640 { // General Purpose Timer 88d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 89a2884f37SGrant Likely reg = <0x640 0x10>; 90a2884f37SGrant Likely interrupts = <1 13 0>; 91c6d4d657SGrant Likely }; 92c6d4d657SGrant Likely 9324ce6bc4SGrant Likely timer@650 { // General Purpose Timer 94d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 95a2884f37SGrant Likely reg = <0x650 0x10>; 96a2884f37SGrant Likely interrupts = <1 14 0>; 97c6d4d657SGrant Likely }; 98c6d4d657SGrant Likely 9924ce6bc4SGrant Likely timer@660 { // General Purpose Timer 100d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 101a2884f37SGrant Likely reg = <0x660 0x10>; 102a2884f37SGrant Likely interrupts = <1 15 0>; 103c6d4d657SGrant Likely }; 104c6d4d657SGrant Likely 10524ce6bc4SGrant Likely timer@670 { // General Purpose Timer 106d24bc314SMarian Balakowicz compatible = "fsl,mpc5200-gpt"; 107a2884f37SGrant Likely reg = <0x670 0x10>; 108a2884f37SGrant Likely interrupts = <1 16 0>; 109c6d4d657SGrant Likely }; 110c6d4d657SGrant Likely 111c6d4d657SGrant Likely rtc@800 { // Real time clock 11224ce6bc4SGrant Likely compatible = "fsl,mpc5200-rtc"; 113a2884f37SGrant Likely reg = <0x800 0x100>; 114c6d4d657SGrant Likely interrupts = <1 5 0 1 6 0>; 115c6d4d657SGrant Likely }; 116c6d4d657SGrant Likely 11724ce6bc4SGrant Likely can@900 { 11824ce6bc4SGrant Likely compatible = "fsl,mpc5200-mscan"; 119a2884f37SGrant Likely interrupts = <2 17 0>; 120a2884f37SGrant Likely reg = <0x900 0x80>; 121c6d4d657SGrant Likely }; 122c6d4d657SGrant Likely 12324ce6bc4SGrant Likely can@980 { 12424ce6bc4SGrant Likely compatible = "fsl,mpc5200-mscan"; 125a2884f37SGrant Likely interrupts = <2 18 0>; 126a2884f37SGrant Likely reg = <0x980 0x80>; 127c6d4d657SGrant Likely }; 128c6d4d657SGrant Likely 129c6d4d657SGrant Likely gpio@b00 { 13024ce6bc4SGrant Likely compatible = "fsl,mpc5200-gpio"; 131a2884f37SGrant Likely reg = <0xb00 0x40>; 132c6d4d657SGrant Likely interrupts = <1 7 0>; 133a2c9a603SDmitry Baryshkov gpio-controller; 134a2c9a603SDmitry Baryshkov #gpio-cells = <2>; 135c6d4d657SGrant Likely }; 136c6d4d657SGrant Likely 13724ce6bc4SGrant Likely gpio@c00 { 13824ce6bc4SGrant Likely compatible = "fsl,mpc5200-gpio-wkup"; 139a2884f37SGrant Likely reg = <0xc00 0x40>; 140c6d4d657SGrant Likely interrupts = <1 8 0 0 3 0>; 141a2c9a603SDmitry Baryshkov gpio-controller; 142a2c9a603SDmitry Baryshkov #gpio-cells = <2>; 143c6d4d657SGrant Likely }; 144c6d4d657SGrant Likely 145c6d4d657SGrant Likely spi@f00 { 14624ce6bc4SGrant Likely compatible = "fsl,mpc5200-spi"; 147a2884f37SGrant Likely reg = <0xf00 0x20>; 148a2884f37SGrant Likely interrupts = <2 13 0 2 14 0>; 149c6d4d657SGrant Likely }; 150c6d4d657SGrant Likely 151c6d4d657SGrant Likely usb@1000 { 15224ce6bc4SGrant Likely compatible = "fsl,mpc5200-ohci","ohci-be"; 153a2884f37SGrant Likely reg = <0x1000 0xff>; 154c6d4d657SGrant Likely interrupts = <2 6 0>; 155c6d4d657SGrant Likely }; 156c6d4d657SGrant Likely 15724ce6bc4SGrant Likely dma-controller@1200 { 15824ce6bc4SGrant Likely compatible = "fsl,mpc5200-bestcomm"; 159a2884f37SGrant Likely reg = <0x1200 0x80>; 160c6d4d657SGrant Likely interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 161c6d4d657SGrant Likely 3 4 0 3 5 0 3 6 0 3 7 0 162a2884f37SGrant Likely 3 8 0 3 9 0 3 10 0 3 11 0 163a2884f37SGrant Likely 3 12 0 3 13 0 3 14 0 3 15 0>; 164c6d4d657SGrant Likely }; 165c6d4d657SGrant Likely 166c6d4d657SGrant Likely xlb@1f00 { 16724ce6bc4SGrant Likely compatible = "fsl,mpc5200-xlb"; 168a2884f37SGrant Likely reg = <0x1f00 0x100>; 169c6d4d657SGrant Likely }; 170c6d4d657SGrant Likely 171c6d4d657SGrant Likely serial@2000 { // PSC1 17224ce6bc4SGrant Likely compatible = "fsl,mpc5200-psc-uart"; 17305cbbc69SGrant Likely cell-index = <0>; 174a2884f37SGrant Likely reg = <0x2000 0x100>; 175c6d4d657SGrant Likely interrupts = <2 1 0>; 176c6d4d657SGrant Likely }; 177c6d4d657SGrant Likely 17805cbbc69SGrant Likely // PSC2 in ac97 mode example 17905cbbc69SGrant Likely //ac97@2200 { // PSC2 18024ce6bc4SGrant Likely // compatible = "fsl,mpc5200-psc-ac97"; 18105cbbc69SGrant Likely // cell-index = <1>; 182a2884f37SGrant Likely // reg = <0x2200 0x100>; 18305cbbc69SGrant Likely // interrupts = <2 2 0>; 18405cbbc69SGrant Likely //}; 185c6d4d657SGrant Likely 186c6d4d657SGrant Likely // PSC3 in CODEC mode example 18705cbbc69SGrant Likely //i2s@2400 { // PSC3 18824ce6bc4SGrant Likely // compatible = "fsl,mpc5200-psc-i2s"; 18905cbbc69SGrant Likely // cell-index = <2>; 190a2884f37SGrant Likely // reg = <0x2400 0x100>; 19105cbbc69SGrant Likely // interrupts = <2 3 0>; 19205cbbc69SGrant Likely //}; 193c6d4d657SGrant Likely 19405cbbc69SGrant Likely // PSC4 in uart mode example 195c6d4d657SGrant Likely //serial@2600 { // PSC4 19624ce6bc4SGrant Likely // compatible = "fsl,mpc5200-psc-uart"; 19705cbbc69SGrant Likely // cell-index = <3>; 198a2884f37SGrant Likely // reg = <0x2600 0x100>; 199a2884f37SGrant Likely // interrupts = <2 11 0>; 200c6d4d657SGrant Likely //}; 201c6d4d657SGrant Likely 20205cbbc69SGrant Likely // PSC5 in uart mode example 203c6d4d657SGrant Likely //serial@2800 { // PSC5 20424ce6bc4SGrant Likely // compatible = "fsl,mpc5200-psc-uart"; 20505cbbc69SGrant Likely // cell-index = <4>; 206a2884f37SGrant Likely // reg = <0x2800 0x100>; 207a2884f37SGrant Likely // interrupts = <2 12 0>; 208c6d4d657SGrant Likely //}; 209c6d4d657SGrant Likely 21005cbbc69SGrant Likely // PSC6 in spi mode example 21105cbbc69SGrant Likely //spi@2c00 { // PSC6 21224ce6bc4SGrant Likely // compatible = "fsl,mpc5200-psc-spi"; 21305cbbc69SGrant Likely // cell-index = <5>; 214a2884f37SGrant Likely // reg = <0x2c00 0x100>; 21505cbbc69SGrant Likely // interrupts = <2 4 0>; 21605cbbc69SGrant Likely //}; 217c6d4d657SGrant Likely 218c6d4d657SGrant Likely ethernet@3000 { 21924ce6bc4SGrant Likely compatible = "fsl,mpc5200-fec"; 220a2884f37SGrant Likely reg = <0x3000 0x400>; 22124ce6bc4SGrant Likely local-mac-address = [ 00 00 00 00 00 00 ]; 222c6d4d657SGrant Likely interrupts = <2 5 0>; 2238d813941SRené Bürgel phy-handle = <&phy0>; 2248d813941SRené Bürgel }; 2258d813941SRené Bürgel 2268d813941SRené Bürgel mdio@3000 { 2278d813941SRené Bürgel #address-cells = <1>; 2288d813941SRené Bürgel #size-cells = <0>; 2298d813941SRené Bürgel compatible = "fsl,mpc5200-mdio"; 230a2884f37SGrant Likely reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 2318d813941SRené Bürgel interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 2328d813941SRené Bürgel 2332b07be24SDmitry Baryshkov phy0: ethernet-phy@0 { 2342b07be24SDmitry Baryshkov reg = <0>; 2358d813941SRené Bürgel }; 236c6d4d657SGrant Likely }; 237c6d4d657SGrant Likely 238c6d4d657SGrant Likely ata@3a00 { 23924ce6bc4SGrant Likely compatible = "fsl,mpc5200-ata"; 240a2884f37SGrant Likely reg = <0x3a00 0x100>; 241c6d4d657SGrant Likely interrupts = <2 7 0>; 242c6d4d657SGrant Likely }; 243c6d4d657SGrant Likely 244c6d4d657SGrant Likely i2c@3d00 { 245ec9686c4SKumar Gala #address-cells = <1>; 246ec9686c4SKumar Gala #size-cells = <0>; 24724ce6bc4SGrant Likely compatible = "fsl,mpc5200-i2c","fsl-i2c"; 248a2884f37SGrant Likely reg = <0x3d00 0x40>; 249a2884f37SGrant Likely interrupts = <2 15 0>; 250c6d4d657SGrant Likely }; 251c6d4d657SGrant Likely 252c6d4d657SGrant Likely i2c@3d40 { 253ec9686c4SKumar Gala #address-cells = <1>; 254ec9686c4SKumar Gala #size-cells = <0>; 25524ce6bc4SGrant Likely compatible = "fsl,mpc5200-i2c","fsl-i2c"; 256a2884f37SGrant Likely reg = <0x3d40 0x40>; 257a2884f37SGrant Likely interrupts = <2 16 0>; 258a2c9a603SDmitry Baryshkov 259a2c9a603SDmitry Baryshkov eeprom@50 { 260a2c9a603SDmitry Baryshkov compatible = "atmel,24c02"; 261a2c9a603SDmitry Baryshkov reg = <0x50>; 262c6d4d657SGrant Likely }; 263a2c9a603SDmitry Baryshkov }; 264a2c9a603SDmitry Baryshkov 265c6d4d657SGrant Likely sram@8000 { 266b8842451SGrant Likely compatible = "fsl,mpc5200-sram"; 267a2884f37SGrant Likely reg = <0x8000 0x4000>; 268c6d4d657SGrant Likely }; 269c6d4d657SGrant Likely }; 2701b3c5cdaSKumar Gala 2711b3c5cdaSKumar Gala pci@f0000d00 { 2721b3c5cdaSKumar Gala #interrupt-cells = <1>; 2731b3c5cdaSKumar Gala #size-cells = <2>; 2741b3c5cdaSKumar Gala #address-cells = <3>; 2751b3c5cdaSKumar Gala device_type = "pci"; 27624ce6bc4SGrant Likely compatible = "fsl,mpc5200-pci"; 277a2884f37SGrant Likely reg = <0xf0000d00 0x100>; 278a2884f37SGrant Likely interrupt-map-mask = <0xf800 0 0 7>; 279a2884f37SGrant Likely interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 280a2884f37SGrant Likely 0xc000 0 0 2 &mpc5200_pic 0 0 3 281a2884f37SGrant Likely 0xc000 0 0 3 &mpc5200_pic 0 0 3 282a2884f37SGrant Likely 0xc000 0 0 4 &mpc5200_pic 0 0 3>; 2831b3c5cdaSKumar Gala clock-frequency = <0>; // From boot loader 284a2884f37SGrant Likely interrupts = <2 8 0 2 9 0 2 10 0>; 2851b3c5cdaSKumar Gala bus-range = <0 0>; 2867855b6c6SAnatolij Gustschin ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000>, 2877855b6c6SAnatolij Gustschin <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000>, 2887855b6c6SAnatolij Gustschin <0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; 2891b3c5cdaSKumar Gala }; 290a2c9a603SDmitry Baryshkov 291a2c9a603SDmitry Baryshkov localbus { 292a2c9a603SDmitry Baryshkov compatible = "fsl,mpc5200-lpb","simple-bus"; 293a2c9a603SDmitry Baryshkov #address-cells = <2>; 294a2c9a603SDmitry Baryshkov #size-cells = <1>; 295a2c9a603SDmitry Baryshkov 296a2c9a603SDmitry Baryshkov ranges = <0 0 0xff000000 0x01000000>; 297a2c9a603SDmitry Baryshkov 298a2c9a603SDmitry Baryshkov flash@0,0 { 299a2c9a603SDmitry Baryshkov compatible = "amd,am29lv652d", "cfi-flash"; 300a2c9a603SDmitry Baryshkov reg = <0 0 0x01000000>; 301a2c9a603SDmitry Baryshkov bank-width = <1>; 302a2c9a603SDmitry Baryshkov }; 303a2c9a603SDmitry Baryshkov }; 304c6d4d657SGrant Likely}; 305