1/* 2 * Device Tree Souce for Buffalo KuroboxHG 3 * 4 * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use 5 * the default configuration linkstation_defconfig. 6 * 7 * Based on sandpoint.dts 8 * 9 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> 10 * 11 * This file is licensed under 12 * the terms of the GNU General Public License version 2. This program 13 * is licensed "as is" without any warranty of any kind, whether express 14 * or implied. 15 16XXXX add flash parts, rtc, ?? 17 18 */ 19 20/ { 21 model = "KuroboxHG"; 22 compatible = "linkstation"; 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 cpus { 27 #address-cells = <1>; 28 #size-cells = <0>; 29 30 PowerPC,603e { /* Really 8241 */ 31 device_type = "cpu"; 32 reg = <0>; 33 clock-frequency = <fdad680>; /* Fixed by bootloader */ 34 timebase-frequency = <1F04000>; /* Fixed by bootloader */ 35 bus-frequency = <0>; /* Fixed by bootloader */ 36 /* Following required by dtc but not used */ 37 i-cache-size = <4000>; 38 d-cache-size = <4000>; 39 }; 40 }; 41 42 memory { 43 device_type = "memory"; 44 reg = <00000000 08000000>; 45 }; 46 47 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ 48 #address-cells = <1>; 49 #size-cells = <1>; 50 device_type = "soc"; 51 compatible = "mpc10x"; 52 store-gathering = <0>; /* 0 == off, !0 == on */ 53 reg = <80000000 00100000>; 54 ranges = <80000000 80000000 70000000 /* pci mem space */ 55 fc000000 fc000000 00100000 /* EUMB */ 56 fe000000 fe000000 00c00000 /* pci i/o space */ 57 fec00000 fec00000 00300000 /* pci cfg regs */ 58 fef00000 fef00000 00100000>; /* pci iack */ 59 60 i2c@80003000 { 61 #address-cells = <1>; 62 #size-cells = <0>; 63 cell-index = <0>; 64 compatible = "fsl-i2c"; 65 reg = <80003000 1000>; 66 interrupts = <5 2>; 67 interrupt-parent = <&mpic>; 68 69 rtc@32 { 70 device_type = "rtc"; 71 compatible = "ricoh,rs5c372a"; 72 reg = <32>; 73 }; 74 }; 75 76 serial@80004500 { 77 device_type = "serial"; 78 compatible = "ns16550"; 79 reg = <80004500 8>; 80 clock-frequency = <7c044a8>; 81 current-speed = <2580>; 82 interrupts = <9 0>; 83 interrupt-parent = <&mpic>; 84 }; 85 86 serial@80004600 { 87 device_type = "serial"; 88 compatible = "ns16550"; 89 reg = <80004600 8>; 90 clock-frequency = <7c044a8>; 91 current-speed = <e100>; 92 interrupts = <a 0>; 93 interrupt-parent = <&mpic>; 94 }; 95 96 mpic: interrupt-controller@80040000 { 97 #interrupt-cells = <2>; 98 #address-cells = <0>; 99 device_type = "open-pic"; 100 compatible = "chrp,open-pic"; 101 interrupt-controller; 102 reg = <80040000 40000>; 103 }; 104 105 pci@fec00000 { 106 #address-cells = <3>; 107 #size-cells = <2>; 108 #interrupt-cells = <1>; 109 device_type = "pci"; 110 compatible = "mpc10x-pci"; 111 reg = <fec00000 400000>; 112 ranges = <01000000 0 0 fe000000 0 00c00000 113 02000000 0 80000000 80000000 0 70000000>; 114 bus-range = <0 ff>; 115 clock-frequency = <7f28155>; 116 interrupt-parent = <&mpic>; 117 interrupt-map-mask = <f800 0 0 7>; 118 interrupt-map = < 119 /* IDSEL 11 - IRQ0 ETH */ 120 5800 0 0 1 &mpic 0 1 121 5800 0 0 2 &mpic 1 1 122 5800 0 0 3 &mpic 2 1 123 5800 0 0 4 &mpic 3 1 124 /* IDSEL 12 - IRQ1 IDE0 */ 125 6000 0 0 1 &mpic 1 1 126 6000 0 0 2 &mpic 2 1 127 6000 0 0 3 &mpic 3 1 128 6000 0 0 4 &mpic 0 1 129 /* IDSEL 14 - IRQ3 USB2.0 */ 130 7000 0 0 1 &mpic 3 1 131 7000 0 0 2 &mpic 3 1 132 7000 0 0 3 &mpic 3 1 133 7000 0 0 4 &mpic 3 1 134 >; 135 }; 136 }; 137}; 138