1/*
2 * Device Tree Source for AMCC Kilauea (405EX)
3 *
4 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2.  This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/ {
14	#address-cells = <1>;
15	#size-cells = <1>;
16	model = "amcc,kilauea";
17	compatible = "amcc,kilauea";
18	dcr-parent = <&{/cpus/cpu@0}>;
19
20	aliases {
21		ethernet0 = &EMAC0;
22		ethernet1 = &EMAC1;
23		serial0 = &UART0;
24		serial1 = &UART1;
25	};
26
27	cpus {
28		#address-cells = <1>;
29		#size-cells = <0>;
30
31		cpu@0 {
32			device_type = "cpu";
33			model = "PowerPC,405EX";
34			reg = <0x00000000>;
35			clock-frequency = <0>; /* Filled in by U-Boot */
36			timebase-frequency = <0>; /* Filled in by U-Boot */
37			i-cache-line-size = <32>;
38			d-cache-line-size = <32>;
39			i-cache-size = <16384>; /* 16 kB */
40			d-cache-size = <16384>; /* 16 kB */
41			dcr-controller;
42			dcr-access-method = "native";
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
49	};
50
51	UIC0: interrupt-controller {
52		compatible = "ibm,uic-405ex", "ibm,uic";
53		interrupt-controller;
54		cell-index = <0>;
55		dcr-reg = <0x0c0 0x009>;
56		#address-cells = <0>;
57		#size-cells = <0>;
58		#interrupt-cells = <2>;
59	};
60
61	UIC1: interrupt-controller1 {
62		compatible = "ibm,uic-405ex","ibm,uic";
63		interrupt-controller;
64		cell-index = <1>;
65		dcr-reg = <0x0d0 0x009>;
66		#address-cells = <0>;
67		#size-cells = <0>;
68		#interrupt-cells = <2>;
69		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
70		interrupt-parent = <&UIC0>;
71	};
72
73	UIC2: interrupt-controller2 {
74		compatible = "ibm,uic-405ex","ibm,uic";
75		interrupt-controller;
76		cell-index = <2>;
77		dcr-reg = <0x0e0 0x009>;
78		#address-cells = <0>;
79		#size-cells = <0>;
80		#interrupt-cells = <2>;
81		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
82		interrupt-parent = <&UIC0>;
83	};
84
85	plb {
86		compatible = "ibm,plb-405ex", "ibm,plb4";
87		#address-cells = <1>;
88		#size-cells = <1>;
89		ranges;
90		clock-frequency = <0>; /* Filled in by U-Boot */
91
92		SDRAM0: memory-controller {
93			compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
94			dcr-reg = <0x010 0x002>;
95			interrupt-parent = <&UIC2>;
96			interrupts = <0x5 0x4	/* ECC DED Error */
97				      0x6 0x4>;	/* ECC SEC Error */
98		};
99
100		CRYPTO: crypto@ef700000 {
101			compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
102			reg = <0xef700000 0x80400>;
103			interrupt-parent = <&UIC0>;
104			interrupts = <0x17 0x2>;
105		};
106
107		MAL0: mcmal {
108			compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
109			dcr-reg = <0x180 0x062>;
110			num-tx-chans = <2>;
111			num-rx-chans = <2>;
112			interrupt-parent = <&MAL0>;
113			interrupts = <0x0 0x1 0x2 0x3 0x4>;
114			#interrupt-cells = <1>;
115			#address-cells = <0>;
116			#size-cells = <0>;
117			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
118					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
119					/*SERR*/  0x2 &UIC1 0x0 0x4
120					/*TXDE*/  0x3 &UIC1 0x1 0x4
121					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
122			interrupt-map-mask = <0xffffffff>;
123		};
124
125		POB0: opb {
126			compatible = "ibm,opb-405ex", "ibm,opb";
127			#address-cells = <1>;
128			#size-cells = <1>;
129			ranges = <0x80000000 0x80000000 0x10000000
130				  0xef600000 0xef600000 0x00a00000
131				  0xf0000000 0xf0000000 0x10000000>;
132			dcr-reg = <0x0a0 0x005>;
133			clock-frequency = <0>; /* Filled in by U-Boot */
134
135			EBC0: ebc {
136				compatible = "ibm,ebc-405ex", "ibm,ebc";
137				dcr-reg = <0x012 0x002>;
138				#address-cells = <2>;
139				#size-cells = <1>;
140				clock-frequency = <0>; /* Filled in by U-Boot */
141				/* ranges property is supplied by U-Boot */
142				interrupts = <0x5 0x1>;
143				interrupt-parent = <&UIC1>;
144
145				nor_flash@0,0 {
146					compatible = "amd,s29gl512n", "cfi-flash";
147					bank-width = <2>;
148					reg = <0x00000000 0x00000000 0x04000000>;
149					#address-cells = <1>;
150					#size-cells = <1>;
151					partition@0 {
152						label = "kernel";
153						reg = <0x00000000 0x001e0000>;
154					};
155					partition@1e0000 {
156						label = "dtb";
157						reg = <0x001e0000 0x00020000>;
158					};
159					partition@200000 {
160						label = "root";
161						reg = <0x00200000 0x00200000>;
162					};
163					partition@400000 {
164						label = "user";
165						reg = <0x00400000 0x03b60000>;
166					};
167					partition@3f60000 {
168						label = "env";
169						reg = <0x03f60000 0x00040000>;
170					};
171					partition@3fa0000 {
172						label = "u-boot";
173						reg = <0x03fa0000 0x00060000>;
174					};
175				};
176
177				ndfc@1,0 {
178					compatible = "ibm,ndfc";
179					reg = <0x00000001 0x00000000 0x00002000>;
180					ccr = <0x00001000>;
181					bank-settings = <0x80002222>;
182					#address-cells = <1>;
183					#size-cells = <1>;
184
185					nand {
186						#address-cells = <1>;
187						#size-cells = <1>;
188
189						partition@0 {
190							label = "u-boot";
191							reg = <0x00000000 0x00100000>;
192						};
193						partition@100000 {
194							label = "user";
195							reg = <0x00000000 0x03f00000>;
196						};
197					};
198				};
199			};
200
201			UART0: serial@ef600200 {
202				device_type = "serial";
203				compatible = "ns16550";
204				reg = <0xef600200 0x00000008>;
205				virtual-reg = <0xef600200>;
206				clock-frequency = <0>; /* Filled in by U-Boot */
207				current-speed = <0>;
208				interrupt-parent = <&UIC0>;
209				interrupts = <0x1a 0x4>;
210			};
211
212			UART1: serial@ef600300 {
213				device_type = "serial";
214				compatible = "ns16550";
215				reg = <0xef600300 0x00000008>;
216				virtual-reg = <0xef600300>;
217				clock-frequency = <0>; /* Filled in by U-Boot */
218				current-speed = <0>;
219				interrupt-parent = <&UIC0>;
220				interrupts = <0x1 0x4>;
221			};
222
223			IIC0: i2c@ef600400 {
224				compatible = "ibm,iic-405ex", "ibm,iic";
225				reg = <0xef600400 0x00000014>;
226				interrupt-parent = <&UIC0>;
227				interrupts = <0x2 0x4>;
228				#address-cells = <1>;
229				#size-cells = <0>;
230
231				rtc@68 {
232					compatible = "dallas,ds1338";
233					reg = <0x68>;
234				};
235
236				dtt@48 {
237					compatible = "dallas,ds1775";
238					reg = <0x48>;
239				};
240			};
241
242			IIC1: i2c@ef600500 {
243				compatible = "ibm,iic-405ex", "ibm,iic";
244				reg = <0xef600500 0x00000014>;
245				interrupt-parent = <&UIC0>;
246				interrupts = <0x7 0x4>;
247			};
248
249			RGMII0: emac-rgmii@ef600b00 {
250				compatible = "ibm,rgmii-405ex", "ibm,rgmii";
251				reg = <0xef600b00 0x00000104>;
252				has-mdio;
253			};
254
255			EMAC0: ethernet@ef600900 {
256				linux,network-index = <0x0>;
257				device_type = "network";
258				compatible = "ibm,emac-405ex", "ibm,emac4sync";
259				interrupt-parent = <&EMAC0>;
260				interrupts = <0x0 0x1>;
261				#interrupt-cells = <1>;
262				#address-cells = <0>;
263				#size-cells = <0>;
264				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
265						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
266				reg = <0xef600900 0x000000c4>;
267				local-mac-address = [000000000000]; /* Filled in by U-Boot */
268				mal-device = <&MAL0>;
269				mal-tx-channel = <0>;
270				mal-rx-channel = <0>;
271				cell-index = <0>;
272				max-frame-size = <9000>;
273				rx-fifo-size = <4096>;
274				tx-fifo-size = <2048>;
275				rx-fifo-size-gige = <16384>;
276				tx-fifo-size-gige = <16384>;
277				phy-mode = "rgmii";
278				phy-map = <0x00000000>;
279				rgmii-device = <&RGMII0>;
280				rgmii-channel = <0>;
281				has-inverted-stacr-oc;
282				has-new-stacr-staopc;
283			};
284
285			EMAC1: ethernet@ef600a00 {
286				linux,network-index = <0x1>;
287				device_type = "network";
288				compatible = "ibm,emac-405ex", "ibm,emac4sync";
289				interrupt-parent = <&EMAC1>;
290				interrupts = <0x0 0x1>;
291				#interrupt-cells = <1>;
292				#address-cells = <0>;
293				#size-cells = <0>;
294				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
295						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
296				reg = <0xef600a00 0x000000c4>;
297				local-mac-address = [000000000000]; /* Filled in by U-Boot */
298				mal-device = <&MAL0>;
299				mal-tx-channel = <1>;
300				mal-rx-channel = <1>;
301				cell-index = <1>;
302				max-frame-size = <9000>;
303				rx-fifo-size = <4096>;
304				tx-fifo-size = <2048>;
305				rx-fifo-size-gige = <16384>;
306				tx-fifo-size-gige = <16384>;
307				phy-mode = "rgmii";
308				phy-map = <0x00000000>;
309				rgmii-device = <&RGMII0>;
310				rgmii-channel = <1>;
311				has-inverted-stacr-oc;
312				has-new-stacr-staopc;
313			};
314		};
315
316		PCIE0: pciex@0a0000000 {
317			device_type = "pci";
318			#interrupt-cells = <1>;
319			#size-cells = <2>;
320			#address-cells = <3>;
321			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
322			primary;
323			port = <0x0>; /* port number */
324			reg = <0xa0000000 0x20000000	/* Config space access */
325			       0xef000000 0x00001000>;	/* Registers */
326			dcr-reg = <0x040 0x020>;
327			sdr-base = <0x400>;
328
329			/* Outbound ranges, one memory and one IO,
330			 * later cannot be changed
331			 */
332			ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
333				  0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
334
335			/* Inbound 2GB range starting at 0 */
336			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
337
338			/* This drives busses 0x00 to 0x3f */
339			bus-range = <0x0 0x3f>;
340
341			/* Legacy interrupts (note the weird polarity, the bridge seems
342			 * to invert PCIe legacy interrupts).
343			 * We are de-swizzling here because the numbers are actually for
344			 * port of the root complex virtual P2P bridge. But I want
345			 * to avoid putting a node for it in the tree, so the numbers
346			 * below are basically de-swizzled numbers.
347			 * The real slot is on idsel 0, so the swizzling is 1:1
348			 */
349			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
350			interrupt-map = <
351				0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
352				0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
353				0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
354				0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
355		};
356
357		PCIE1: pciex@0c0000000 {
358			device_type = "pci";
359			#interrupt-cells = <1>;
360			#size-cells = <2>;
361			#address-cells = <3>;
362			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
363			primary;
364			port = <0x1>; /* port number */
365			reg = <0xc0000000 0x20000000	/* Config space access */
366			       0xef001000 0x00001000>;	/* Registers */
367			dcr-reg = <0x060 0x020>;
368			sdr-base = <0x440>;
369
370			/* Outbound ranges, one memory and one IO,
371			 * later cannot be changed
372			 */
373			ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
374				  0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
375
376			/* Inbound 2GB range starting at 0 */
377			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
378
379			/* This drives busses 0x40 to 0x7f */
380			bus-range = <0x40 0x7f>;
381
382			/* Legacy interrupts (note the weird polarity, the bridge seems
383			 * to invert PCIe legacy interrupts).
384			 * We are de-swizzling here because the numbers are actually for
385			 * port of the root complex virtual P2P bridge. But I want
386			 * to avoid putting a node for it in the tree, so the numbers
387			 * below are basically de-swizzled numbers.
388			 * The real slot is on idsel 0, so the swizzling is 1:1
389			 */
390			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
391			interrupt-map = <
392				0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
393				0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
394				0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
395				0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
396		};
397	};
398};
399