1/* 2 * Device Tree Source for AMCC Kilauea (405EX) 3 * 4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without 8 * any warranty of any kind, whether express or implied. 9 */ 10 11/ { 12 #address-cells = <1>; 13 #size-cells = <1>; 14 model = "amcc,kilauea"; 15 compatible = "amcc,kilauea"; 16 dcr-parent = <&/cpus/cpu@0>; 17 18 cpus { 19 #address-cells = <1>; 20 #size-cells = <0>; 21 22 cpu@0 { 23 device_type = "cpu"; 24 model = "PowerPC,405EX"; 25 reg = <0>; 26 clock-frequency = <0>; /* Filled in by U-Boot */ 27 timebase-frequency = <0>; /* Filled in by U-Boot */ 28 i-cache-line-size = <20>; 29 d-cache-line-size = <20>; 30 i-cache-size = <4000>; /* 16 kB */ 31 d-cache-size = <4000>; /* 16 kB */ 32 dcr-controller; 33 dcr-access-method = "native"; 34 }; 35 }; 36 37 memory { 38 device_type = "memory"; 39 reg = <0 0>; /* Filled in by U-Boot */ 40 }; 41 42 UIC0: interrupt-controller { 43 compatible = "ibm,uic-405ex", "ibm,uic"; 44 interrupt-controller; 45 cell-index = <0>; 46 dcr-reg = <0c0 009>; 47 #address-cells = <0>; 48 #size-cells = <0>; 49 #interrupt-cells = <2>; 50 }; 51 52 UIC1: interrupt-controller1 { 53 compatible = "ibm,uic-405ex","ibm,uic"; 54 interrupt-controller; 55 cell-index = <1>; 56 dcr-reg = <0d0 009>; 57 #address-cells = <0>; 58 #size-cells = <0>; 59 #interrupt-cells = <2>; 60 interrupts = <1e 4 1f 4>; /* cascade */ 61 interrupt-parent = <&UIC0>; 62 }; 63 64 UIC2: interrupt-controller2 { 65 compatible = "ibm,uic-405ex","ibm,uic"; 66 interrupt-controller; 67 cell-index = <2>; 68 dcr-reg = <0e0 009>; 69 #address-cells = <0>; 70 #size-cells = <0>; 71 #interrupt-cells = <2>; 72 interrupts = <1c 4 1d 4>; /* cascade */ 73 interrupt-parent = <&UIC0>; 74 }; 75 76 plb { 77 compatible = "ibm,plb-405ex", "ibm,plb4"; 78 #address-cells = <1>; 79 #size-cells = <1>; 80 ranges; 81 clock-frequency = <0>; /* Filled in by U-Boot */ 82 83 SDRAM0: memory-controller { 84 compatible = "ibm,sdram-405ex"; 85 dcr-reg = <010 2>; 86 }; 87 88 MAL0: mcmal { 89 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 90 dcr-reg = <180 62>; 91 num-tx-chans = <2>; 92 num-rx-chans = <2>; 93 interrupt-parent = <&MAL0>; 94 interrupts = <0 1 2 3 4>; 95 #interrupt-cells = <1>; 96 #address-cells = <0>; 97 #size-cells = <0>; 98 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 99 /*RXEOB*/ 1 &UIC0 b 4 100 /*SERR*/ 2 &UIC1 0 4 101 /*TXDE*/ 3 &UIC1 1 4 102 /*RXDE*/ 4 &UIC1 2 4>; 103 interrupt-map-mask = <ffffffff>; 104 }; 105 106 POB0: opb { 107 compatible = "ibm,opb-405ex", "ibm,opb"; 108 #address-cells = <1>; 109 #size-cells = <1>; 110 ranges = <80000000 80000000 10000000 111 ef600000 ef600000 a00000 112 f0000000 f0000000 10000000>; 113 dcr-reg = <0a0 5>; 114 clock-frequency = <0>; /* Filled in by U-Boot */ 115 116 EBC0: ebc { 117 compatible = "ibm,ebc-405ex", "ibm,ebc"; 118 dcr-reg = <012 2>; 119 #address-cells = <2>; 120 #size-cells = <1>; 121 clock-frequency = <0>; /* Filled in by U-Boot */ 122 /* ranges property is supplied by U-Boot */ 123 interrupts = <5 1>; 124 interrupt-parent = <&UIC1>; 125 126 nor_flash@0,0 { 127 compatible = "amd,s29gl512n", "cfi-flash"; 128 bank-width = <2>; 129 reg = <0 000000 4000000>; 130 #address-cells = <1>; 131 #size-cells = <1>; 132 partition@0 { 133 label = "kernel"; 134 reg = <0 200000>; 135 }; 136 partition@200000 { 137 label = "root"; 138 reg = <200000 200000>; 139 }; 140 partition@400000 { 141 label = "user"; 142 reg = <400000 3b60000>; 143 }; 144 partition@3f60000 { 145 label = "env"; 146 reg = <3f60000 40000>; 147 }; 148 partition@3fa0000 { 149 label = "u-boot"; 150 reg = <3fa0000 60000>; 151 }; 152 }; 153 }; 154 155 UART0: serial@ef600200 { 156 device_type = "serial"; 157 compatible = "ns16550"; 158 reg = <ef600200 8>; 159 virtual-reg = <ef600200>; 160 clock-frequency = <0>; /* Filled in by U-Boot */ 161 current-speed = <0>; 162 interrupt-parent = <&UIC0>; 163 interrupts = <1a 4>; 164 }; 165 166 UART1: serial@ef600300 { 167 device_type = "serial"; 168 compatible = "ns16550"; 169 reg = <ef600300 8>; 170 virtual-reg = <ef600300>; 171 clock-frequency = <0>; /* Filled in by U-Boot */ 172 current-speed = <0>; 173 interrupt-parent = <&UIC0>; 174 interrupts = <1 4>; 175 }; 176 177 IIC0: i2c@ef600400 { 178 device_type = "i2c"; 179 compatible = "ibm,iic-405ex", "ibm,iic"; 180 reg = <ef600400 14>; 181 interrupt-parent = <&UIC0>; 182 interrupts = <2 4>; 183 }; 184 185 IIC1: i2c@ef600500 { 186 device_type = "i2c"; 187 compatible = "ibm,iic-405ex", "ibm,iic"; 188 reg = <ef600500 14>; 189 interrupt-parent = <&UIC0>; 190 interrupts = <7 4>; 191 }; 192 193 194 RGMII0: emac-rgmii@ef600b00 { 195 device_type = "rgmii-interface"; 196 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 197 reg = <ef600b00 104>; 198 has-mdio; 199 }; 200 201 EMAC0: ethernet@ef600900 { 202 linux,network-index = <0>; 203 device_type = "network"; 204 compatible = "ibm,emac-405ex", "ibm,emac4"; 205 interrupt-parent = <&EMAC0>; 206 interrupts = <0 1>; 207 #interrupt-cells = <1>; 208 #address-cells = <0>; 209 #size-cells = <0>; 210 interrupt-map = </*Status*/ 0 &UIC0 18 4 211 /*Wake*/ 1 &UIC1 1d 4>; 212 reg = <ef600900 70>; 213 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 214 mal-device = <&MAL0>; 215 mal-tx-channel = <0>; 216 mal-rx-channel = <0>; 217 cell-index = <0>; 218 max-frame-size = <5dc>; 219 rx-fifo-size = <1000>; 220 tx-fifo-size = <800>; 221 phy-mode = "rgmii"; 222 phy-map = <00000000>; 223 rgmii-device = <&RGMII0>; 224 rgmii-channel = <0>; 225 has-inverted-stacr-oc; 226 has-new-stacr-staopc; 227 }; 228 229 EMAC1: ethernet@ef600a00 { 230 linux,network-index = <1>; 231 device_type = "network"; 232 compatible = "ibm,emac-405ex", "ibm,emac4"; 233 interrupt-parent = <&EMAC1>; 234 interrupts = <0 1>; 235 #interrupt-cells = <1>; 236 #address-cells = <0>; 237 #size-cells = <0>; 238 interrupt-map = </*Status*/ 0 &UIC0 19 4 239 /*Wake*/ 1 &UIC1 1f 4>; 240 reg = <ef600a00 70>; 241 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 242 mal-device = <&MAL0>; 243 mal-tx-channel = <1>; 244 mal-rx-channel = <1>; 245 cell-index = <1>; 246 max-frame-size = <5dc>; 247 rx-fifo-size = <1000>; 248 tx-fifo-size = <800>; 249 phy-mode = "rgmii"; 250 phy-map = <00000000>; 251 rgmii-device = <&RGMII0>; 252 rgmii-channel = <1>; 253 has-inverted-stacr-oc; 254 has-new-stacr-staopc; 255 }; 256 }; 257 258 PCIE0: pciex@0a0000000 { 259 device_type = "pci"; 260 #interrupt-cells = <1>; 261 #size-cells = <2>; 262 #address-cells = <3>; 263 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 264 primary; 265 port = <0>; /* port number */ 266 reg = <a0000000 20000000 /* Config space access */ 267 ef000000 00001000>; /* Registers */ 268 dcr-reg = <040 020>; 269 sdr-base = <400>; 270 271 /* Outbound ranges, one memory and one IO, 272 * later cannot be changed 273 */ 274 ranges = <02000000 0 80000000 90000000 0 08000000 275 01000000 0 00000000 e0000000 0 00010000>; 276 277 /* Inbound 2GB range starting at 0 */ 278 dma-ranges = <42000000 0 0 0 0 80000000>; 279 280 /* This drives busses 0x00 to 0x0f */ 281 bus-range = <00 0f>; 282 283 /* Legacy interrupts (note the weird polarity, the bridge seems 284 * to invert PCIe legacy interrupts). 285 * We are de-swizzling here because the numbers are actually for 286 * port of the root complex virtual P2P bridge. But I want 287 * to avoid putting a node for it in the tree, so the numbers 288 * below are basically de-swizzled numbers. 289 * The real slot is on idsel 0, so the swizzling is 1:1 290 */ 291 interrupt-map-mask = <0000 0 0 7>; 292 interrupt-map = < 293 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ 294 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ 295 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ 296 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; 297 }; 298 299 PCIE1: pciex@0c0000000 { 300 device_type = "pci"; 301 #interrupt-cells = <1>; 302 #size-cells = <2>; 303 #address-cells = <3>; 304 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 305 primary; 306 port = <1>; /* port number */ 307 reg = <c0000000 20000000 /* Config space access */ 308 ef001000 00001000>; /* Registers */ 309 dcr-reg = <060 020>; 310 sdr-base = <440>; 311 312 /* Outbound ranges, one memory and one IO, 313 * later cannot be changed 314 */ 315 ranges = <02000000 0 80000000 98000000 0 08000000 316 01000000 0 00000000 e0010000 0 00010000>; 317 318 /* Inbound 2GB range starting at 0 */ 319 dma-ranges = <42000000 0 0 0 0 80000000>; 320 321 /* This drives busses 0x10 to 0x1f */ 322 bus-range = <10 1f>; 323 324 /* Legacy interrupts (note the weird polarity, the bridge seems 325 * to invert PCIe legacy interrupts). 326 * We are de-swizzling here because the numbers are actually for 327 * port of the root complex virtual P2P bridge. But I want 328 * to avoid putting a node for it in the tree, so the numbers 329 * below are basically de-swizzled numbers. 330 * The real slot is on idsel 0, so the swizzling is 1:1 331 */ 332 interrupt-map-mask = <0000 0 0 7>; 333 interrupt-map = < 334 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ 335 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ 336 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ 337 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; 338 }; 339 }; 340}; 341