1/* 2 * Device Tree Source for AMCC Kilauea (405EX) 3 * 4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without 8 * any warranty of any kind, whether express or implied. 9 */ 10 11/ { 12 #address-cells = <1>; 13 #size-cells = <1>; 14 model = "amcc,kilauea"; 15 compatible = "amcc,kilauea"; 16 dcr-parent = <&/cpus/PowerPC,405EX@0>; 17 18 cpus { 19 #address-cells = <1>; 20 #size-cells = <0>; 21 22 PowerPC,405EX@0 { 23 device_type = "cpu"; 24 reg = <0>; 25 clock-frequency = <0>; /* Filled in by U-Boot */ 26 timebase-frequency = <0>; /* Filled in by U-Boot */ 27 i-cache-line-size = <20>; 28 d-cache-line-size = <20>; 29 i-cache-size = <4000>; /* 16 kB */ 30 d-cache-size = <4000>; /* 16 kB */ 31 dcr-controller; 32 dcr-access-method = "native"; 33 }; 34 }; 35 36 memory { 37 device_type = "memory"; 38 reg = <0 0>; /* Filled in by U-Boot */ 39 }; 40 41 UIC0: interrupt-controller { 42 compatible = "ibm,uic-405ex", "ibm,uic"; 43 interrupt-controller; 44 cell-index = <0>; 45 dcr-reg = <0c0 009>; 46 #address-cells = <0>; 47 #size-cells = <0>; 48 #interrupt-cells = <2>; 49 }; 50 51 UIC1: interrupt-controller1 { 52 compatible = "ibm,uic-405ex","ibm,uic"; 53 interrupt-controller; 54 cell-index = <1>; 55 dcr-reg = <0d0 009>; 56 #address-cells = <0>; 57 #size-cells = <0>; 58 #interrupt-cells = <2>; 59 interrupts = <1e 4 1f 4>; /* cascade */ 60 interrupt-parent = <&UIC0>; 61 }; 62 63 UIC2: interrupt-controller2 { 64 compatible = "ibm,uic-405ex","ibm,uic"; 65 interrupt-controller; 66 cell-index = <2>; 67 dcr-reg = <0e0 009>; 68 #address-cells = <0>; 69 #size-cells = <0>; 70 #interrupt-cells = <2>; 71 interrupts = <1c 4 1d 4>; /* cascade */ 72 interrupt-parent = <&UIC0>; 73 }; 74 75 plb { 76 compatible = "ibm,plb-405ex", "ibm,plb4"; 77 #address-cells = <1>; 78 #size-cells = <1>; 79 ranges; 80 clock-frequency = <0>; /* Filled in by U-Boot */ 81 82 SDRAM0: memory-controller { 83 compatible = "ibm,sdram-405ex"; 84 dcr-reg = <010 2>; 85 }; 86 87 MAL0: mcmal { 88 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 89 dcr-reg = <180 62>; 90 num-tx-chans = <2>; 91 num-rx-chans = <2>; 92 interrupt-parent = <&MAL0>; 93 interrupts = <0 1 2 3 4>; 94 #interrupt-cells = <1>; 95 #address-cells = <0>; 96 #size-cells = <0>; 97 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 98 /*RXEOB*/ 1 &UIC0 b 4 99 /*SERR*/ 2 &UIC1 0 4 100 /*TXDE*/ 3 &UIC1 1 4 101 /*RXDE*/ 4 &UIC1 2 4>; 102 interrupt-map-mask = <ffffffff>; 103 }; 104 105 POB0: opb { 106 compatible = "ibm,opb-405ex", "ibm,opb"; 107 #address-cells = <1>; 108 #size-cells = <1>; 109 ranges = <80000000 80000000 10000000 110 ef600000 ef600000 a00000 111 f0000000 f0000000 10000000>; 112 dcr-reg = <0a0 5>; 113 clock-frequency = <0>; /* Filled in by U-Boot */ 114 115 EBC0: ebc { 116 compatible = "ibm,ebc-405ex", "ibm,ebc"; 117 dcr-reg = <012 2>; 118 #address-cells = <2>; 119 #size-cells = <1>; 120 clock-frequency = <0>; /* Filled in by U-Boot */ 121 /* ranges property is supplied by U-Boot */ 122 interrupts = <5 1>; 123 interrupt-parent = <&UIC1>; 124 125 nor_flash@0,0 { 126 compatible = "amd,s29gl512n", "cfi-flash"; 127 bank-width = <2>; 128 reg = <0 000000 4000000>; 129 #address-cells = <1>; 130 #size-cells = <1>; 131 partition@0 { 132 label = "kernel"; 133 reg = <0 200000>; 134 }; 135 partition@200000 { 136 label = "root"; 137 reg = <200000 200000>; 138 }; 139 partition@400000 { 140 label = "user"; 141 reg = <400000 3b60000>; 142 }; 143 partition@3f60000 { 144 label = "env"; 145 reg = <3f60000 40000>; 146 }; 147 partition@3fa0000 { 148 label = "u-boot"; 149 reg = <3fa0000 60000>; 150 }; 151 }; 152 }; 153 154 UART0: serial@ef600200 { 155 device_type = "serial"; 156 compatible = "ns16550"; 157 reg = <ef600200 8>; 158 virtual-reg = <ef600200>; 159 clock-frequency = <0>; /* Filled in by U-Boot */ 160 current-speed = <0>; 161 interrupt-parent = <&UIC0>; 162 interrupts = <1a 4>; 163 }; 164 165 UART1: serial@ef600300 { 166 device_type = "serial"; 167 compatible = "ns16550"; 168 reg = <ef600300 8>; 169 virtual-reg = <ef600300>; 170 clock-frequency = <0>; /* Filled in by U-Boot */ 171 current-speed = <0>; 172 interrupt-parent = <&UIC0>; 173 interrupts = <1 4>; 174 }; 175 176 IIC0: i2c@ef600400 { 177 device_type = "i2c"; 178 compatible = "ibm,iic-405ex", "ibm,iic"; 179 reg = <ef600400 14>; 180 interrupt-parent = <&UIC0>; 181 interrupts = <2 4>; 182 }; 183 184 IIC1: i2c@ef600500 { 185 device_type = "i2c"; 186 compatible = "ibm,iic-405ex", "ibm,iic"; 187 reg = <ef600500 14>; 188 interrupt-parent = <&UIC0>; 189 interrupts = <7 4>; 190 }; 191 192 193 RGMII0: emac-rgmii@ef600b00 { 194 device_type = "rgmii-interface"; 195 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 196 reg = <ef600b00 104>; 197 has-mdio; 198 }; 199 200 EMAC0: ethernet@ef600900 { 201 linux,network-index = <0>; 202 device_type = "network"; 203 compatible = "ibm,emac-405ex", "ibm,emac4"; 204 interrupt-parent = <&EMAC0>; 205 interrupts = <0 1>; 206 #interrupt-cells = <1>; 207 #address-cells = <0>; 208 #size-cells = <0>; 209 interrupt-map = </*Status*/ 0 &UIC0 18 4 210 /*Wake*/ 1 &UIC1 1d 4>; 211 reg = <ef600900 70>; 212 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 213 mal-device = <&MAL0>; 214 mal-tx-channel = <0>; 215 mal-rx-channel = <0>; 216 cell-index = <0>; 217 max-frame-size = <5dc>; 218 rx-fifo-size = <1000>; 219 tx-fifo-size = <800>; 220 phy-mode = "rgmii"; 221 phy-map = <00000000>; 222 rgmii-device = <&RGMII0>; 223 rgmii-channel = <0>; 224 has-inverted-stacr-oc; 225 has-new-stacr-staopc; 226 }; 227 228 EMAC1: ethernet@ef600a00 { 229 linux,network-index = <1>; 230 device_type = "network"; 231 compatible = "ibm,emac-405ex", "ibm,emac4"; 232 interrupt-parent = <&EMAC1>; 233 interrupts = <0 1>; 234 #interrupt-cells = <1>; 235 #address-cells = <0>; 236 #size-cells = <0>; 237 interrupt-map = </*Status*/ 0 &UIC0 19 4 238 /*Wake*/ 1 &UIC1 1f 4>; 239 reg = <ef600a00 70>; 240 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 241 mal-device = <&MAL0>; 242 mal-tx-channel = <1>; 243 mal-rx-channel = <1>; 244 cell-index = <1>; 245 max-frame-size = <5dc>; 246 rx-fifo-size = <1000>; 247 tx-fifo-size = <800>; 248 phy-mode = "rgmii"; 249 phy-map = <00000000>; 250 rgmii-device = <&RGMII0>; 251 rgmii-channel = <1>; 252 has-inverted-stacr-oc; 253 has-new-stacr-staopc; 254 }; 255 }; 256 }; 257}; 258