1/* 2 * Device Tree Source for AMCC Kilauea (405EX) 3 * 4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without 8 * any warranty of any kind, whether express or implied. 9 */ 10 11/dts-v1/; 12 13/ { 14 #address-cells = <1>; 15 #size-cells = <1>; 16 model = "amcc,kilauea"; 17 compatible = "amcc,kilauea"; 18 dcr-parent = <&{/cpus/cpu@0}>; 19 20 aliases { 21 ethernet0 = &EMAC0; 22 ethernet1 = &EMAC1; 23 serial0 = &UART0; 24 serial1 = &UART1; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 cpu@0 { 32 device_type = "cpu"; 33 model = "PowerPC,405EX"; 34 reg = <0x00000000>; 35 clock-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 i-cache-line-size = <32>; 38 d-cache-line-size = <32>; 39 i-cache-size = <16384>; /* 16 kB */ 40 d-cache-size = <16384>; /* 16 kB */ 41 dcr-controller; 42 dcr-access-method = "native"; 43 }; 44 }; 45 46 memory { 47 device_type = "memory"; 48 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ 49 }; 50 51 UIC0: interrupt-controller { 52 compatible = "ibm,uic-405ex", "ibm,uic"; 53 interrupt-controller; 54 cell-index = <0>; 55 dcr-reg = <0x0c0 0x009>; 56 #address-cells = <0>; 57 #size-cells = <0>; 58 #interrupt-cells = <2>; 59 }; 60 61 UIC1: interrupt-controller1 { 62 compatible = "ibm,uic-405ex","ibm,uic"; 63 interrupt-controller; 64 cell-index = <1>; 65 dcr-reg = <0x0d0 0x009>; 66 #address-cells = <0>; 67 #size-cells = <0>; 68 #interrupt-cells = <2>; 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 70 interrupt-parent = <&UIC0>; 71 }; 72 73 UIC2: interrupt-controller2 { 74 compatible = "ibm,uic-405ex","ibm,uic"; 75 interrupt-controller; 76 cell-index = <2>; 77 dcr-reg = <0x0e0 0x009>; 78 #address-cells = <0>; 79 #size-cells = <0>; 80 #interrupt-cells = <2>; 81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ 82 interrupt-parent = <&UIC0>; 83 }; 84 85 plb { 86 compatible = "ibm,plb-405ex", "ibm,plb4"; 87 #address-cells = <1>; 88 #size-cells = <1>; 89 ranges; 90 clock-frequency = <0>; /* Filled in by U-Boot */ 91 92 SDRAM0: memory-controller { 93 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; 94 dcr-reg = <0x010 0x002>; 95 interrupt-parent = <&UIC2>; 96 interrupts = <0x5 0x4 /* ECC DED Error */ 97 0x6 0x4>; /* ECC SEC Error */ 98 }; 99 100 CRYPTO: crypto@ef700000 { 101 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; 102 reg = <0xef700000 0x80400>; 103 interrupt-parent = <&UIC0>; 104 interrupts = <0x17 0x2>; 105 }; 106 107 MAL0: mcmal { 108 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 109 dcr-reg = <0x180 0x062>; 110 num-tx-chans = <2>; 111 num-rx-chans = <2>; 112 interrupt-parent = <&MAL0>; 113 interrupts = <0x0 0x1 0x2 0x3 0x4>; 114 #interrupt-cells = <1>; 115 #address-cells = <0>; 116 #size-cells = <0>; 117 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 118 /*RXEOB*/ 0x1 &UIC0 0xb 0x4 119 /*SERR*/ 0x2 &UIC1 0x0 0x4 120 /*TXDE*/ 0x3 &UIC1 0x1 0x4 121 /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 122 interrupt-map-mask = <0xffffffff>; 123 }; 124 125 POB0: opb { 126 compatible = "ibm,opb-405ex", "ibm,opb"; 127 #address-cells = <1>; 128 #size-cells = <1>; 129 ranges = <0x80000000 0x80000000 0x10000000 130 0xef600000 0xef600000 0x00a00000 131 0xf0000000 0xf0000000 0x10000000>; 132 dcr-reg = <0x0a0 0x005>; 133 clock-frequency = <0>; /* Filled in by U-Boot */ 134 135 EBC0: ebc { 136 compatible = "ibm,ebc-405ex", "ibm,ebc"; 137 dcr-reg = <0x012 0x002>; 138 #address-cells = <2>; 139 #size-cells = <1>; 140 clock-frequency = <0>; /* Filled in by U-Boot */ 141 /* ranges property is supplied by U-Boot */ 142 interrupts = <0x5 0x1>; 143 interrupt-parent = <&UIC1>; 144 145 nor_flash@0,0 { 146 compatible = "amd,s29gl512n", "cfi-flash"; 147 bank-width = <2>; 148 reg = <0x00000000 0x00000000 0x04000000>; 149 #address-cells = <1>; 150 #size-cells = <1>; 151 partition@0 { 152 label = "kernel"; 153 reg = <0x00000000 0x00200000>; 154 }; 155 partition@200000 { 156 label = "root"; 157 reg = <0x00200000 0x00200000>; 158 }; 159 partition@400000 { 160 label = "user"; 161 reg = <0x00400000 0x03b60000>; 162 }; 163 partition@3f60000 { 164 label = "env"; 165 reg = <0x03f60000 0x00040000>; 166 }; 167 partition@3fa0000 { 168 label = "u-boot"; 169 reg = <0x03fa0000 0x00060000>; 170 }; 171 }; 172 }; 173 174 UART0: serial@ef600200 { 175 device_type = "serial"; 176 compatible = "ns16550"; 177 reg = <0xef600200 0x00000008>; 178 virtual-reg = <0xef600200>; 179 clock-frequency = <0>; /* Filled in by U-Boot */ 180 current-speed = <0>; 181 interrupt-parent = <&UIC0>; 182 interrupts = <0x1a 0x4>; 183 }; 184 185 UART1: serial@ef600300 { 186 device_type = "serial"; 187 compatible = "ns16550"; 188 reg = <0xef600300 0x00000008>; 189 virtual-reg = <0xef600300>; 190 clock-frequency = <0>; /* Filled in by U-Boot */ 191 current-speed = <0>; 192 interrupt-parent = <&UIC0>; 193 interrupts = <0x1 0x4>; 194 }; 195 196 IIC0: i2c@ef600400 { 197 compatible = "ibm,iic-405ex", "ibm,iic"; 198 reg = <0xef600400 0x00000014>; 199 interrupt-parent = <&UIC0>; 200 interrupts = <0x2 0x4>; 201 }; 202 203 IIC1: i2c@ef600500 { 204 compatible = "ibm,iic-405ex", "ibm,iic"; 205 reg = <0xef600500 0x00000014>; 206 interrupt-parent = <&UIC0>; 207 interrupts = <0x7 0x4>; 208 }; 209 210 211 RGMII0: emac-rgmii@ef600b00 { 212 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 213 reg = <0xef600b00 0x00000104>; 214 has-mdio; 215 }; 216 217 EMAC0: ethernet@ef600900 { 218 linux,network-index = <0x0>; 219 device_type = "network"; 220 compatible = "ibm,emac-405ex", "ibm,emac4sync"; 221 interrupt-parent = <&EMAC0>; 222 interrupts = <0x0 0x1>; 223 #interrupt-cells = <1>; 224 #address-cells = <0>; 225 #size-cells = <0>; 226 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 227 /*Wake*/ 0x1 &UIC1 0x1d 0x4>; 228 reg = <0xef600900 0x000000c4>; 229 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 230 mal-device = <&MAL0>; 231 mal-tx-channel = <0>; 232 mal-rx-channel = <0>; 233 cell-index = <0>; 234 max-frame-size = <9000>; 235 rx-fifo-size = <4096>; 236 tx-fifo-size = <2048>; 237 phy-mode = "rgmii"; 238 phy-map = <0x00000000>; 239 rgmii-device = <&RGMII0>; 240 rgmii-channel = <0>; 241 has-inverted-stacr-oc; 242 has-new-stacr-staopc; 243 }; 244 245 EMAC1: ethernet@ef600a00 { 246 linux,network-index = <0x1>; 247 device_type = "network"; 248 compatible = "ibm,emac-405ex", "ibm,emac4sync"; 249 interrupt-parent = <&EMAC1>; 250 interrupts = <0x0 0x1>; 251 #interrupt-cells = <1>; 252 #address-cells = <0>; 253 #size-cells = <0>; 254 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 255 /*Wake*/ 0x1 &UIC1 0x1f 0x4>; 256 reg = <0xef600a00 0x000000c4>; 257 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 258 mal-device = <&MAL0>; 259 mal-tx-channel = <1>; 260 mal-rx-channel = <1>; 261 cell-index = <1>; 262 max-frame-size = <9000>; 263 rx-fifo-size = <4096>; 264 tx-fifo-size = <2048>; 265 phy-mode = "rgmii"; 266 phy-map = <0x00000000>; 267 rgmii-device = <&RGMII0>; 268 rgmii-channel = <1>; 269 has-inverted-stacr-oc; 270 has-new-stacr-staopc; 271 }; 272 }; 273 274 PCIE0: pciex@0a0000000 { 275 device_type = "pci"; 276 #interrupt-cells = <1>; 277 #size-cells = <2>; 278 #address-cells = <3>; 279 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 280 primary; 281 port = <0x0>; /* port number */ 282 reg = <0xa0000000 0x20000000 /* Config space access */ 283 0xef000000 0x00001000>; /* Registers */ 284 dcr-reg = <0x040 0x020>; 285 sdr-base = <0x400>; 286 287 /* Outbound ranges, one memory and one IO, 288 * later cannot be changed 289 */ 290 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 291 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; 292 293 /* Inbound 2GB range starting at 0 */ 294 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; 295 296 /* This drives busses 0x00 to 0x3f */ 297 bus-range = <0x0 0x3f>; 298 299 /* Legacy interrupts (note the weird polarity, the bridge seems 300 * to invert PCIe legacy interrupts). 301 * We are de-swizzling here because the numbers are actually for 302 * port of the root complex virtual P2P bridge. But I want 303 * to avoid putting a node for it in the tree, so the numbers 304 * below are basically de-swizzled numbers. 305 * The real slot is on idsel 0, so the swizzling is 1:1 306 */ 307 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 308 interrupt-map = < 309 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ 310 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ 311 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ 312 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; 313 }; 314 315 PCIE1: pciex@0c0000000 { 316 device_type = "pci"; 317 #interrupt-cells = <1>; 318 #size-cells = <2>; 319 #address-cells = <3>; 320 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 321 primary; 322 port = <0x1>; /* port number */ 323 reg = <0xc0000000 0x20000000 /* Config space access */ 324 0xef001000 0x00001000>; /* Registers */ 325 dcr-reg = <0x060 0x020>; 326 sdr-base = <0x440>; 327 328 /* Outbound ranges, one memory and one IO, 329 * later cannot be changed 330 */ 331 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 332 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; 333 334 /* Inbound 2GB range starting at 0 */ 335 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; 336 337 /* This drives busses 0x40 to 0x7f */ 338 bus-range = <0x40 0x7f>; 339 340 /* Legacy interrupts (note the weird polarity, the bridge seems 341 * to invert PCIe legacy interrupts). 342 * We are de-swizzling here because the numbers are actually for 343 * port of the root complex virtual P2P bridge. But I want 344 * to avoid putting a node for it in the tree, so the numbers 345 * below are basically de-swizzled numbers. 346 * The real slot is on idsel 0, so the swizzling is 1:1 347 */ 348 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 349 interrupt-map = < 350 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ 351 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ 352 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ 353 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; 354 }; 355 }; 356}; 357