11d8de8fcSShengzhou Liu/* 21d8de8fcSShengzhou Liu * T2081 Silicon/SoC Device Tree Source (post include) 31d8de8fcSShengzhou Liu * 41d8de8fcSShengzhou Liu * Copyright 2013 Freescale Semiconductor Inc. 51d8de8fcSShengzhou Liu * 61d8de8fcSShengzhou Liu * Redistribution and use in source and binary forms, with or without 71d8de8fcSShengzhou Liu * modification, are permitted provided that the following conditions are met: 81d8de8fcSShengzhou Liu * * Redistributions of source code must retain the above copyright 91d8de8fcSShengzhou Liu * notice, this list of conditions and the following disclaimer. 101d8de8fcSShengzhou Liu * * Redistributions in binary form must reproduce the above copyright 111d8de8fcSShengzhou Liu * notice, this list of conditions and the following disclaimer in the 121d8de8fcSShengzhou Liu * documentation and/or other materials provided with the distribution. 131d8de8fcSShengzhou Liu * * Neither the name of Freescale Semiconductor nor the 141d8de8fcSShengzhou Liu * names of its contributors may be used to endorse or promote products 151d8de8fcSShengzhou Liu * derived from this software without specific prior written permission. 161d8de8fcSShengzhou Liu * 171d8de8fcSShengzhou Liu * 181d8de8fcSShengzhou Liu * ALTERNATIVELY, this software may be distributed under the terms of the 191d8de8fcSShengzhou Liu * GNU General Public License ("GPL") as published by the Free Software 201d8de8fcSShengzhou Liu * Foundation, either version 2 of that License or (at your option) any 211d8de8fcSShengzhou Liu * later version. 221d8de8fcSShengzhou Liu * 231d8de8fcSShengzhou Liu * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY 241d8de8fcSShengzhou Liu * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 251d8de8fcSShengzhou Liu * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 261d8de8fcSShengzhou Liu * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 271d8de8fcSShengzhou Liu * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 281d8de8fcSShengzhou Liu * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 291d8de8fcSShengzhou Liu * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 301d8de8fcSShengzhou Liu * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 311d8de8fcSShengzhou Liu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 321d8de8fcSShengzhou Liu * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 331d8de8fcSShengzhou Liu */ 341d8de8fcSShengzhou Liu 351d8de8fcSShengzhou Liu&ifc { 361d8de8fcSShengzhou Liu #address-cells = <2>; 371d8de8fcSShengzhou Liu #size-cells = <1>; 381d8de8fcSShengzhou Liu compatible = "fsl,ifc", "simple-bus"; 391d8de8fcSShengzhou Liu interrupts = <25 2 0 0>; 401d8de8fcSShengzhou Liu}; 411d8de8fcSShengzhou Liu 421d8de8fcSShengzhou Liu/* controller at 0x240000 */ 431d8de8fcSShengzhou Liu&pci0 { 441d8de8fcSShengzhou Liu compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; 451d8de8fcSShengzhou Liu device_type = "pci"; 461d8de8fcSShengzhou Liu #size-cells = <2>; 471d8de8fcSShengzhou Liu #address-cells = <3>; 481d8de8fcSShengzhou Liu bus-range = <0x0 0xff>; 491d8de8fcSShengzhou Liu interrupts = <20 2 0 0>; 501d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu0>; 511d8de8fcSShengzhou Liu pcie@0 { 521d8de8fcSShengzhou Liu reg = <0 0 0 0 0>; 531d8de8fcSShengzhou Liu #interrupt-cells = <1>; 541d8de8fcSShengzhou Liu #size-cells = <2>; 551d8de8fcSShengzhou Liu #address-cells = <3>; 561d8de8fcSShengzhou Liu device_type = "pci"; 571d8de8fcSShengzhou Liu interrupts = <20 2 0 0>; 581d8de8fcSShengzhou Liu interrupt-map-mask = <0xf800 0 0 7>; 591d8de8fcSShengzhou Liu interrupt-map = < 601d8de8fcSShengzhou Liu /* IDSEL 0x0 */ 611d8de8fcSShengzhou Liu 0000 0 0 1 &mpic 40 1 0 0 621d8de8fcSShengzhou Liu 0000 0 0 2 &mpic 1 1 0 0 631d8de8fcSShengzhou Liu 0000 0 0 3 &mpic 2 1 0 0 641d8de8fcSShengzhou Liu 0000 0 0 4 &mpic 3 1 0 0 651d8de8fcSShengzhou Liu >; 661d8de8fcSShengzhou Liu }; 671d8de8fcSShengzhou Liu}; 681d8de8fcSShengzhou Liu 691d8de8fcSShengzhou Liu/* controller at 0x250000 */ 701d8de8fcSShengzhou Liu&pci1 { 711d8de8fcSShengzhou Liu compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; 721d8de8fcSShengzhou Liu device_type = "pci"; 731d8de8fcSShengzhou Liu #size-cells = <2>; 741d8de8fcSShengzhou Liu #address-cells = <3>; 751d8de8fcSShengzhou Liu bus-range = <0 0xff>; 761d8de8fcSShengzhou Liu interrupts = <21 2 0 0>; 771d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu0>; 781d8de8fcSShengzhou Liu pcie@0 { 791d8de8fcSShengzhou Liu reg = <0 0 0 0 0>; 801d8de8fcSShengzhou Liu #interrupt-cells = <1>; 811d8de8fcSShengzhou Liu #size-cells = <2>; 821d8de8fcSShengzhou Liu #address-cells = <3>; 831d8de8fcSShengzhou Liu device_type = "pci"; 841d8de8fcSShengzhou Liu interrupts = <21 2 0 0>; 851d8de8fcSShengzhou Liu interrupt-map-mask = <0xf800 0 0 7>; 861d8de8fcSShengzhou Liu interrupt-map = < 871d8de8fcSShengzhou Liu /* IDSEL 0x0 */ 881d8de8fcSShengzhou Liu 0000 0 0 1 &mpic 41 1 0 0 891d8de8fcSShengzhou Liu 0000 0 0 2 &mpic 5 1 0 0 901d8de8fcSShengzhou Liu 0000 0 0 3 &mpic 6 1 0 0 911d8de8fcSShengzhou Liu 0000 0 0 4 &mpic 7 1 0 0 921d8de8fcSShengzhou Liu >; 931d8de8fcSShengzhou Liu }; 941d8de8fcSShengzhou Liu}; 951d8de8fcSShengzhou Liu 961d8de8fcSShengzhou Liu/* controller at 0x260000 */ 971d8de8fcSShengzhou Liu&pci2 { 981d8de8fcSShengzhou Liu compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; 991d8de8fcSShengzhou Liu device_type = "pci"; 1001d8de8fcSShengzhou Liu #size-cells = <2>; 1011d8de8fcSShengzhou Liu #address-cells = <3>; 1021d8de8fcSShengzhou Liu bus-range = <0x0 0xff>; 1031d8de8fcSShengzhou Liu interrupts = <22 2 0 0>; 1041d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu0>; 1051d8de8fcSShengzhou Liu pcie@0 { 1061d8de8fcSShengzhou Liu reg = <0 0 0 0 0>; 1071d8de8fcSShengzhou Liu #interrupt-cells = <1>; 1081d8de8fcSShengzhou Liu #size-cells = <2>; 1091d8de8fcSShengzhou Liu #address-cells = <3>; 1101d8de8fcSShengzhou Liu device_type = "pci"; 1111d8de8fcSShengzhou Liu interrupts = <22 2 0 0>; 1121d8de8fcSShengzhou Liu interrupt-map-mask = <0xf800 0 0 7>; 1131d8de8fcSShengzhou Liu interrupt-map = < 1141d8de8fcSShengzhou Liu /* IDSEL 0x0 */ 1151d8de8fcSShengzhou Liu 0000 0 0 1 &mpic 42 1 0 0 1161d8de8fcSShengzhou Liu 0000 0 0 2 &mpic 9 1 0 0 1171d8de8fcSShengzhou Liu 0000 0 0 3 &mpic 10 1 0 0 1181d8de8fcSShengzhou Liu 0000 0 0 4 &mpic 11 1 0 0 1191d8de8fcSShengzhou Liu >; 1201d8de8fcSShengzhou Liu }; 1211d8de8fcSShengzhou Liu}; 1221d8de8fcSShengzhou Liu 1231d8de8fcSShengzhou Liu/* controller at 0x270000 */ 1241d8de8fcSShengzhou Liu&pci3 { 1251d8de8fcSShengzhou Liu compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; 1261d8de8fcSShengzhou Liu device_type = "pci"; 1271d8de8fcSShengzhou Liu #size-cells = <2>; 1281d8de8fcSShengzhou Liu #address-cells = <3>; 1291d8de8fcSShengzhou Liu bus-range = <0x0 0xff>; 1301d8de8fcSShengzhou Liu interrupts = <23 2 0 0>; 1311d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu0>; 1321d8de8fcSShengzhou Liu pcie@0 { 1331d8de8fcSShengzhou Liu reg = <0 0 0 0 0>; 1341d8de8fcSShengzhou Liu #interrupt-cells = <1>; 1351d8de8fcSShengzhou Liu #size-cells = <2>; 1361d8de8fcSShengzhou Liu #address-cells = <3>; 1371d8de8fcSShengzhou Liu device_type = "pci"; 1381d8de8fcSShengzhou Liu interrupts = <23 2 0 0>; 1391d8de8fcSShengzhou Liu interrupt-map-mask = <0xf800 0 0 7>; 1401d8de8fcSShengzhou Liu interrupt-map = < 1411d8de8fcSShengzhou Liu /* IDSEL 0x0 */ 1421d8de8fcSShengzhou Liu 0000 0 0 1 &mpic 43 1 0 0 1431d8de8fcSShengzhou Liu 0000 0 0 2 &mpic 0 1 0 0 1441d8de8fcSShengzhou Liu 0000 0 0 3 &mpic 4 1 0 0 1451d8de8fcSShengzhou Liu 0000 0 0 4 &mpic 8 1 0 0 1461d8de8fcSShengzhou Liu >; 1471d8de8fcSShengzhou Liu }; 1481d8de8fcSShengzhou Liu}; 1491d8de8fcSShengzhou Liu 1501d8de8fcSShengzhou Liu&dcsr { 1511d8de8fcSShengzhou Liu #address-cells = <1>; 1521d8de8fcSShengzhou Liu #size-cells = <1>; 1531d8de8fcSShengzhou Liu compatible = "fsl,dcsr", "simple-bus"; 1541d8de8fcSShengzhou Liu 1551d8de8fcSShengzhou Liu dcsr-epu@0 { 1561d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-epu", "fsl,dcsr-epu"; 1571d8de8fcSShengzhou Liu interrupts = <52 2 0 0 1581d8de8fcSShengzhou Liu 84 2 0 0 1591d8de8fcSShengzhou Liu 85 2 0 0 1601d8de8fcSShengzhou Liu 94 2 0 0 1611d8de8fcSShengzhou Liu 95 2 0 0>; 1621d8de8fcSShengzhou Liu reg = <0x0 0x1000>; 1631d8de8fcSShengzhou Liu }; 1641d8de8fcSShengzhou Liu dcsr-npc { 1651d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-cnpc", "fsl,dcsr-cnpc"; 1661d8de8fcSShengzhou Liu reg = <0x1000 0x1000 0x1002000 0x10000>; 1671d8de8fcSShengzhou Liu }; 1681d8de8fcSShengzhou Liu dcsr-nxc@2000 { 1691d8de8fcSShengzhou Liu compatible = "fsl,dcsr-nxc"; 1701d8de8fcSShengzhou Liu reg = <0x2000 0x1000>; 1711d8de8fcSShengzhou Liu }; 1721d8de8fcSShengzhou Liu dcsr-corenet { 1731d8de8fcSShengzhou Liu compatible = "fsl,dcsr-corenet"; 1741d8de8fcSShengzhou Liu reg = <0x8000 0x1000 0x1A000 0x1000>; 1751d8de8fcSShengzhou Liu }; 1761d8de8fcSShengzhou Liu dcsr-ocn@11000 { 1771d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-ocn", "fsl,dcsr-ocn"; 1781d8de8fcSShengzhou Liu reg = <0x11000 0x1000>; 1791d8de8fcSShengzhou Liu }; 1801d8de8fcSShengzhou Liu dcsr-ddr@12000 { 1811d8de8fcSShengzhou Liu compatible = "fsl,dcsr-ddr"; 1821d8de8fcSShengzhou Liu dev-handle = <&ddr1>; 1831d8de8fcSShengzhou Liu reg = <0x12000 0x1000>; 1841d8de8fcSShengzhou Liu }; 1851d8de8fcSShengzhou Liu dcsr-nal@18000 { 1861d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-nal", "fsl,dcsr-nal"; 1871d8de8fcSShengzhou Liu reg = <0x18000 0x1000>; 1881d8de8fcSShengzhou Liu }; 1891d8de8fcSShengzhou Liu dcsr-rcpm@22000 { 1901d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-rcpm", "fsl,dcsr-rcpm"; 1911d8de8fcSShengzhou Liu reg = <0x22000 0x1000>; 1921d8de8fcSShengzhou Liu }; 1931d8de8fcSShengzhou Liu dcsr-snpc@30000 { 1941d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc"; 1951d8de8fcSShengzhou Liu reg = <0x30000 0x1000 0x1022000 0x10000>; 1961d8de8fcSShengzhou Liu }; 1971d8de8fcSShengzhou Liu dcsr-snpc@31000 { 1981d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc"; 1991d8de8fcSShengzhou Liu reg = <0x31000 0x1000 0x1042000 0x10000>; 2001d8de8fcSShengzhou Liu }; 2011d8de8fcSShengzhou Liu dcsr-snpc@32000 { 2021d8de8fcSShengzhou Liu compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc"; 2031d8de8fcSShengzhou Liu reg = <0x32000 0x1000 0x1062000 0x10000>; 2041d8de8fcSShengzhou Liu }; 2051d8de8fcSShengzhou Liu dcsr-cpu-sb-proxy@100000 { 2061d8de8fcSShengzhou Liu compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 2071d8de8fcSShengzhou Liu cpu-handle = <&cpu0>; 2081d8de8fcSShengzhou Liu reg = <0x100000 0x1000 0x101000 0x1000>; 2091d8de8fcSShengzhou Liu }; 2101d8de8fcSShengzhou Liu dcsr-cpu-sb-proxy@108000 { 2111d8de8fcSShengzhou Liu compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 2121d8de8fcSShengzhou Liu cpu-handle = <&cpu1>; 2131d8de8fcSShengzhou Liu reg = <0x108000 0x1000 0x109000 0x1000>; 2141d8de8fcSShengzhou Liu }; 2151d8de8fcSShengzhou Liu dcsr-cpu-sb-proxy@110000 { 2161d8de8fcSShengzhou Liu compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 2171d8de8fcSShengzhou Liu cpu-handle = <&cpu2>; 2181d8de8fcSShengzhou Liu reg = <0x110000 0x1000 0x111000 0x1000>; 2191d8de8fcSShengzhou Liu }; 2201d8de8fcSShengzhou Liu dcsr-cpu-sb-proxy@118000 { 2211d8de8fcSShengzhou Liu compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 2221d8de8fcSShengzhou Liu cpu-handle = <&cpu3>; 2231d8de8fcSShengzhou Liu reg = <0x118000 0x1000 0x119000 0x1000>; 2241d8de8fcSShengzhou Liu }; 2251d8de8fcSShengzhou Liu}; 2261d8de8fcSShengzhou Liu 2271d8de8fcSShengzhou Liu&soc { 2281d8de8fcSShengzhou Liu #address-cells = <1>; 2291d8de8fcSShengzhou Liu #size-cells = <1>; 2301d8de8fcSShengzhou Liu device_type = "soc"; 2311d8de8fcSShengzhou Liu compatible = "simple-bus"; 2321d8de8fcSShengzhou Liu 2331d8de8fcSShengzhou Liu soc-sram-error { 2341d8de8fcSShengzhou Liu compatible = "fsl,soc-sram-error"; 2351d8de8fcSShengzhou Liu interrupts = <16 2 1 29>; 2361d8de8fcSShengzhou Liu }; 2371d8de8fcSShengzhou Liu 2381d8de8fcSShengzhou Liu corenet-law@0 { 2391d8de8fcSShengzhou Liu compatible = "fsl,corenet-law"; 2401d8de8fcSShengzhou Liu reg = <0x0 0x1000>; 2411d8de8fcSShengzhou Liu fsl,num-laws = <32>; 2421d8de8fcSShengzhou Liu }; 2431d8de8fcSShengzhou Liu 2441d8de8fcSShengzhou Liu ddr1: memory-controller@8000 { 2451d8de8fcSShengzhou Liu compatible = "fsl,qoriq-memory-controller-v4.7", 2461d8de8fcSShengzhou Liu "fsl,qoriq-memory-controller"; 2471d8de8fcSShengzhou Liu reg = <0x8000 0x1000>; 2481d8de8fcSShengzhou Liu interrupts = <16 2 1 23>; 2491d8de8fcSShengzhou Liu }; 2501d8de8fcSShengzhou Liu 2511d8de8fcSShengzhou Liu cpc: l3-cache-controller@10000 { 2521d8de8fcSShengzhou Liu compatible = "fsl,t2080-l3-cache-controller", "cache"; 2531d8de8fcSShengzhou Liu reg = <0x10000 0x1000 2541d8de8fcSShengzhou Liu 0x11000 0x1000 2551d8de8fcSShengzhou Liu 0x12000 0x1000>; 2561d8de8fcSShengzhou Liu interrupts = <16 2 1 27 2571d8de8fcSShengzhou Liu 16 2 1 26 2581d8de8fcSShengzhou Liu 16 2 1 25>; 2591d8de8fcSShengzhou Liu }; 2601d8de8fcSShengzhou Liu 2611d8de8fcSShengzhou Liu corenet-cf@18000 { 2621d8de8fcSShengzhou Liu compatible = "fsl,corenet2-cf", "fsl,corenet-cf"; 2631d8de8fcSShengzhou Liu reg = <0x18000 0x1000>; 2641d8de8fcSShengzhou Liu interrupts = <16 2 1 31>; 2651d8de8fcSShengzhou Liu fsl,ccf-num-csdids = <32>; 2661d8de8fcSShengzhou Liu fsl,ccf-num-snoopids = <32>; 2671d8de8fcSShengzhou Liu }; 2681d8de8fcSShengzhou Liu 2691d8de8fcSShengzhou Liu iommu@20000 { 2701d8de8fcSShengzhou Liu compatible = "fsl,pamu-v1.0", "fsl,pamu"; 2711d8de8fcSShengzhou Liu reg = <0x20000 0x3000>; 2721d8de8fcSShengzhou Liu fsl,portid-mapping = <0x8000>; 2731d8de8fcSShengzhou Liu ranges = <0 0x20000 0x3000>; 2741d8de8fcSShengzhou Liu #address-cells = <1>; 2751d8de8fcSShengzhou Liu #size-cells = <1>; 2761d8de8fcSShengzhou Liu interrupts = < 2771d8de8fcSShengzhou Liu 24 2 0 0 2781d8de8fcSShengzhou Liu 16 2 1 30>; 2791d8de8fcSShengzhou Liu 2801d8de8fcSShengzhou Liu pamu0: pamu@0 { 2811d8de8fcSShengzhou Liu reg = <0 0x1000>; 2821d8de8fcSShengzhou Liu fsl,primary-cache-geometry = <32 1>; 2831d8de8fcSShengzhou Liu fsl,secondary-cache-geometry = <128 2>; 2841d8de8fcSShengzhou Liu }; 2851d8de8fcSShengzhou Liu 2861d8de8fcSShengzhou Liu pamu1: pamu@1000 { 2871d8de8fcSShengzhou Liu reg = <0x1000 0x1000>; 2881d8de8fcSShengzhou Liu fsl,primary-cache-geometry = <32 1>; 2891d8de8fcSShengzhou Liu fsl,secondary-cache-geometry = <128 2>; 2901d8de8fcSShengzhou Liu }; 2911d8de8fcSShengzhou Liu 2921d8de8fcSShengzhou Liu pamu2: pamu@2000 { 2931d8de8fcSShengzhou Liu reg = <0x2000 0x1000>; 2941d8de8fcSShengzhou Liu fsl,primary-cache-geometry = <32 1>; 2951d8de8fcSShengzhou Liu fsl,secondary-cache-geometry = <128 2>; 2961d8de8fcSShengzhou Liu }; 2971d8de8fcSShengzhou Liu }; 2981d8de8fcSShengzhou Liu 2991d8de8fcSShengzhou Liu/include/ "qoriq-mpic4.3.dtsi" 3001d8de8fcSShengzhou Liu 3011d8de8fcSShengzhou Liu guts: global-utilities@e0000 { 3021d8de8fcSShengzhou Liu compatible = "fsl,t2080-device-config", "fsl,qoriq-device-config-2.0"; 3031d8de8fcSShengzhou Liu reg = <0xe0000 0xe00>; 3041d8de8fcSShengzhou Liu fsl,has-rstcr; 3051d8de8fcSShengzhou Liu fsl,liodn-bits = <12>; 3061d8de8fcSShengzhou Liu }; 3071d8de8fcSShengzhou Liu 308eaffcb0fSEmil Medve/include/ "qoriq-clockgen2.dtsi" 309eaffcb0fSEmil Medve global-utilities@e1000 { 3101d8de8fcSShengzhou Liu compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0"; 3111d8de8fcSShengzhou Liu 3121d8de8fcSShengzhou Liu mux0: mux0@0 { 3131d8de8fcSShengzhou Liu #clock-cells = <0>; 3141d8de8fcSShengzhou Liu reg = <0x0 4>; 3151d8de8fcSShengzhou Liu compatible = "fsl,qoriq-core-mux-2.0"; 3161d8de8fcSShengzhou Liu clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 3171d8de8fcSShengzhou Liu <&pll1 0>, <&pll1 1>, <&pll1 2>; 3181d8de8fcSShengzhou Liu clock-names = "pll0", "pll0-div2", "pll1-div4", 3191d8de8fcSShengzhou Liu "pll1", "pll1-div2", "pll1-div4"; 3201d8de8fcSShengzhou Liu clock-output-names = "cmux0"; 3211d8de8fcSShengzhou Liu }; 3221d8de8fcSShengzhou Liu 3231d8de8fcSShengzhou Liu mux1: mux1@20 { 3241d8de8fcSShengzhou Liu #clock-cells = <0>; 3251d8de8fcSShengzhou Liu reg = <0x20 4>; 3261d8de8fcSShengzhou Liu compatible = "fsl,qoriq-core-mux-2.0"; 3271d8de8fcSShengzhou Liu clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 3281d8de8fcSShengzhou Liu <&pll1 0>, <&pll1 1>, <&pll1 2>; 3291d8de8fcSShengzhou Liu clock-names = "pll0", "pll0-div2", "pll1-div4", 3301d8de8fcSShengzhou Liu "pll1", "pll1-div2", "pll1-div4"; 3311d8de8fcSShengzhou Liu clock-output-names = "cmux1"; 3321d8de8fcSShengzhou Liu }; 3331d8de8fcSShengzhou Liu }; 3341d8de8fcSShengzhou Liu 3351d8de8fcSShengzhou Liu rcpm: global-utilities@e2000 { 3361d8de8fcSShengzhou Liu compatible = "fsl,t2080-rcpm", "fsl,qoriq-rcpm-2.0"; 3371d8de8fcSShengzhou Liu reg = <0xe2000 0x1000>; 3381d8de8fcSShengzhou Liu }; 3391d8de8fcSShengzhou Liu 3401d8de8fcSShengzhou Liu sfp: sfp@e8000 { 3411d8de8fcSShengzhou Liu compatible = "fsl,t2080-sfp"; 3421d8de8fcSShengzhou Liu reg = <0xe8000 0x1000>; 3431d8de8fcSShengzhou Liu }; 3441d8de8fcSShengzhou Liu 3451d8de8fcSShengzhou Liu serdes: serdes@ea000 { 3461d8de8fcSShengzhou Liu compatible = "fsl,t2080-serdes"; 3471d8de8fcSShengzhou Liu reg = <0xea000 0x4000>; 3481d8de8fcSShengzhou Liu }; 3491d8de8fcSShengzhou Liu 3501d8de8fcSShengzhou Liu/include/ "elo3-dma-0.dtsi" 3511d8de8fcSShengzhou Liu dma@100300 { 3521d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu0>; 3531d8de8fcSShengzhou Liu fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */ 3541d8de8fcSShengzhou Liu }; 3551d8de8fcSShengzhou Liu/include/ "elo3-dma-1.dtsi" 3561d8de8fcSShengzhou Liu dma@101300 { 3571d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu0>; 3581d8de8fcSShengzhou Liu fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */ 3591d8de8fcSShengzhou Liu }; 3601d8de8fcSShengzhou Liu/include/ "elo3-dma-2.dtsi" 3611d8de8fcSShengzhou Liu dma@102300 { 3621d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu0>; 3631d8de8fcSShengzhou Liu fsl,liodn-reg = <&guts 0x588>; /* DMA3LIODNR */ 3641d8de8fcSShengzhou Liu }; 3651d8de8fcSShengzhou Liu 3661d8de8fcSShengzhou Liu/include/ "qoriq-espi-0.dtsi" 3671d8de8fcSShengzhou Liu spi@110000 { 3681d8de8fcSShengzhou Liu fsl,espi-num-chipselects = <4>; 3691d8de8fcSShengzhou Liu }; 3701d8de8fcSShengzhou Liu 3711d8de8fcSShengzhou Liu/include/ "qoriq-esdhc-0.dtsi" 3721d8de8fcSShengzhou Liu sdhc@114000 { 3731d8de8fcSShengzhou Liu compatible = "fsl,t2080-esdhc", "fsl,esdhc"; 3741d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu1>; 3751d8de8fcSShengzhou Liu fsl,liodn-reg = <&guts 0x530>; /* SDMMCLIODNR */ 3761d8de8fcSShengzhou Liu sdhci,auto-cmd12; 3771d8de8fcSShengzhou Liu }; 3781d8de8fcSShengzhou Liu/include/ "qoriq-i2c-0.dtsi" 3791d8de8fcSShengzhou Liu/include/ "qoriq-i2c-1.dtsi" 3801d8de8fcSShengzhou Liu/include/ "qoriq-duart-0.dtsi" 3811d8de8fcSShengzhou Liu/include/ "qoriq-duart-1.dtsi" 3821d8de8fcSShengzhou Liu/include/ "qoriq-gpio-0.dtsi" 3831d8de8fcSShengzhou Liu/include/ "qoriq-gpio-1.dtsi" 3841d8de8fcSShengzhou Liu/include/ "qoriq-gpio-2.dtsi" 3851d8de8fcSShengzhou Liu/include/ "qoriq-gpio-3.dtsi" 3861d8de8fcSShengzhou Liu/include/ "qoriq-usb2-mph-0.dtsi" 3871d8de8fcSShengzhou Liu usb0: usb@210000 { 388c22b47f0SNikhil Badola compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph"; 3891d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu1>; 3901d8de8fcSShengzhou Liu fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 3911d8de8fcSShengzhou Liu phy_type = "utmi"; 3921d8de8fcSShengzhou Liu port0; 3931d8de8fcSShengzhou Liu }; 3941d8de8fcSShengzhou Liu/include/ "qoriq-usb2-dr-0.dtsi" 3951d8de8fcSShengzhou Liu usb1: usb@211000 { 396c22b47f0SNikhil Badola compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; 3971d8de8fcSShengzhou Liu fsl,iommu-parent = <&pamu1>; 3981d8de8fcSShengzhou Liu fsl,liodn-reg = <&guts 0x524>; /* USB1LIODNR */ 3991d8de8fcSShengzhou Liu dr_mode = "host"; 4001d8de8fcSShengzhou Liu phy_type = "utmi"; 4011d8de8fcSShengzhou Liu }; 4021d8de8fcSShengzhou Liu/include/ "qoriq-sec5.2-0.dtsi" 4031d8de8fcSShengzhou Liu 4041d8de8fcSShengzhou Liu L2_1: l2-cache-controller@c20000 { 4051d8de8fcSShengzhou Liu /* Cluster 0 L2 cache */ 4061d8de8fcSShengzhou Liu compatible = "fsl,t2080-l2-cache-controller"; 4071d8de8fcSShengzhou Liu reg = <0xc20000 0x40000>; 4081d8de8fcSShengzhou Liu next-level-cache = <&cpc>; 4091d8de8fcSShengzhou Liu }; 4101d8de8fcSShengzhou Liu}; 411