1/* 2 * T1040 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35#include <dt-bindings/thermal/thermal.h> 36 37&bman_fbpr { 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 40}; 41 42&qman_fqd { 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 45}; 46 47&qman_pfdr { 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 50}; 51 52&ifc { 53 #address-cells = <2>; 54 #size-cells = <1>; 55 compatible = "fsl,ifc", "simple-bus"; 56 interrupts = <25 2 0 0>; 57}; 58 59&pci0 { 60 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 61 device_type = "pci"; 62 #size-cells = <2>; 63 #address-cells = <3>; 64 bus-range = <0x0 0xff>; 65 interrupts = <20 2 0 0>; 66 fsl,iommu-parent = <&pamu0>; 67 pcie@0 { 68 reg = <0 0 0 0 0>; 69 #interrupt-cells = <1>; 70 #size-cells = <2>; 71 #address-cells = <3>; 72 device_type = "pci"; 73 interrupts = <20 2 0 0>; 74 interrupt-map-mask = <0xf800 0 0 7>; 75 interrupt-map = < 76 /* IDSEL 0x0 */ 77 0000 0 0 1 &mpic 40 1 0 0 78 0000 0 0 2 &mpic 1 1 0 0 79 0000 0 0 3 &mpic 2 1 0 0 80 0000 0 0 4 &mpic 3 1 0 0 81 >; 82 }; 83}; 84 85&pci1 { 86 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 87 device_type = "pci"; 88 #size-cells = <2>; 89 #address-cells = <3>; 90 bus-range = <0 0xff>; 91 interrupts = <21 2 0 0>; 92 fsl,iommu-parent = <&pamu0>; 93 pcie@0 { 94 reg = <0 0 0 0 0>; 95 #interrupt-cells = <1>; 96 #size-cells = <2>; 97 #address-cells = <3>; 98 device_type = "pci"; 99 interrupts = <21 2 0 0>; 100 interrupt-map-mask = <0xf800 0 0 7>; 101 interrupt-map = < 102 /* IDSEL 0x0 */ 103 0000 0 0 1 &mpic 41 1 0 0 104 0000 0 0 2 &mpic 5 1 0 0 105 0000 0 0 3 &mpic 6 1 0 0 106 0000 0 0 4 &mpic 7 1 0 0 107 >; 108 }; 109}; 110 111&pci2 { 112 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 113 device_type = "pci"; 114 #size-cells = <2>; 115 #address-cells = <3>; 116 bus-range = <0x0 0xff>; 117 interrupts = <22 2 0 0>; 118 fsl,iommu-parent = <&pamu0>; 119 pcie@0 { 120 reg = <0 0 0 0 0>; 121 #interrupt-cells = <1>; 122 #size-cells = <2>; 123 #address-cells = <3>; 124 device_type = "pci"; 125 interrupts = <22 2 0 0>; 126 interrupt-map-mask = <0xf800 0 0 7>; 127 interrupt-map = < 128 /* IDSEL 0x0 */ 129 0000 0 0 1 &mpic 42 1 0 0 130 0000 0 0 2 &mpic 9 1 0 0 131 0000 0 0 3 &mpic 10 1 0 0 132 0000 0 0 4 &mpic 11 1 0 0 133 >; 134 }; 135}; 136 137&pci3 { 138 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 139 device_type = "pci"; 140 #size-cells = <2>; 141 #address-cells = <3>; 142 bus-range = <0x0 0xff>; 143 interrupts = <23 2 0 0>; 144 fsl,iommu-parent = <&pamu0>; 145 pcie@0 { 146 reg = <0 0 0 0 0>; 147 #interrupt-cells = <1>; 148 #size-cells = <2>; 149 #address-cells = <3>; 150 device_type = "pci"; 151 interrupts = <23 2 0 0>; 152 interrupt-map-mask = <0xf800 0 0 7>; 153 interrupt-map = < 154 /* IDSEL 0x0 */ 155 0000 0 0 1 &mpic 43 1 0 0 156 0000 0 0 2 &mpic 0 1 0 0 157 0000 0 0 3 &mpic 4 1 0 0 158 0000 0 0 4 &mpic 8 1 0 0 159 >; 160 }; 161}; 162 163&dcsr { 164 #address-cells = <1>; 165 #size-cells = <1>; 166 compatible = "fsl,dcsr", "simple-bus"; 167 168 dcsr-epu@0 { 169 compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu"; 170 interrupts = <52 2 0 0 171 84 2 0 0 172 85 2 0 0>; 173 reg = <0x0 0x1000>; 174 }; 175 dcsr-npc { 176 compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc"; 177 reg = <0x1000 0x1000 0x1002000 0x10000>; 178 }; 179 dcsr-nxc@2000 { 180 compatible = "fsl,dcsr-nxc"; 181 reg = <0x2000 0x1000>; 182 }; 183 dcsr-corenet { 184 compatible = "fsl,dcsr-corenet"; 185 reg = <0x8000 0x1000 0x1A000 0x1000>; 186 }; 187 dcsr-dpaa@9000 { 188 compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa"; 189 reg = <0x9000 0x1000>; 190 }; 191 dcsr-ocn@11000 { 192 compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn"; 193 reg = <0x11000 0x1000>; 194 }; 195 dcsr-ddr@12000 { 196 compatible = "fsl,dcsr-ddr"; 197 dev-handle = <&ddr1>; 198 reg = <0x12000 0x1000>; 199 }; 200 dcsr-nal@18000 { 201 compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal"; 202 reg = <0x18000 0x1000>; 203 }; 204 dcsr-rcpm@22000 { 205 compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm"; 206 reg = <0x22000 0x1000>; 207 }; 208 dcsr-snpc@30000 { 209 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc"; 210 reg = <0x30000 0x1000 0x1022000 0x10000>; 211 }; 212 dcsr-snpc@31000 { 213 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc"; 214 reg = <0x31000 0x1000 0x1042000 0x10000>; 215 }; 216 dcsr-cpu-sb-proxy@100000 { 217 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 218 cpu-handle = <&cpu0>; 219 reg = <0x100000 0x1000 0x101000 0x1000>; 220 }; 221 dcsr-cpu-sb-proxy@108000 { 222 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 223 cpu-handle = <&cpu1>; 224 reg = <0x108000 0x1000 0x109000 0x1000>; 225 }; 226 dcsr-cpu-sb-proxy@110000 { 227 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 228 cpu-handle = <&cpu2>; 229 reg = <0x110000 0x1000 0x111000 0x1000>; 230 }; 231 dcsr-cpu-sb-proxy@118000 { 232 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 233 cpu-handle = <&cpu3>; 234 reg = <0x118000 0x1000 0x119000 0x1000>; 235 }; 236}; 237 238&bportals { 239 #address-cells = <0x1>; 240 #size-cells = <0x1>; 241 compatible = "simple-bus"; 242 243 bman-portal@0 { 244 compatible = "fsl,bman-portal"; 245 reg = <0x0 0x4000>, <0x1000000 0x1000>; 246 interrupts = <105 2 0 0>; 247 }; 248 bman-portal@4000 { 249 compatible = "fsl,bman-portal"; 250 reg = <0x4000 0x4000>, <0x1001000 0x1000>; 251 interrupts = <107 2 0 0>; 252 }; 253 bman-portal@8000 { 254 compatible = "fsl,bman-portal"; 255 reg = <0x8000 0x4000>, <0x1002000 0x1000>; 256 interrupts = <109 2 0 0>; 257 }; 258 bman-portal@c000 { 259 compatible = "fsl,bman-portal"; 260 reg = <0xc000 0x4000>, <0x1003000 0x1000>; 261 interrupts = <111 2 0 0>; 262 }; 263 bman-portal@10000 { 264 compatible = "fsl,bman-portal"; 265 reg = <0x10000 0x4000>, <0x1004000 0x1000>; 266 interrupts = <113 2 0 0>; 267 }; 268 bman-portal@14000 { 269 compatible = "fsl,bman-portal"; 270 reg = <0x14000 0x4000>, <0x1005000 0x1000>; 271 interrupts = <115 2 0 0>; 272 }; 273 bman-portal@18000 { 274 compatible = "fsl,bman-portal"; 275 reg = <0x18000 0x4000>, <0x1006000 0x1000>; 276 interrupts = <117 2 0 0>; 277 }; 278 bman-portal@1c000 { 279 compatible = "fsl,bman-portal"; 280 reg = <0x1c000 0x4000>, <0x1007000 0x1000>; 281 interrupts = <119 2 0 0>; 282 }; 283 bman-portal@20000 { 284 compatible = "fsl,bman-portal"; 285 reg = <0x20000 0x4000>, <0x1008000 0x1000>; 286 interrupts = <121 2 0 0>; 287 }; 288 bman-portal@24000 { 289 compatible = "fsl,bman-portal"; 290 reg = <0x24000 0x4000>, <0x1009000 0x1000>; 291 interrupts = <123 2 0 0>; 292 }; 293}; 294 295&qportals { 296 #address-cells = <0x1>; 297 #size-cells = <0x1>; 298 compatible = "simple-bus"; 299 300 qportal0: qman-portal@0 { 301 compatible = "fsl,qman-portal"; 302 reg = <0x0 0x4000>, <0x1000000 0x1000>; 303 interrupts = <104 0x2 0 0>; 304 cell-index = <0x0>; 305 }; 306 qportal1: qman-portal@4000 { 307 compatible = "fsl,qman-portal"; 308 reg = <0x4000 0x4000>, <0x1001000 0x1000>; 309 interrupts = <106 0x2 0 0>; 310 cell-index = <0x1>; 311 }; 312 qportal2: qman-portal@8000 { 313 compatible = "fsl,qman-portal"; 314 reg = <0x8000 0x4000>, <0x1002000 0x1000>; 315 interrupts = <108 0x2 0 0>; 316 cell-index = <0x2>; 317 }; 318 qportal3: qman-portal@c000 { 319 compatible = "fsl,qman-portal"; 320 reg = <0xc000 0x4000>, <0x1003000 0x1000>; 321 interrupts = <110 0x2 0 0>; 322 cell-index = <0x3>; 323 }; 324 qportal4: qman-portal@10000 { 325 compatible = "fsl,qman-portal"; 326 reg = <0x10000 0x4000>, <0x1004000 0x1000>; 327 interrupts = <112 0x2 0 0>; 328 cell-index = <0x4>; 329 }; 330 qportal5: qman-portal@14000 { 331 compatible = "fsl,qman-portal"; 332 reg = <0x14000 0x4000>, <0x1005000 0x1000>; 333 interrupts = <114 0x2 0 0>; 334 cell-index = <0x5>; 335 }; 336 qportal6: qman-portal@18000 { 337 compatible = "fsl,qman-portal"; 338 reg = <0x18000 0x4000>, <0x1006000 0x1000>; 339 interrupts = <116 0x2 0 0>; 340 cell-index = <0x6>; 341 }; 342 qportal7: qman-portal@1c000 { 343 compatible = "fsl,qman-portal"; 344 reg = <0x1c000 0x4000>, <0x1007000 0x1000>; 345 interrupts = <118 0x2 0 0>; 346 cell-index = <0x7>; 347 }; 348 qportal8: qman-portal@20000 { 349 compatible = "fsl,qman-portal"; 350 reg = <0x20000 0x4000>, <0x1008000 0x1000>; 351 interrupts = <120 0x2 0 0>; 352 cell-index = <0x8>; 353 }; 354 qportal9: qman-portal@24000 { 355 compatible = "fsl,qman-portal"; 356 reg = <0x24000 0x4000>, <0x1009000 0x1000>; 357 interrupts = <122 0x2 0 0>; 358 cell-index = <0x9>; 359 }; 360}; 361 362&soc { 363 #address-cells = <1>; 364 #size-cells = <1>; 365 device_type = "soc"; 366 compatible = "simple-bus"; 367 368 soc-sram-error { 369 compatible = "fsl,soc-sram-error"; 370 interrupts = <16 2 1 29>; 371 }; 372 373 corenet-law@0 { 374 compatible = "fsl,corenet-law"; 375 reg = <0x0 0x1000>; 376 fsl,num-laws = <16>; 377 }; 378 379 ddr1: memory-controller@8000 { 380 compatible = "fsl,qoriq-memory-controller-v5.0", 381 "fsl,qoriq-memory-controller"; 382 reg = <0x8000 0x1000>; 383 interrupts = <16 2 1 23>; 384 }; 385 386 cpc: l3-cache-controller@10000 { 387 compatible = "fsl,t1040-l3-cache-controller", "cache"; 388 reg = <0x10000 0x1000>; 389 interrupts = <16 2 1 27>; 390 }; 391 392 corenet-cf@18000 { 393 compatible = "fsl,corenet2-cf", "fsl,corenet-cf"; 394 reg = <0x18000 0x1000>; 395 interrupts = <16 2 1 31>; 396 fsl,ccf-num-csdids = <32>; 397 fsl,ccf-num-snoopids = <32>; 398 }; 399 400 iommu@20000 { 401 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 402 reg = <0x20000 0x1000>; 403 ranges = <0 0x20000 0x1000>; 404 #address-cells = <1>; 405 #size-cells = <1>; 406 interrupts = < 407 24 2 0 0 408 16 2 1 30>; 409 pamu0: pamu@0 { 410 reg = <0 0x1000>; 411 fsl,primary-cache-geometry = <128 1>; 412 fsl,secondary-cache-geometry = <16 2>; 413 }; 414 }; 415 416/include/ "qoriq-mpic.dtsi" 417 418 guts: global-utilities@e0000 { 419 compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0"; 420 reg = <0xe0000 0xe00>; 421 fsl,has-rstcr; 422 fsl,liodn-bits = <12>; 423 }; 424 425/include/ "qoriq-clockgen2.dtsi" 426 global-utilities@e1000 { 427 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0"; 428 429 mux0: mux0@0 { 430 #clock-cells = <0>; 431 reg = <0x0 4>; 432 compatible = "fsl,qoriq-core-mux-2.0"; 433 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 434 <&pll1 0>, <&pll1 1>, <&pll1 2>; 435 clock-names = "pll0", "pll0-div2", "pll1-div4", 436 "pll1", "pll1-div2", "pll1-div4"; 437 clock-output-names = "cmux0"; 438 }; 439 440 mux1: mux1@20 { 441 #clock-cells = <0>; 442 reg = <0x20 4>; 443 compatible = "fsl,qoriq-core-mux-2.0"; 444 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 445 <&pll1 0>, <&pll1 1>, <&pll1 2>; 446 clock-names = "pll0", "pll0-div2", "pll1-div4", 447 "pll1", "pll1-div2", "pll1-div4"; 448 clock-output-names = "cmux1"; 449 }; 450 451 mux2: mux2@40 { 452 #clock-cells = <0>; 453 reg = <0x40 4>; 454 compatible = "fsl,qoriq-core-mux-2.0"; 455 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 456 <&pll1 0>, <&pll1 1>, <&pll1 2>; 457 clock-names = "pll0", "pll0-div2", "pll1-div4", 458 "pll1", "pll1-div2", "pll1-div4"; 459 clock-output-names = "cmux2"; 460 }; 461 462 mux3: mux3@60 { 463 #clock-cells = <0>; 464 reg = <0x60 4>; 465 compatible = "fsl,qoriq-core-mux-2.0"; 466 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 467 <&pll1 0>, <&pll1 1>, <&pll1 2>; 468 clock-names = "pll0_0", "pll0_1", "pll0_2", 469 "pll1_0", "pll1_1", "pll1_2"; 470 clock-output-names = "cmux3"; 471 }; 472 }; 473 474 rcpm: global-utilities@e2000 { 475 compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.1"; 476 reg = <0xe2000 0x1000>; 477 }; 478 479 sfp: sfp@e8000 { 480 compatible = "fsl,t1040-sfp"; 481 reg = <0xe8000 0x1000>; 482 }; 483 484 serdes: serdes@ea000 { 485 compatible = "fsl,t1040-serdes"; 486 reg = <0xea000 0x4000>; 487 }; 488 489 tmu: tmu@f0000 { 490 compatible = "fsl,qoriq-tmu"; 491 reg = <0xf0000 0x1000>; 492 interrupts = <18 2 0 0>; 493 fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>; 494 fsl,tmu-calibration = <0x00000000 0x00000025 495 0x00000001 0x00000028 496 0x00000002 0x0000002d 497 0x00000003 0x00000031 498 0x00000004 0x00000036 499 0x00000005 0x0000003a 500 0x00000006 0x00000040 501 0x00000007 0x00000044 502 0x00000008 0x0000004a 503 0x00000009 0x0000004f 504 0x0000000a 0x00000054 505 506 0x00010000 0x0000000d 507 0x00010001 0x00000013 508 0x00010002 0x00000019 509 0x00010003 0x0000001f 510 0x00010004 0x00000025 511 0x00010005 0x0000002d 512 0x00010006 0x00000033 513 0x00010007 0x00000043 514 0x00010008 0x0000004b 515 0x00010009 0x00000053 516 517 0x00020000 0x00000010 518 0x00020001 0x00000017 519 0x00020002 0x0000001f 520 0x00020003 0x00000029 521 0x00020004 0x00000031 522 0x00020005 0x0000003c 523 0x00020006 0x00000042 524 0x00020007 0x0000004d 525 0x00020008 0x00000056 526 527 0x00030000 0x00000012 528 0x00030001 0x0000001d>; 529 #thermal-sensor-cells = <1>; 530 }; 531 532 thermal-zones { 533 cpu_thermal: cpu-thermal { 534 polling-delay-passive = <1000>; 535 polling-delay = <5000>; 536 537 thermal-sensors = <&tmu 2>; 538 539 trips { 540 cpu_alert: cpu-alert { 541 temperature = <85000>; 542 hysteresis = <2000>; 543 type = "passive"; 544 }; 545 cpu_crit: cpu-crit { 546 temperature = <95000>; 547 hysteresis = <2000>; 548 type = "critical"; 549 }; 550 }; 551 552 cooling-maps { 553 map0 { 554 trip = <&cpu_alert>; 555 cooling-device = 556 <&cpu0 THERMAL_NO_LIMIT 557 THERMAL_NO_LIMIT>; 558 }; 559 map1 { 560 trip = <&cpu_alert>; 561 cooling-device = 562 <&cpu1 THERMAL_NO_LIMIT 563 THERMAL_NO_LIMIT>; 564 }; 565 map2 { 566 trip = <&cpu_alert>; 567 cooling-device = 568 <&cpu2 THERMAL_NO_LIMIT 569 THERMAL_NO_LIMIT>; 570 }; 571 map3 { 572 trip = <&cpu_alert>; 573 cooling-device = 574 <&cpu3 THERMAL_NO_LIMIT 575 THERMAL_NO_LIMIT>; 576 }; 577 }; 578 }; 579 }; 580 581 scfg: global-utilities@fc000 { 582 compatible = "fsl,t1040-scfg"; 583 reg = <0xfc000 0x1000>; 584 }; 585 586/include/ "elo3-dma-0.dtsi" 587/include/ "elo3-dma-1.dtsi" 588/include/ "qoriq-espi-0.dtsi" 589 spi@110000 { 590 fsl,espi-num-chipselects = <4>; 591 }; 592 593/include/ "qoriq-esdhc-0.dtsi" 594 sdhc@114000 { 595 compatible = "fsl,t1040-esdhc", "fsl,esdhc"; 596 fsl,iommu-parent = <&pamu0>; 597 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */ 598 sdhci,auto-cmd12; 599 }; 600/include/ "qoriq-i2c-0.dtsi" 601/include/ "qoriq-i2c-1.dtsi" 602/include/ "qoriq-duart-0.dtsi" 603/include/ "qoriq-duart-1.dtsi" 604/include/ "qoriq-gpio-0.dtsi" 605/include/ "qoriq-gpio-1.dtsi" 606/include/ "qoriq-gpio-2.dtsi" 607/include/ "qoriq-gpio-3.dtsi" 608/include/ "qoriq-usb2-mph-0.dtsi" 609 usb0: usb@210000 { 610 compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph"; 611 fsl,iommu-parent = <&pamu0>; 612 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 613 phy_type = "utmi"; 614 port0; 615 }; 616/include/ "qoriq-usb2-dr-0.dtsi" 617 usb1: usb@211000 { 618 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; 619 fsl,iommu-parent = <&pamu0>; 620 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ 621 dr_mode = "host"; 622 phy_type = "utmi"; 623 }; 624 625 display@180000 { 626 compatible = "fsl,t1040-diu", "fsl,diu"; 627 reg = <0x180000 1000>; 628 interrupts = <74 2 0 0>; 629 }; 630 631/include/ "qoriq-sata2-0.dtsi" 632 sata@220000 { 633 fsl,iommu-parent = <&pamu0>; 634 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */ 635 }; 636/include/ "qoriq-sata2-1.dtsi" 637 sata@221000 { 638 fsl,iommu-parent = <&pamu0>; 639 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */ 640 }; 641/include/ "qoriq-sec5.0-0.dtsi" 642/include/ "qoriq-qman3.dtsi" 643/include/ "qoriq-bman1.dtsi" 644 645/include/ "qoriq-fman3l-0.dtsi" 646/include/ "qoriq-fman3-0-1g-0.dtsi" 647/include/ "qoriq-fman3-0-1g-1.dtsi" 648/include/ "qoriq-fman3-0-1g-2.dtsi" 649/include/ "qoriq-fman3-0-1g-3.dtsi" 650/include/ "qoriq-fman3-0-1g-4.dtsi" 651 fman@400000 { 652 enet0: ethernet@e0000 { 653 }; 654 655 enet1: ethernet@e2000 { 656 }; 657 658 enet2: ethernet@e4000 { 659 }; 660 661 enet3: ethernet@e6000 { 662 }; 663 664 enet4: ethernet@e8000 { 665 }; 666 667 mdio@fc000 { 668 interrupts = <100 1 0 0>; 669 }; 670 671 mdio@fd000 { 672 status = "disabled"; 673 }; 674 }; 675}; 676 677&qe { 678 #address-cells = <1>; 679 #size-cells = <1>; 680 device_type = "qe"; 681 compatible = "fsl,qe"; 682 fsl,qe-num-riscs = <1>; 683 fsl,qe-num-snums = <28>; 684 685 qeic: interrupt-controller@80 { 686 interrupt-controller; 687 compatible = "fsl,qe-ic"; 688 #address-cells = <0>; 689 #interrupt-cells = <1>; 690 reg = <0x80 0x80>; 691 interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78 692 }; 693 694 ucc@2000 { 695 cell-index = <1>; 696 reg = <0x2000 0x200>; 697 interrupts = <32>; 698 interrupt-parent = <&qeic>; 699 }; 700 701 ucc@2200 { 702 cell-index = <3>; 703 reg = <0x2200 0x200>; 704 interrupts = <34>; 705 interrupt-parent = <&qeic>; 706 }; 707 708 muram@10000 { 709 #address-cells = <1>; 710 #size-cells = <1>; 711 compatible = "fsl,qe-muram", "fsl,cpm-muram"; 712 ranges = <0x0 0x10000 0x6000>; 713 714 data-only@0 { 715 compatible = "fsl,qe-muram-data", 716 "fsl,cpm-muram-data"; 717 reg = <0x0 0x6000>; 718 }; 719 }; 720}; 721