1fb734eeeSPrabhakar Kushwaha/* 2fb734eeeSPrabhakar Kushwaha * T1040 Silicon/SoC Device Tree Source (post include) 3fb734eeeSPrabhakar Kushwaha * 41e8ed06dSKumar Gala * Copyright 2013 - 2014 Freescale Semiconductor Inc. 5fb734eeeSPrabhakar Kushwaha * 6fb734eeeSPrabhakar Kushwaha * Redistribution and use in source and binary forms, with or without 7fb734eeeSPrabhakar Kushwaha * modification, are permitted provided that the following conditions are met: 8fb734eeeSPrabhakar Kushwaha * * Redistributions of source code must retain the above copyright 9fb734eeeSPrabhakar Kushwaha * notice, this list of conditions and the following disclaimer. 10fb734eeeSPrabhakar Kushwaha * * Redistributions in binary form must reproduce the above copyright 11fb734eeeSPrabhakar Kushwaha * notice, this list of conditions and the following disclaimer in the 12fb734eeeSPrabhakar Kushwaha * documentation and/or other materials provided with the distribution. 13fb734eeeSPrabhakar Kushwaha * * Neither the name of Freescale Semiconductor nor the 14fb734eeeSPrabhakar Kushwaha * names of its contributors may be used to endorse or promote products 15fb734eeeSPrabhakar Kushwaha * derived from this software without specific prior written permission. 16fb734eeeSPrabhakar Kushwaha * 17fb734eeeSPrabhakar Kushwaha * 18fb734eeeSPrabhakar Kushwaha * ALTERNATIVELY, this software may be distributed under the terms of the 19fb734eeeSPrabhakar Kushwaha * GNU General Public License ("GPL") as published by the Free Software 20fb734eeeSPrabhakar Kushwaha * Foundation, either version 2 of that License or (at your option) any 21fb734eeeSPrabhakar Kushwaha * later version. 22fb734eeeSPrabhakar Kushwaha * 23fb734eeeSPrabhakar Kushwaha * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24fb734eeeSPrabhakar Kushwaha * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25fb734eeeSPrabhakar Kushwaha * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26fb734eeeSPrabhakar Kushwaha * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27fb734eeeSPrabhakar Kushwaha * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28fb734eeeSPrabhakar Kushwaha * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29fb734eeeSPrabhakar Kushwaha * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30fb734eeeSPrabhakar Kushwaha * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31fb734eeeSPrabhakar Kushwaha * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32fb734eeeSPrabhakar Kushwaha * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33fb734eeeSPrabhakar Kushwaha */ 34fb734eeeSPrabhakar Kushwaha 351e8ed06dSKumar Gala&bman_fbpr { 361e8ed06dSKumar Gala compatible = "fsl,bman-fbpr"; 371e8ed06dSKumar Gala alloc-ranges = <0 0 0x10000 0>; 381e8ed06dSKumar Gala}; 391e8ed06dSKumar Gala 40fb734eeeSPrabhakar Kushwaha&ifc { 41fb734eeeSPrabhakar Kushwaha #address-cells = <2>; 42fb734eeeSPrabhakar Kushwaha #size-cells = <1>; 43fb734eeeSPrabhakar Kushwaha compatible = "fsl,ifc", "simple-bus"; 44fb734eeeSPrabhakar Kushwaha interrupts = <25 2 0 0>; 45fb734eeeSPrabhakar Kushwaha}; 46fb734eeeSPrabhakar Kushwaha 47fb734eeeSPrabhakar Kushwaha&pci0 { 48fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 49fb734eeeSPrabhakar Kushwaha device_type = "pci"; 50fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 51fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 52fb734eeeSPrabhakar Kushwaha bus-range = <0x0 0xff>; 53fb734eeeSPrabhakar Kushwaha interrupts = <20 2 0 0>; 54fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 55fb734eeeSPrabhakar Kushwaha pcie@0 { 56fb734eeeSPrabhakar Kushwaha reg = <0 0 0 0 0>; 57fb734eeeSPrabhakar Kushwaha #interrupt-cells = <1>; 58fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 59fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 60fb734eeeSPrabhakar Kushwaha device_type = "pci"; 61fb734eeeSPrabhakar Kushwaha interrupts = <20 2 0 0>; 62fb734eeeSPrabhakar Kushwaha interrupt-map-mask = <0xf800 0 0 7>; 63fb734eeeSPrabhakar Kushwaha interrupt-map = < 64fb734eeeSPrabhakar Kushwaha /* IDSEL 0x0 */ 65fb734eeeSPrabhakar Kushwaha 0000 0 0 1 &mpic 40 1 0 0 66fb734eeeSPrabhakar Kushwaha 0000 0 0 2 &mpic 1 1 0 0 67fb734eeeSPrabhakar Kushwaha 0000 0 0 3 &mpic 2 1 0 0 68fb734eeeSPrabhakar Kushwaha 0000 0 0 4 &mpic 3 1 0 0 69fb734eeeSPrabhakar Kushwaha >; 70fb734eeeSPrabhakar Kushwaha }; 71fb734eeeSPrabhakar Kushwaha}; 72fb734eeeSPrabhakar Kushwaha 73fb734eeeSPrabhakar Kushwaha&pci1 { 74fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 75fb734eeeSPrabhakar Kushwaha device_type = "pci"; 76fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 77fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 78fb734eeeSPrabhakar Kushwaha bus-range = <0 0xff>; 79fb734eeeSPrabhakar Kushwaha interrupts = <21 2 0 0>; 80fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 81fb734eeeSPrabhakar Kushwaha pcie@0 { 82fb734eeeSPrabhakar Kushwaha reg = <0 0 0 0 0>; 83fb734eeeSPrabhakar Kushwaha #interrupt-cells = <1>; 84fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 85fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 86fb734eeeSPrabhakar Kushwaha device_type = "pci"; 87fb734eeeSPrabhakar Kushwaha interrupts = <21 2 0 0>; 88fb734eeeSPrabhakar Kushwaha interrupt-map-mask = <0xf800 0 0 7>; 89fb734eeeSPrabhakar Kushwaha interrupt-map = < 90fb734eeeSPrabhakar Kushwaha /* IDSEL 0x0 */ 91fb734eeeSPrabhakar Kushwaha 0000 0 0 1 &mpic 41 1 0 0 92fb734eeeSPrabhakar Kushwaha 0000 0 0 2 &mpic 5 1 0 0 93fb734eeeSPrabhakar Kushwaha 0000 0 0 3 &mpic 6 1 0 0 94fb734eeeSPrabhakar Kushwaha 0000 0 0 4 &mpic 7 1 0 0 95fb734eeeSPrabhakar Kushwaha >; 96fb734eeeSPrabhakar Kushwaha }; 97fb734eeeSPrabhakar Kushwaha}; 98fb734eeeSPrabhakar Kushwaha 99fb734eeeSPrabhakar Kushwaha&pci2 { 100fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 101fb734eeeSPrabhakar Kushwaha device_type = "pci"; 102fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 103fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 104fb734eeeSPrabhakar Kushwaha bus-range = <0x0 0xff>; 105fb734eeeSPrabhakar Kushwaha interrupts = <22 2 0 0>; 106fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 107fb734eeeSPrabhakar Kushwaha pcie@0 { 108fb734eeeSPrabhakar Kushwaha reg = <0 0 0 0 0>; 109fb734eeeSPrabhakar Kushwaha #interrupt-cells = <1>; 110fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 111fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 112fb734eeeSPrabhakar Kushwaha device_type = "pci"; 113fb734eeeSPrabhakar Kushwaha interrupts = <22 2 0 0>; 114fb734eeeSPrabhakar Kushwaha interrupt-map-mask = <0xf800 0 0 7>; 115fb734eeeSPrabhakar Kushwaha interrupt-map = < 116fb734eeeSPrabhakar Kushwaha /* IDSEL 0x0 */ 117fb734eeeSPrabhakar Kushwaha 0000 0 0 1 &mpic 42 1 0 0 118fb734eeeSPrabhakar Kushwaha 0000 0 0 2 &mpic 9 1 0 0 119fb734eeeSPrabhakar Kushwaha 0000 0 0 3 &mpic 10 1 0 0 120fb734eeeSPrabhakar Kushwaha 0000 0 0 4 &mpic 11 1 0 0 121fb734eeeSPrabhakar Kushwaha >; 122fb734eeeSPrabhakar Kushwaha }; 123fb734eeeSPrabhakar Kushwaha}; 124fb734eeeSPrabhakar Kushwaha 125fb734eeeSPrabhakar Kushwaha&pci3 { 126fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 127fb734eeeSPrabhakar Kushwaha device_type = "pci"; 128fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 129fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 130fb734eeeSPrabhakar Kushwaha bus-range = <0x0 0xff>; 131fb734eeeSPrabhakar Kushwaha interrupts = <23 2 0 0>; 132fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 133fb734eeeSPrabhakar Kushwaha pcie@0 { 134fb734eeeSPrabhakar Kushwaha reg = <0 0 0 0 0>; 135fb734eeeSPrabhakar Kushwaha #interrupt-cells = <1>; 136fb734eeeSPrabhakar Kushwaha #size-cells = <2>; 137fb734eeeSPrabhakar Kushwaha #address-cells = <3>; 138fb734eeeSPrabhakar Kushwaha device_type = "pci"; 139fb734eeeSPrabhakar Kushwaha interrupts = <23 2 0 0>; 140fb734eeeSPrabhakar Kushwaha interrupt-map-mask = <0xf800 0 0 7>; 141fb734eeeSPrabhakar Kushwaha interrupt-map = < 142fb734eeeSPrabhakar Kushwaha /* IDSEL 0x0 */ 143fb734eeeSPrabhakar Kushwaha 0000 0 0 1 &mpic 43 1 0 0 144fb734eeeSPrabhakar Kushwaha 0000 0 0 2 &mpic 0 1 0 0 145fb734eeeSPrabhakar Kushwaha 0000 0 0 3 &mpic 4 1 0 0 146fb734eeeSPrabhakar Kushwaha 0000 0 0 4 &mpic 8 1 0 0 147fb734eeeSPrabhakar Kushwaha >; 148fb734eeeSPrabhakar Kushwaha }; 149fb734eeeSPrabhakar Kushwaha}; 150fb734eeeSPrabhakar Kushwaha 151fb734eeeSPrabhakar Kushwaha&dcsr { 152fb734eeeSPrabhakar Kushwaha #address-cells = <1>; 153fb734eeeSPrabhakar Kushwaha #size-cells = <1>; 154fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr", "simple-bus"; 155fb734eeeSPrabhakar Kushwaha 156fb734eeeSPrabhakar Kushwaha dcsr-epu@0 { 157fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu"; 158fb734eeeSPrabhakar Kushwaha interrupts = <52 2 0 0 159fb734eeeSPrabhakar Kushwaha 84 2 0 0 160fb734eeeSPrabhakar Kushwaha 85 2 0 0>; 161fb734eeeSPrabhakar Kushwaha reg = <0x0 0x1000>; 162fb734eeeSPrabhakar Kushwaha }; 163fb734eeeSPrabhakar Kushwaha dcsr-npc { 164fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc"; 165fb734eeeSPrabhakar Kushwaha reg = <0x1000 0x1000 0x1002000 0x10000>; 166fb734eeeSPrabhakar Kushwaha }; 167fb734eeeSPrabhakar Kushwaha dcsr-nxc@2000 { 168fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr-nxc"; 169fb734eeeSPrabhakar Kushwaha reg = <0x2000 0x1000>; 170fb734eeeSPrabhakar Kushwaha }; 171fb734eeeSPrabhakar Kushwaha dcsr-corenet { 172fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr-corenet"; 173fb734eeeSPrabhakar Kushwaha reg = <0x8000 0x1000 0x1A000 0x1000>; 174fb734eeeSPrabhakar Kushwaha }; 175fb734eeeSPrabhakar Kushwaha dcsr-dpaa@9000 { 176fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa"; 177fb734eeeSPrabhakar Kushwaha reg = <0x9000 0x1000>; 178fb734eeeSPrabhakar Kushwaha }; 179fb734eeeSPrabhakar Kushwaha dcsr-ocn@11000 { 180fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn"; 181fb734eeeSPrabhakar Kushwaha reg = <0x11000 0x1000>; 182fb734eeeSPrabhakar Kushwaha }; 183fb734eeeSPrabhakar Kushwaha dcsr-ddr@12000 { 184fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr-ddr"; 185fb734eeeSPrabhakar Kushwaha dev-handle = <&ddr1>; 186fb734eeeSPrabhakar Kushwaha reg = <0x12000 0x1000>; 187fb734eeeSPrabhakar Kushwaha }; 188fb734eeeSPrabhakar Kushwaha dcsr-nal@18000 { 189fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal"; 190fb734eeeSPrabhakar Kushwaha reg = <0x18000 0x1000>; 191fb734eeeSPrabhakar Kushwaha }; 192fb734eeeSPrabhakar Kushwaha dcsr-rcpm@22000 { 193fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm"; 194fb734eeeSPrabhakar Kushwaha reg = <0x22000 0x1000>; 195fb734eeeSPrabhakar Kushwaha }; 196fb734eeeSPrabhakar Kushwaha dcsr-snpc@30000 { 197fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc"; 198fb734eeeSPrabhakar Kushwaha reg = <0x30000 0x1000 0x1022000 0x10000>; 199fb734eeeSPrabhakar Kushwaha }; 200fb734eeeSPrabhakar Kushwaha dcsr-snpc@31000 { 201fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc"; 202fb734eeeSPrabhakar Kushwaha reg = <0x31000 0x1000 0x1042000 0x10000>; 203fb734eeeSPrabhakar Kushwaha }; 204fb734eeeSPrabhakar Kushwaha dcsr-cpu-sb-proxy@100000 { 205fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 206fb734eeeSPrabhakar Kushwaha cpu-handle = <&cpu0>; 207fb734eeeSPrabhakar Kushwaha reg = <0x100000 0x1000 0x101000 0x1000>; 208fb734eeeSPrabhakar Kushwaha }; 209fb734eeeSPrabhakar Kushwaha dcsr-cpu-sb-proxy@108000 { 210fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 211fb734eeeSPrabhakar Kushwaha cpu-handle = <&cpu1>; 212fb734eeeSPrabhakar Kushwaha reg = <0x108000 0x1000 0x109000 0x1000>; 213fb734eeeSPrabhakar Kushwaha }; 214fb734eeeSPrabhakar Kushwaha dcsr-cpu-sb-proxy@110000 { 215fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 216fb734eeeSPrabhakar Kushwaha cpu-handle = <&cpu2>; 217fb734eeeSPrabhakar Kushwaha reg = <0x110000 0x1000 0x111000 0x1000>; 218fb734eeeSPrabhakar Kushwaha }; 219fb734eeeSPrabhakar Kushwaha dcsr-cpu-sb-proxy@118000 { 220fb734eeeSPrabhakar Kushwaha compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 221fb734eeeSPrabhakar Kushwaha cpu-handle = <&cpu3>; 222fb734eeeSPrabhakar Kushwaha reg = <0x118000 0x1000 0x119000 0x1000>; 223fb734eeeSPrabhakar Kushwaha }; 224fb734eeeSPrabhakar Kushwaha}; 225fb734eeeSPrabhakar Kushwaha 2261e8ed06dSKumar Gala&bportals { 2271e8ed06dSKumar Gala #address-cells = <0x1>; 2281e8ed06dSKumar Gala #size-cells = <0x1>; 2291e8ed06dSKumar Gala compatible = "simple-bus"; 2301e8ed06dSKumar Gala 2311e8ed06dSKumar Gala bman-portal@0 { 2321e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2331e8ed06dSKumar Gala reg = <0x0 0x4000>, <0x1000000 0x1000>; 2341e8ed06dSKumar Gala interrupts = <105 2 0 0>; 2351e8ed06dSKumar Gala }; 2361e8ed06dSKumar Gala bman-portal@4000 { 2371e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2381e8ed06dSKumar Gala reg = <0x4000 0x4000>, <0x1001000 0x1000>; 2391e8ed06dSKumar Gala interrupts = <107 2 0 0>; 2401e8ed06dSKumar Gala }; 2411e8ed06dSKumar Gala bman-portal@8000 { 2421e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2431e8ed06dSKumar Gala reg = <0x8000 0x4000>, <0x1002000 0x1000>; 2441e8ed06dSKumar Gala interrupts = <109 2 0 0>; 2451e8ed06dSKumar Gala }; 2461e8ed06dSKumar Gala bman-portal@c000 { 2471e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2481e8ed06dSKumar Gala reg = <0xc000 0x4000>, <0x1003000 0x1000>; 2491e8ed06dSKumar Gala interrupts = <111 2 0 0>; 2501e8ed06dSKumar Gala }; 2511e8ed06dSKumar Gala bman-portal@10000 { 2521e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2531e8ed06dSKumar Gala reg = <0x10000 0x4000>, <0x1004000 0x1000>; 2541e8ed06dSKumar Gala interrupts = <113 2 0 0>; 2551e8ed06dSKumar Gala }; 2561e8ed06dSKumar Gala bman-portal@14000 { 2571e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2581e8ed06dSKumar Gala reg = <0x14000 0x4000>, <0x1005000 0x1000>; 2591e8ed06dSKumar Gala interrupts = <115 2 0 0>; 2601e8ed06dSKumar Gala }; 2611e8ed06dSKumar Gala bman-portal@18000 { 2621e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2631e8ed06dSKumar Gala reg = <0x18000 0x4000>, <0x1006000 0x1000>; 2641e8ed06dSKumar Gala interrupts = <117 2 0 0>; 2651e8ed06dSKumar Gala }; 2661e8ed06dSKumar Gala bman-portal@1c000 { 2671e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2681e8ed06dSKumar Gala reg = <0x1c000 0x4000>, <0x1007000 0x1000>; 2691e8ed06dSKumar Gala interrupts = <119 2 0 0>; 2701e8ed06dSKumar Gala }; 2711e8ed06dSKumar Gala bman-portal@20000 { 2721e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2731e8ed06dSKumar Gala reg = <0x20000 0x4000>, <0x1008000 0x1000>; 2741e8ed06dSKumar Gala interrupts = <121 2 0 0>; 2751e8ed06dSKumar Gala }; 2761e8ed06dSKumar Gala bman-portal@24000 { 2771e8ed06dSKumar Gala compatible = "fsl,bman-portal"; 2781e8ed06dSKumar Gala reg = <0x24000 0x4000>, <0x1009000 0x1000>; 2791e8ed06dSKumar Gala interrupts = <123 2 0 0>; 2801e8ed06dSKumar Gala }; 2811e8ed06dSKumar Gala}; 2821e8ed06dSKumar Gala 283fb734eeeSPrabhakar Kushwaha&soc { 284fb734eeeSPrabhakar Kushwaha #address-cells = <1>; 285fb734eeeSPrabhakar Kushwaha #size-cells = <1>; 286fb734eeeSPrabhakar Kushwaha device_type = "soc"; 287fb734eeeSPrabhakar Kushwaha compatible = "simple-bus"; 288fb734eeeSPrabhakar Kushwaha 289fb734eeeSPrabhakar Kushwaha soc-sram-error { 290fb734eeeSPrabhakar Kushwaha compatible = "fsl,soc-sram-error"; 291fb734eeeSPrabhakar Kushwaha interrupts = <16 2 1 29>; 292fb734eeeSPrabhakar Kushwaha }; 293fb734eeeSPrabhakar Kushwaha 294fb734eeeSPrabhakar Kushwaha corenet-law@0 { 295fb734eeeSPrabhakar Kushwaha compatible = "fsl,corenet-law"; 296fb734eeeSPrabhakar Kushwaha reg = <0x0 0x1000>; 297fb734eeeSPrabhakar Kushwaha fsl,num-laws = <16>; 298fb734eeeSPrabhakar Kushwaha }; 299fb734eeeSPrabhakar Kushwaha 300fb734eeeSPrabhakar Kushwaha ddr1: memory-controller@8000 { 301fb734eeeSPrabhakar Kushwaha compatible = "fsl,qoriq-memory-controller-v5.0", 302fb734eeeSPrabhakar Kushwaha "fsl,qoriq-memory-controller"; 303fb734eeeSPrabhakar Kushwaha reg = <0x8000 0x1000>; 304fb734eeeSPrabhakar Kushwaha interrupts = <16 2 1 23>; 305fb734eeeSPrabhakar Kushwaha }; 306fb734eeeSPrabhakar Kushwaha 307fb734eeeSPrabhakar Kushwaha cpc: l3-cache-controller@10000 { 308fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-l3-cache-controller", "cache"; 309fb734eeeSPrabhakar Kushwaha reg = <0x10000 0x1000>; 310fb734eeeSPrabhakar Kushwaha interrupts = <16 2 1 27>; 311fb734eeeSPrabhakar Kushwaha }; 312fb734eeeSPrabhakar Kushwaha 313fb734eeeSPrabhakar Kushwaha corenet-cf@18000 { 314fb734eeeSPrabhakar Kushwaha compatible = "fsl,corenet2-cf", "fsl,corenet-cf"; 315fb734eeeSPrabhakar Kushwaha reg = <0x18000 0x1000>; 316fb734eeeSPrabhakar Kushwaha interrupts = <16 2 1 31>; 317fb734eeeSPrabhakar Kushwaha fsl,ccf-num-csdids = <32>; 318fb734eeeSPrabhakar Kushwaha fsl,ccf-num-snoopids = <32>; 319fb734eeeSPrabhakar Kushwaha }; 320fb734eeeSPrabhakar Kushwaha 321fb734eeeSPrabhakar Kushwaha iommu@20000 { 322fb734eeeSPrabhakar Kushwaha compatible = "fsl,pamu-v1.0", "fsl,pamu"; 323fb734eeeSPrabhakar Kushwaha reg = <0x20000 0x1000>; 324fb734eeeSPrabhakar Kushwaha ranges = <0 0x20000 0x1000>; 325fb734eeeSPrabhakar Kushwaha #address-cells = <1>; 326fb734eeeSPrabhakar Kushwaha #size-cells = <1>; 327fb734eeeSPrabhakar Kushwaha interrupts = < 328fb734eeeSPrabhakar Kushwaha 24 2 0 0 329fb734eeeSPrabhakar Kushwaha 16 2 1 30>; 330fb734eeeSPrabhakar Kushwaha pamu0: pamu@0 { 331fb734eeeSPrabhakar Kushwaha reg = <0 0x1000>; 332fb734eeeSPrabhakar Kushwaha fsl,primary-cache-geometry = <128 1>; 333fb734eeeSPrabhakar Kushwaha fsl,secondary-cache-geometry = <16 2>; 334fb734eeeSPrabhakar Kushwaha }; 335fb734eeeSPrabhakar Kushwaha }; 336fb734eeeSPrabhakar Kushwaha 337fb734eeeSPrabhakar Kushwaha/include/ "qoriq-mpic.dtsi" 338fb734eeeSPrabhakar Kushwaha 339fb734eeeSPrabhakar Kushwaha guts: global-utilities@e0000 { 340fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0"; 341fb734eeeSPrabhakar Kushwaha reg = <0xe0000 0xe00>; 342fb734eeeSPrabhakar Kushwaha fsl,has-rstcr; 343fb734eeeSPrabhakar Kushwaha fsl,liodn-bits = <12>; 344fb734eeeSPrabhakar Kushwaha }; 345fb734eeeSPrabhakar Kushwaha 346eaffcb0fSEmil Medve/include/ "qoriq-clockgen2.dtsi" 347eaffcb0fSEmil Medve global-utilities@e1000 { 348fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0"; 349fb734eeeSPrabhakar Kushwaha 350fb734eeeSPrabhakar Kushwaha mux0: mux0@0 { 351fb734eeeSPrabhakar Kushwaha #clock-cells = <0>; 352fb734eeeSPrabhakar Kushwaha reg = <0x0 4>; 353fb734eeeSPrabhakar Kushwaha compatible = "fsl,qoriq-core-mux-2.0"; 354fb734eeeSPrabhakar Kushwaha clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 355fb734eeeSPrabhakar Kushwaha <&pll1 0>, <&pll1 1>, <&pll1 2>; 356fb734eeeSPrabhakar Kushwaha clock-names = "pll0", "pll0-div2", "pll1-div4", 357fb734eeeSPrabhakar Kushwaha "pll1", "pll1-div2", "pll1-div4"; 358fb734eeeSPrabhakar Kushwaha clock-output-names = "cmux0"; 359fb734eeeSPrabhakar Kushwaha }; 360fb734eeeSPrabhakar Kushwaha 361fb734eeeSPrabhakar Kushwaha mux1: mux1@20 { 362fb734eeeSPrabhakar Kushwaha #clock-cells = <0>; 363fb734eeeSPrabhakar Kushwaha reg = <0x20 4>; 364fb734eeeSPrabhakar Kushwaha compatible = "fsl,qoriq-core-mux-2.0"; 365fb734eeeSPrabhakar Kushwaha clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 366fb734eeeSPrabhakar Kushwaha <&pll1 0>, <&pll1 1>, <&pll1 2>; 367fb734eeeSPrabhakar Kushwaha clock-names = "pll0", "pll0-div2", "pll1-div4", 368fb734eeeSPrabhakar Kushwaha "pll1", "pll1-div2", "pll1-div4"; 369fb734eeeSPrabhakar Kushwaha clock-output-names = "cmux1"; 370fb734eeeSPrabhakar Kushwaha }; 371fb734eeeSPrabhakar Kushwaha 372fb734eeeSPrabhakar Kushwaha mux2: mux2@40 { 373fb734eeeSPrabhakar Kushwaha #clock-cells = <0>; 374fb734eeeSPrabhakar Kushwaha reg = <0x40 4>; 375fb734eeeSPrabhakar Kushwaha compatible = "fsl,qoriq-core-mux-2.0"; 376fb734eeeSPrabhakar Kushwaha clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 377fb734eeeSPrabhakar Kushwaha <&pll1 0>, <&pll1 1>, <&pll1 2>; 378fb734eeeSPrabhakar Kushwaha clock-names = "pll0", "pll0-div2", "pll1-div4", 379fb734eeeSPrabhakar Kushwaha "pll1", "pll1-div2", "pll1-div4"; 380fb734eeeSPrabhakar Kushwaha clock-output-names = "cmux2"; 381fb734eeeSPrabhakar Kushwaha }; 382fb734eeeSPrabhakar Kushwaha 383fb734eeeSPrabhakar Kushwaha mux3: mux3@60 { 384fb734eeeSPrabhakar Kushwaha #clock-cells = <0>; 385fb734eeeSPrabhakar Kushwaha reg = <0x60 4>; 386fb734eeeSPrabhakar Kushwaha compatible = "fsl,qoriq-core-mux-2.0"; 387fb734eeeSPrabhakar Kushwaha clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, 388fb734eeeSPrabhakar Kushwaha <&pll1 0>, <&pll1 1>, <&pll1 2>; 389fb734eeeSPrabhakar Kushwaha clock-names = "pll0_0", "pll0_1", "pll0_2", 390fb734eeeSPrabhakar Kushwaha "pll1_0", "pll1_1", "pll1_2"; 391fb734eeeSPrabhakar Kushwaha clock-output-names = "cmux3"; 392fb734eeeSPrabhakar Kushwaha }; 393fb734eeeSPrabhakar Kushwaha }; 394fb734eeeSPrabhakar Kushwaha 395fb734eeeSPrabhakar Kushwaha rcpm: global-utilities@e2000 { 396fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.0"; 397fb734eeeSPrabhakar Kushwaha reg = <0xe2000 0x1000>; 398fb734eeeSPrabhakar Kushwaha }; 399fb734eeeSPrabhakar Kushwaha 400fb734eeeSPrabhakar Kushwaha sfp: sfp@e8000 { 401fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-sfp"; 402fb734eeeSPrabhakar Kushwaha reg = <0xe8000 0x1000>; 403fb734eeeSPrabhakar Kushwaha }; 404fb734eeeSPrabhakar Kushwaha 405fb734eeeSPrabhakar Kushwaha serdes: serdes@ea000 { 406fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-serdes"; 407fb734eeeSPrabhakar Kushwaha reg = <0xea000 0x4000>; 408fb734eeeSPrabhakar Kushwaha }; 409fb734eeeSPrabhakar Kushwaha 410fb734eeeSPrabhakar Kushwaha/include/ "elo3-dma-0.dtsi" 411fb734eeeSPrabhakar Kushwaha/include/ "elo3-dma-1.dtsi" 412fb734eeeSPrabhakar Kushwaha/include/ "qoriq-espi-0.dtsi" 413fb734eeeSPrabhakar Kushwaha spi@110000 { 414fb734eeeSPrabhakar Kushwaha fsl,espi-num-chipselects = <4>; 415fb734eeeSPrabhakar Kushwaha }; 416fb734eeeSPrabhakar Kushwaha 417fb734eeeSPrabhakar Kushwaha/include/ "qoriq-esdhc-0.dtsi" 418fb734eeeSPrabhakar Kushwaha sdhc@114000 { 419fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-esdhc", "fsl,esdhc"; 420fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 421fb734eeeSPrabhakar Kushwaha fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */ 422fb734eeeSPrabhakar Kushwaha sdhci,auto-cmd12; 423fb734eeeSPrabhakar Kushwaha }; 424fb734eeeSPrabhakar Kushwaha/include/ "qoriq-i2c-0.dtsi" 425fb734eeeSPrabhakar Kushwaha/include/ "qoriq-i2c-1.dtsi" 426fb734eeeSPrabhakar Kushwaha/include/ "qoriq-duart-0.dtsi" 427fb734eeeSPrabhakar Kushwaha/include/ "qoriq-duart-1.dtsi" 428fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-0.dtsi" 429fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-1.dtsi" 430fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-2.dtsi" 431fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-3.dtsi" 432fb734eeeSPrabhakar Kushwaha/include/ "qoriq-usb2-mph-0.dtsi" 433fb734eeeSPrabhakar Kushwaha usb0: usb@210000 { 434fb734eeeSPrabhakar Kushwaha compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph"; 435fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 436fb734eeeSPrabhakar Kushwaha fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 437fb734eeeSPrabhakar Kushwaha phy_type = "utmi"; 438fb734eeeSPrabhakar Kushwaha port0; 439fb734eeeSPrabhakar Kushwaha }; 440fb734eeeSPrabhakar Kushwaha/include/ "qoriq-usb2-dr-0.dtsi" 441fb734eeeSPrabhakar Kushwaha usb1: usb@211000 { 442fb734eeeSPrabhakar Kushwaha compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr"; 443fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 444fb734eeeSPrabhakar Kushwaha fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ 445fb734eeeSPrabhakar Kushwaha dr_mode = "host"; 446fb734eeeSPrabhakar Kushwaha phy_type = "utmi"; 447fb734eeeSPrabhakar Kushwaha }; 448fb734eeeSPrabhakar Kushwaha 449fb734eeeSPrabhakar Kushwaha display@180000 { 450fb734eeeSPrabhakar Kushwaha compatible = "fsl,t1040-diu", "fsl,diu"; 451fb734eeeSPrabhakar Kushwaha reg = <0x180000 1000>; 452fb734eeeSPrabhakar Kushwaha interrupts = <74 2 0 0>; 453fb734eeeSPrabhakar Kushwaha }; 454fb734eeeSPrabhakar Kushwaha 455fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sata2-0.dtsi" 456fb734eeeSPrabhakar Kushwaha sata@220000 { 457fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 458fb734eeeSPrabhakar Kushwaha fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */ 459fb734eeeSPrabhakar Kushwaha }; 460fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sata2-1.dtsi" 461fb734eeeSPrabhakar Kushwaha sata@221000 { 462fb734eeeSPrabhakar Kushwaha fsl,iommu-parent = <&pamu0>; 463fb734eeeSPrabhakar Kushwaha fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */ 464fb734eeeSPrabhakar Kushwaha }; 465fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sec5.0-0.dtsi" 4661e8ed06dSKumar Gala/include/ "qoriq-bman1.dtsi" 467fb734eeeSPrabhakar Kushwaha}; 468