1fb734eeeSPrabhakar Kushwaha/*
2fb734eeeSPrabhakar Kushwaha * T1040 Silicon/SoC Device Tree Source (post include)
3fb734eeeSPrabhakar Kushwaha *
41e8ed06dSKumar Gala * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5fb734eeeSPrabhakar Kushwaha *
6fb734eeeSPrabhakar Kushwaha * Redistribution and use in source and binary forms, with or without
7fb734eeeSPrabhakar Kushwaha * modification, are permitted provided that the following conditions are met:
8fb734eeeSPrabhakar Kushwaha *     * Redistributions of source code must retain the above copyright
9fb734eeeSPrabhakar Kushwaha *	 notice, this list of conditions and the following disclaimer.
10fb734eeeSPrabhakar Kushwaha *     * Redistributions in binary form must reproduce the above copyright
11fb734eeeSPrabhakar Kushwaha *	 notice, this list of conditions and the following disclaimer in the
12fb734eeeSPrabhakar Kushwaha *	 documentation and/or other materials provided with the distribution.
13fb734eeeSPrabhakar Kushwaha *     * Neither the name of Freescale Semiconductor nor the
14fb734eeeSPrabhakar Kushwaha *	 names of its contributors may be used to endorse or promote products
15fb734eeeSPrabhakar Kushwaha *	 derived from this software without specific prior written permission.
16fb734eeeSPrabhakar Kushwaha *
17fb734eeeSPrabhakar Kushwaha *
18fb734eeeSPrabhakar Kushwaha * ALTERNATIVELY, this software may be distributed under the terms of the
19fb734eeeSPrabhakar Kushwaha * GNU General Public License ("GPL") as published by the Free Software
20fb734eeeSPrabhakar Kushwaha * Foundation, either version 2 of that License or (at your option) any
21fb734eeeSPrabhakar Kushwaha * later version.
22fb734eeeSPrabhakar Kushwaha *
23fb734eeeSPrabhakar Kushwaha * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24fb734eeeSPrabhakar Kushwaha * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25fb734eeeSPrabhakar Kushwaha * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26fb734eeeSPrabhakar Kushwaha * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27fb734eeeSPrabhakar Kushwaha * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28fb734eeeSPrabhakar Kushwaha * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29fb734eeeSPrabhakar Kushwaha * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30fb734eeeSPrabhakar Kushwaha * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31fb734eeeSPrabhakar Kushwaha * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32fb734eeeSPrabhakar Kushwaha * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33fb734eeeSPrabhakar Kushwaha */
34fb734eeeSPrabhakar Kushwaha
351e8ed06dSKumar Gala&bman_fbpr {
361e8ed06dSKumar Gala	compatible = "fsl,bman-fbpr";
371e8ed06dSKumar Gala	alloc-ranges = <0 0 0x10000 0>;
381e8ed06dSKumar Gala};
391e8ed06dSKumar Gala
407f6972a0SKumar Gala&qman_fqd {
417f6972a0SKumar Gala	compatible = "fsl,qman-fqd";
427f6972a0SKumar Gala	alloc-ranges = <0 0 0x10000 0>;
437f6972a0SKumar Gala};
447f6972a0SKumar Gala
457f6972a0SKumar Gala&qman_pfdr {
467f6972a0SKumar Gala	compatible = "fsl,qman-pfdr";
477f6972a0SKumar Gala	alloc-ranges = <0 0 0x10000 0>;
487f6972a0SKumar Gala};
497f6972a0SKumar Gala
50fb734eeeSPrabhakar Kushwaha&ifc {
51fb734eeeSPrabhakar Kushwaha	#address-cells = <2>;
52fb734eeeSPrabhakar Kushwaha	#size-cells = <1>;
53fb734eeeSPrabhakar Kushwaha	compatible = "fsl,ifc", "simple-bus";
54fb734eeeSPrabhakar Kushwaha	interrupts = <25 2 0 0>;
55fb734eeeSPrabhakar Kushwaha};
56fb734eeeSPrabhakar Kushwaha
57fb734eeeSPrabhakar Kushwaha&pci0 {
58fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
59fb734eeeSPrabhakar Kushwaha	device_type = "pci";
60fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
61fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
62fb734eeeSPrabhakar Kushwaha	bus-range = <0x0 0xff>;
63fb734eeeSPrabhakar Kushwaha	interrupts = <20 2 0 0>;
64fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
65fb734eeeSPrabhakar Kushwaha	pcie@0 {
66fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
67fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
68fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
69fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
70fb734eeeSPrabhakar Kushwaha		device_type = "pci";
71fb734eeeSPrabhakar Kushwaha		interrupts = <20 2 0 0>;
72fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
73fb734eeeSPrabhakar Kushwaha		interrupt-map = <
74fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
75fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 40 1 0 0
76fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 1 1 0 0
77fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 2 1 0 0
78fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 3 1 0 0
79fb734eeeSPrabhakar Kushwaha			>;
80fb734eeeSPrabhakar Kushwaha	};
81fb734eeeSPrabhakar Kushwaha};
82fb734eeeSPrabhakar Kushwaha
83fb734eeeSPrabhakar Kushwaha&pci1 {
84fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
85fb734eeeSPrabhakar Kushwaha	device_type = "pci";
86fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
87fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
88fb734eeeSPrabhakar Kushwaha	bus-range = <0 0xff>;
89fb734eeeSPrabhakar Kushwaha	interrupts = <21 2 0 0>;
90fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
91fb734eeeSPrabhakar Kushwaha	pcie@0 {
92fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
93fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
94fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
95fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
96fb734eeeSPrabhakar Kushwaha		device_type = "pci";
97fb734eeeSPrabhakar Kushwaha		interrupts = <21 2 0 0>;
98fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
99fb734eeeSPrabhakar Kushwaha		interrupt-map = <
100fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
101fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 41 1 0 0
102fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 5 1 0 0
103fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 6 1 0 0
104fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 7 1 0 0
105fb734eeeSPrabhakar Kushwaha			>;
106fb734eeeSPrabhakar Kushwaha	};
107fb734eeeSPrabhakar Kushwaha};
108fb734eeeSPrabhakar Kushwaha
109fb734eeeSPrabhakar Kushwaha&pci2 {
110fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
111fb734eeeSPrabhakar Kushwaha	device_type = "pci";
112fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
113fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
114fb734eeeSPrabhakar Kushwaha	bus-range = <0x0 0xff>;
115fb734eeeSPrabhakar Kushwaha	interrupts = <22 2 0 0>;
116fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
117fb734eeeSPrabhakar Kushwaha	pcie@0 {
118fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
119fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
120fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
121fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
122fb734eeeSPrabhakar Kushwaha		device_type = "pci";
123fb734eeeSPrabhakar Kushwaha		interrupts = <22 2 0 0>;
124fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
125fb734eeeSPrabhakar Kushwaha		interrupt-map = <
126fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
127fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 42 1 0 0
128fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 9 1 0 0
129fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 10 1 0 0
130fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 11 1 0 0
131fb734eeeSPrabhakar Kushwaha			>;
132fb734eeeSPrabhakar Kushwaha	};
133fb734eeeSPrabhakar Kushwaha};
134fb734eeeSPrabhakar Kushwaha
135fb734eeeSPrabhakar Kushwaha&pci3 {
136fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
137fb734eeeSPrabhakar Kushwaha	device_type = "pci";
138fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
139fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
140fb734eeeSPrabhakar Kushwaha	bus-range = <0x0 0xff>;
141fb734eeeSPrabhakar Kushwaha	interrupts = <23 2 0 0>;
142fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
143fb734eeeSPrabhakar Kushwaha	pcie@0 {
144fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
145fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
146fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
147fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
148fb734eeeSPrabhakar Kushwaha		device_type = "pci";
149fb734eeeSPrabhakar Kushwaha		interrupts = <23 2 0 0>;
150fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
151fb734eeeSPrabhakar Kushwaha		interrupt-map = <
152fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
153fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 43 1 0 0
154fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 0 1 0 0
155fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 4 1 0 0
156fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 8 1 0 0
157fb734eeeSPrabhakar Kushwaha			>;
158fb734eeeSPrabhakar Kushwaha	};
159fb734eeeSPrabhakar Kushwaha};
160fb734eeeSPrabhakar Kushwaha
161fb734eeeSPrabhakar Kushwaha&dcsr {
162fb734eeeSPrabhakar Kushwaha	#address-cells = <1>;
163fb734eeeSPrabhakar Kushwaha	#size-cells = <1>;
164fb734eeeSPrabhakar Kushwaha	compatible = "fsl,dcsr", "simple-bus";
165fb734eeeSPrabhakar Kushwaha
166fb734eeeSPrabhakar Kushwaha	dcsr-epu@0 {
167fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu";
168fb734eeeSPrabhakar Kushwaha		interrupts = <52 2 0 0
169fb734eeeSPrabhakar Kushwaha			      84 2 0 0
170fb734eeeSPrabhakar Kushwaha			      85 2 0 0>;
171fb734eeeSPrabhakar Kushwaha		reg = <0x0 0x1000>;
172fb734eeeSPrabhakar Kushwaha	};
173fb734eeeSPrabhakar Kushwaha	dcsr-npc {
174fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc";
175fb734eeeSPrabhakar Kushwaha		reg = <0x1000 0x1000 0x1002000 0x10000>;
176fb734eeeSPrabhakar Kushwaha	};
177fb734eeeSPrabhakar Kushwaha	dcsr-nxc@2000 {
178fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-nxc";
179fb734eeeSPrabhakar Kushwaha		reg = <0x2000 0x1000>;
180fb734eeeSPrabhakar Kushwaha	};
181fb734eeeSPrabhakar Kushwaha	dcsr-corenet {
182fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-corenet";
183fb734eeeSPrabhakar Kushwaha		reg = <0x8000 0x1000 0x1A000 0x1000>;
184fb734eeeSPrabhakar Kushwaha	};
185fb734eeeSPrabhakar Kushwaha	dcsr-dpaa@9000 {
186fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa";
187fb734eeeSPrabhakar Kushwaha		reg = <0x9000 0x1000>;
188fb734eeeSPrabhakar Kushwaha	};
189fb734eeeSPrabhakar Kushwaha	dcsr-ocn@11000 {
190fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn";
191fb734eeeSPrabhakar Kushwaha		reg = <0x11000 0x1000>;
192fb734eeeSPrabhakar Kushwaha	};
193fb734eeeSPrabhakar Kushwaha	dcsr-ddr@12000 {
194fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-ddr";
195fb734eeeSPrabhakar Kushwaha		dev-handle = <&ddr1>;
196fb734eeeSPrabhakar Kushwaha		reg = <0x12000 0x1000>;
197fb734eeeSPrabhakar Kushwaha	};
198fb734eeeSPrabhakar Kushwaha	dcsr-nal@18000 {
199fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal";
200fb734eeeSPrabhakar Kushwaha		reg = <0x18000 0x1000>;
201fb734eeeSPrabhakar Kushwaha	};
202fb734eeeSPrabhakar Kushwaha	dcsr-rcpm@22000 {
203fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm";
204fb734eeeSPrabhakar Kushwaha		reg = <0x22000 0x1000>;
205fb734eeeSPrabhakar Kushwaha	};
206fb734eeeSPrabhakar Kushwaha	dcsr-snpc@30000 {
207fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
208fb734eeeSPrabhakar Kushwaha		reg = <0x30000 0x1000 0x1022000 0x10000>;
209fb734eeeSPrabhakar Kushwaha	};
210fb734eeeSPrabhakar Kushwaha	dcsr-snpc@31000 {
211fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
212fb734eeeSPrabhakar Kushwaha		reg = <0x31000 0x1000 0x1042000 0x10000>;
213fb734eeeSPrabhakar Kushwaha	};
214fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@100000 {
215fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
216fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu0>;
217fb734eeeSPrabhakar Kushwaha		reg = <0x100000 0x1000 0x101000 0x1000>;
218fb734eeeSPrabhakar Kushwaha	};
219fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@108000 {
220fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
221fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu1>;
222fb734eeeSPrabhakar Kushwaha		reg = <0x108000 0x1000 0x109000 0x1000>;
223fb734eeeSPrabhakar Kushwaha	};
224fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@110000 {
225fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
226fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu2>;
227fb734eeeSPrabhakar Kushwaha		reg = <0x110000 0x1000 0x111000 0x1000>;
228fb734eeeSPrabhakar Kushwaha	};
229fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@118000 {
230fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
231fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu3>;
232fb734eeeSPrabhakar Kushwaha		reg = <0x118000 0x1000 0x119000 0x1000>;
233fb734eeeSPrabhakar Kushwaha	};
234fb734eeeSPrabhakar Kushwaha};
235fb734eeeSPrabhakar Kushwaha
2361e8ed06dSKumar Gala&bportals {
2371e8ed06dSKumar Gala	#address-cells = <0x1>;
2381e8ed06dSKumar Gala	#size-cells = <0x1>;
2391e8ed06dSKumar Gala	compatible = "simple-bus";
2401e8ed06dSKumar Gala
2411e8ed06dSKumar Gala	bman-portal@0 {
2421e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2431e8ed06dSKumar Gala		reg = <0x0 0x4000>, <0x1000000 0x1000>;
2441e8ed06dSKumar Gala		interrupts = <105 2 0 0>;
2451e8ed06dSKumar Gala	};
2461e8ed06dSKumar Gala	bman-portal@4000 {
2471e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2481e8ed06dSKumar Gala		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
2491e8ed06dSKumar Gala		interrupts = <107 2 0 0>;
2501e8ed06dSKumar Gala	};
2511e8ed06dSKumar Gala	bman-portal@8000 {
2521e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2531e8ed06dSKumar Gala		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
2541e8ed06dSKumar Gala		interrupts = <109 2 0 0>;
2551e8ed06dSKumar Gala	};
2561e8ed06dSKumar Gala	bman-portal@c000 {
2571e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2581e8ed06dSKumar Gala		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
2591e8ed06dSKumar Gala		interrupts = <111 2 0 0>;
2601e8ed06dSKumar Gala	};
2611e8ed06dSKumar Gala	bman-portal@10000 {
2621e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2631e8ed06dSKumar Gala		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
2641e8ed06dSKumar Gala		interrupts = <113 2 0 0>;
2651e8ed06dSKumar Gala	};
2661e8ed06dSKumar Gala	bman-portal@14000 {
2671e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2681e8ed06dSKumar Gala		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
2691e8ed06dSKumar Gala		interrupts = <115 2 0 0>;
2701e8ed06dSKumar Gala	};
2711e8ed06dSKumar Gala	bman-portal@18000 {
2721e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2731e8ed06dSKumar Gala		reg = <0x18000 0x4000>, <0x1006000 0x1000>;
2741e8ed06dSKumar Gala		interrupts = <117 2 0 0>;
2751e8ed06dSKumar Gala	};
2761e8ed06dSKumar Gala	bman-portal@1c000 {
2771e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2781e8ed06dSKumar Gala		reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
2791e8ed06dSKumar Gala		interrupts = <119 2 0 0>;
2801e8ed06dSKumar Gala	};
2811e8ed06dSKumar Gala	bman-portal@20000 {
2821e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2831e8ed06dSKumar Gala		reg = <0x20000 0x4000>, <0x1008000 0x1000>;
2841e8ed06dSKumar Gala		interrupts = <121 2 0 0>;
2851e8ed06dSKumar Gala	};
2861e8ed06dSKumar Gala	bman-portal@24000 {
2871e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2881e8ed06dSKumar Gala		reg = <0x24000 0x4000>, <0x1009000 0x1000>;
2891e8ed06dSKumar Gala		interrupts = <123 2 0 0>;
2901e8ed06dSKumar Gala	};
2911e8ed06dSKumar Gala};
2921e8ed06dSKumar Gala
2937f6972a0SKumar Gala&qportals {
2947f6972a0SKumar Gala	#address-cells = <0x1>;
2957f6972a0SKumar Gala	#size-cells = <0x1>;
2967f6972a0SKumar Gala	compatible = "simple-bus";
2977f6972a0SKumar Gala
2987f6972a0SKumar Gala	qportal0: qman-portal@0 {
2997f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3007f6972a0SKumar Gala		reg = <0x0 0x4000>, <0x1000000 0x1000>;
3017f6972a0SKumar Gala		interrupts = <104 0x2 0 0>;
3027f6972a0SKumar Gala		cell-index = <0x0>;
3037f6972a0SKumar Gala	};
3047f6972a0SKumar Gala	qportal1: qman-portal@4000 {
3057f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3067f6972a0SKumar Gala		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
3077f6972a0SKumar Gala		interrupts = <106 0x2 0 0>;
3087f6972a0SKumar Gala		cell-index = <0x1>;
3097f6972a0SKumar Gala	};
3107f6972a0SKumar Gala	qportal2: qman-portal@8000 {
3117f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3127f6972a0SKumar Gala		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
3137f6972a0SKumar Gala		interrupts = <108 0x2 0 0>;
3147f6972a0SKumar Gala		cell-index = <0x2>;
3157f6972a0SKumar Gala	};
3167f6972a0SKumar Gala	qportal3: qman-portal@c000 {
3177f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3187f6972a0SKumar Gala		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
3197f6972a0SKumar Gala		interrupts = <110 0x2 0 0>;
3207f6972a0SKumar Gala		cell-index = <0x3>;
3217f6972a0SKumar Gala	};
3227f6972a0SKumar Gala	qportal4: qman-portal@10000 {
3237f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3247f6972a0SKumar Gala		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
3257f6972a0SKumar Gala		interrupts = <112 0x2 0 0>;
3267f6972a0SKumar Gala		cell-index = <0x4>;
3277f6972a0SKumar Gala	};
3287f6972a0SKumar Gala	qportal5: qman-portal@14000 {
3297f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3307f6972a0SKumar Gala		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
3317f6972a0SKumar Gala		interrupts = <114 0x2 0 0>;
3327f6972a0SKumar Gala		cell-index = <0x5>;
3337f6972a0SKumar Gala	};
3347f6972a0SKumar Gala	qportal6: qman-portal@18000 {
3357f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3367f6972a0SKumar Gala		reg = <0x18000 0x4000>, <0x1006000 0x1000>;
3377f6972a0SKumar Gala		interrupts = <116 0x2 0 0>;
3387f6972a0SKumar Gala		cell-index = <0x6>;
3397f6972a0SKumar Gala	};
3407f6972a0SKumar Gala	qportal7: qman-portal@1c000 {
3417f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3427f6972a0SKumar Gala		reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
3437f6972a0SKumar Gala		interrupts = <118 0x2 0 0>;
3447f6972a0SKumar Gala		cell-index = <0x7>;
3457f6972a0SKumar Gala	};
3467f6972a0SKumar Gala	qportal8: qman-portal@20000 {
3477f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3487f6972a0SKumar Gala		reg = <0x20000 0x4000>, <0x1008000 0x1000>;
3497f6972a0SKumar Gala		interrupts = <120 0x2 0 0>;
3507f6972a0SKumar Gala		cell-index = <0x8>;
3517f6972a0SKumar Gala	};
3527f6972a0SKumar Gala	qportal9: qman-portal@24000 {
3537f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3547f6972a0SKumar Gala		reg = <0x24000 0x4000>, <0x1009000 0x1000>;
3557f6972a0SKumar Gala		interrupts = <122 0x2 0 0>;
3567f6972a0SKumar Gala		cell-index = <0x9>;
3577f6972a0SKumar Gala	};
3587f6972a0SKumar Gala};
3597f6972a0SKumar Gala
360fb734eeeSPrabhakar Kushwaha&soc {
361fb734eeeSPrabhakar Kushwaha	#address-cells = <1>;
362fb734eeeSPrabhakar Kushwaha	#size-cells = <1>;
363fb734eeeSPrabhakar Kushwaha	device_type = "soc";
364fb734eeeSPrabhakar Kushwaha	compatible = "simple-bus";
365fb734eeeSPrabhakar Kushwaha
366fb734eeeSPrabhakar Kushwaha	soc-sram-error {
367fb734eeeSPrabhakar Kushwaha		compatible = "fsl,soc-sram-error";
368fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 29>;
369fb734eeeSPrabhakar Kushwaha	};
370fb734eeeSPrabhakar Kushwaha
371fb734eeeSPrabhakar Kushwaha	corenet-law@0 {
372fb734eeeSPrabhakar Kushwaha		compatible = "fsl,corenet-law";
373fb734eeeSPrabhakar Kushwaha		reg = <0x0 0x1000>;
374fb734eeeSPrabhakar Kushwaha		fsl,num-laws = <16>;
375fb734eeeSPrabhakar Kushwaha	};
376fb734eeeSPrabhakar Kushwaha
377fb734eeeSPrabhakar Kushwaha	ddr1: memory-controller@8000 {
378fb734eeeSPrabhakar Kushwaha		compatible = "fsl,qoriq-memory-controller-v5.0",
379fb734eeeSPrabhakar Kushwaha				"fsl,qoriq-memory-controller";
380fb734eeeSPrabhakar Kushwaha		reg = <0x8000 0x1000>;
381fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 23>;
382fb734eeeSPrabhakar Kushwaha	};
383fb734eeeSPrabhakar Kushwaha
384fb734eeeSPrabhakar Kushwaha	cpc: l3-cache-controller@10000 {
385fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-l3-cache-controller", "cache";
386fb734eeeSPrabhakar Kushwaha		reg = <0x10000 0x1000>;
387fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 27>;
388fb734eeeSPrabhakar Kushwaha	};
389fb734eeeSPrabhakar Kushwaha
390fb734eeeSPrabhakar Kushwaha	corenet-cf@18000 {
391fb734eeeSPrabhakar Kushwaha		compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
392fb734eeeSPrabhakar Kushwaha		reg = <0x18000 0x1000>;
393fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 31>;
394fb734eeeSPrabhakar Kushwaha		fsl,ccf-num-csdids = <32>;
395fb734eeeSPrabhakar Kushwaha		fsl,ccf-num-snoopids = <32>;
396fb734eeeSPrabhakar Kushwaha	};
397fb734eeeSPrabhakar Kushwaha
398fb734eeeSPrabhakar Kushwaha	iommu@20000 {
399fb734eeeSPrabhakar Kushwaha		compatible = "fsl,pamu-v1.0", "fsl,pamu";
400fb734eeeSPrabhakar Kushwaha		reg = <0x20000 0x1000>;
401fb734eeeSPrabhakar Kushwaha		ranges = <0 0x20000 0x1000>;
402fb734eeeSPrabhakar Kushwaha		#address-cells = <1>;
403fb734eeeSPrabhakar Kushwaha		#size-cells = <1>;
404fb734eeeSPrabhakar Kushwaha		interrupts = <
405fb734eeeSPrabhakar Kushwaha			24 2 0 0
406fb734eeeSPrabhakar Kushwaha			16 2 1 30>;
407fb734eeeSPrabhakar Kushwaha		pamu0: pamu@0 {
408fb734eeeSPrabhakar Kushwaha			reg = <0 0x1000>;
409fb734eeeSPrabhakar Kushwaha			fsl,primary-cache-geometry = <128 1>;
410fb734eeeSPrabhakar Kushwaha			fsl,secondary-cache-geometry = <16 2>;
411fb734eeeSPrabhakar Kushwaha		};
412fb734eeeSPrabhakar Kushwaha	};
413fb734eeeSPrabhakar Kushwaha
414fb734eeeSPrabhakar Kushwaha/include/ "qoriq-mpic.dtsi"
415fb734eeeSPrabhakar Kushwaha
416fb734eeeSPrabhakar Kushwaha	guts: global-utilities@e0000 {
417fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0";
418fb734eeeSPrabhakar Kushwaha		reg = <0xe0000 0xe00>;
419fb734eeeSPrabhakar Kushwaha		fsl,has-rstcr;
420fb734eeeSPrabhakar Kushwaha		fsl,liodn-bits = <12>;
421fb734eeeSPrabhakar Kushwaha	};
422fb734eeeSPrabhakar Kushwaha
423eaffcb0fSEmil Medve/include/ "qoriq-clockgen2.dtsi"
424eaffcb0fSEmil Medve	global-utilities@e1000 {
425fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
426fb734eeeSPrabhakar Kushwaha
427fb734eeeSPrabhakar Kushwaha		mux0: mux0@0 {
428fb734eeeSPrabhakar Kushwaha			#clock-cells = <0>;
429fb734eeeSPrabhakar Kushwaha			reg = <0x0 4>;
430fb734eeeSPrabhakar Kushwaha			compatible = "fsl,qoriq-core-mux-2.0";
431fb734eeeSPrabhakar Kushwaha			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
432fb734eeeSPrabhakar Kushwaha				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
433fb734eeeSPrabhakar Kushwaha			clock-names = "pll0", "pll0-div2", "pll1-div4",
434fb734eeeSPrabhakar Kushwaha				"pll1", "pll1-div2", "pll1-div4";
435fb734eeeSPrabhakar Kushwaha			clock-output-names = "cmux0";
436fb734eeeSPrabhakar Kushwaha		};
437fb734eeeSPrabhakar Kushwaha
438fb734eeeSPrabhakar Kushwaha		mux1: mux1@20 {
439fb734eeeSPrabhakar Kushwaha			#clock-cells = <0>;
440fb734eeeSPrabhakar Kushwaha			reg = <0x20 4>;
441fb734eeeSPrabhakar Kushwaha			compatible = "fsl,qoriq-core-mux-2.0";
442fb734eeeSPrabhakar Kushwaha			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
443fb734eeeSPrabhakar Kushwaha				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
444fb734eeeSPrabhakar Kushwaha			clock-names = "pll0", "pll0-div2", "pll1-div4",
445fb734eeeSPrabhakar Kushwaha				"pll1", "pll1-div2", "pll1-div4";
446fb734eeeSPrabhakar Kushwaha			clock-output-names = "cmux1";
447fb734eeeSPrabhakar Kushwaha		};
448fb734eeeSPrabhakar Kushwaha
449fb734eeeSPrabhakar Kushwaha		mux2: mux2@40 {
450fb734eeeSPrabhakar Kushwaha			#clock-cells = <0>;
451fb734eeeSPrabhakar Kushwaha			reg = <0x40 4>;
452fb734eeeSPrabhakar Kushwaha			compatible = "fsl,qoriq-core-mux-2.0";
453fb734eeeSPrabhakar Kushwaha			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
454fb734eeeSPrabhakar Kushwaha				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
455fb734eeeSPrabhakar Kushwaha			clock-names = "pll0", "pll0-div2", "pll1-div4",
456fb734eeeSPrabhakar Kushwaha				"pll1", "pll1-div2", "pll1-div4";
457fb734eeeSPrabhakar Kushwaha			clock-output-names = "cmux2";
458fb734eeeSPrabhakar Kushwaha		};
459fb734eeeSPrabhakar Kushwaha
460fb734eeeSPrabhakar Kushwaha		mux3: mux3@60 {
461fb734eeeSPrabhakar Kushwaha			#clock-cells = <0>;
462fb734eeeSPrabhakar Kushwaha			reg = <0x60 4>;
463fb734eeeSPrabhakar Kushwaha			compatible = "fsl,qoriq-core-mux-2.0";
464fb734eeeSPrabhakar Kushwaha			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
465fb734eeeSPrabhakar Kushwaha				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
466fb734eeeSPrabhakar Kushwaha			clock-names = "pll0_0", "pll0_1", "pll0_2",
467fb734eeeSPrabhakar Kushwaha				"pll1_0", "pll1_1", "pll1_2";
468fb734eeeSPrabhakar Kushwaha			clock-output-names = "cmux3";
469fb734eeeSPrabhakar Kushwaha		};
470fb734eeeSPrabhakar Kushwaha	};
471fb734eeeSPrabhakar Kushwaha
472fb734eeeSPrabhakar Kushwaha	rcpm: global-utilities@e2000 {
473fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.0";
474fb734eeeSPrabhakar Kushwaha		reg = <0xe2000 0x1000>;
475fb734eeeSPrabhakar Kushwaha	};
476fb734eeeSPrabhakar Kushwaha
477fb734eeeSPrabhakar Kushwaha	sfp: sfp@e8000 {
478fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-sfp";
479fb734eeeSPrabhakar Kushwaha		reg	   = <0xe8000 0x1000>;
480fb734eeeSPrabhakar Kushwaha	};
481fb734eeeSPrabhakar Kushwaha
482fb734eeeSPrabhakar Kushwaha	serdes: serdes@ea000 {
483fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-serdes";
484fb734eeeSPrabhakar Kushwaha		reg	   = <0xea000 0x4000>;
485fb734eeeSPrabhakar Kushwaha	};
486fb734eeeSPrabhakar Kushwaha
487163e60c1SWang Dongsheng	scfg: global-utilities@fc000 {
488163e60c1SWang Dongsheng		compatible = "fsl,t1040-scfg";
489163e60c1SWang Dongsheng		reg = <0xfc000 0x1000>;
490163e60c1SWang Dongsheng	};
491163e60c1SWang Dongsheng
492fb734eeeSPrabhakar Kushwaha/include/ "elo3-dma-0.dtsi"
493fb734eeeSPrabhakar Kushwaha/include/ "elo3-dma-1.dtsi"
494fb734eeeSPrabhakar Kushwaha/include/ "qoriq-espi-0.dtsi"
495fb734eeeSPrabhakar Kushwaha	spi@110000 {
496fb734eeeSPrabhakar Kushwaha		fsl,espi-num-chipselects = <4>;
497fb734eeeSPrabhakar Kushwaha	};
498fb734eeeSPrabhakar Kushwaha
499fb734eeeSPrabhakar Kushwaha/include/ "qoriq-esdhc-0.dtsi"
500fb734eeeSPrabhakar Kushwaha	sdhc@114000 {
501fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-esdhc", "fsl,esdhc";
502fb734eeeSPrabhakar Kushwaha		fsl,iommu-parent = <&pamu0>;
503fb734eeeSPrabhakar Kushwaha		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
504fb734eeeSPrabhakar Kushwaha		sdhci,auto-cmd12;
505fb734eeeSPrabhakar Kushwaha	};
506fb734eeeSPrabhakar Kushwaha/include/ "qoriq-i2c-0.dtsi"
507fb734eeeSPrabhakar Kushwaha/include/ "qoriq-i2c-1.dtsi"
508fb734eeeSPrabhakar Kushwaha/include/ "qoriq-duart-0.dtsi"
509fb734eeeSPrabhakar Kushwaha/include/ "qoriq-duart-1.dtsi"
510fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-0.dtsi"
511fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-1.dtsi"
512fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-2.dtsi"
513fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-3.dtsi"
514fb734eeeSPrabhakar Kushwaha/include/ "qoriq-usb2-mph-0.dtsi"
515fb734eeeSPrabhakar Kushwaha		usb0: usb@210000 {
516fb734eeeSPrabhakar Kushwaha			compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
517fb734eeeSPrabhakar Kushwaha			fsl,iommu-parent = <&pamu0>;
518fb734eeeSPrabhakar Kushwaha			fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
519fb734eeeSPrabhakar Kushwaha			phy_type = "utmi";
520fb734eeeSPrabhakar Kushwaha			port0;
521fb734eeeSPrabhakar Kushwaha		};
522fb734eeeSPrabhakar Kushwaha/include/ "qoriq-usb2-dr-0.dtsi"
523fb734eeeSPrabhakar Kushwaha		usb1: usb@211000 {
524fb734eeeSPrabhakar Kushwaha			compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
525fb734eeeSPrabhakar Kushwaha			fsl,iommu-parent = <&pamu0>;
526fb734eeeSPrabhakar Kushwaha			fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
527fb734eeeSPrabhakar Kushwaha			dr_mode = "host";
528fb734eeeSPrabhakar Kushwaha			phy_type = "utmi";
529fb734eeeSPrabhakar Kushwaha		};
530fb734eeeSPrabhakar Kushwaha
531fb734eeeSPrabhakar Kushwaha	display@180000 {
532fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-diu", "fsl,diu";
533fb734eeeSPrabhakar Kushwaha		reg = <0x180000 1000>;
534fb734eeeSPrabhakar Kushwaha		interrupts = <74 2 0 0>;
535fb734eeeSPrabhakar Kushwaha	};
536fb734eeeSPrabhakar Kushwaha
537fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sata2-0.dtsi"
538fb734eeeSPrabhakar Kushwaha	sata@220000 {
539fb734eeeSPrabhakar Kushwaha		fsl,iommu-parent = <&pamu0>;
540fb734eeeSPrabhakar Kushwaha		fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
541fb734eeeSPrabhakar Kushwaha	};
542fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sata2-1.dtsi"
543fb734eeeSPrabhakar Kushwaha	sata@221000 {
544fb734eeeSPrabhakar Kushwaha		fsl,iommu-parent = <&pamu0>;
545fb734eeeSPrabhakar Kushwaha		fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
546fb734eeeSPrabhakar Kushwaha	};
547fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sec5.0-0.dtsi"
5487f6972a0SKumar Gala/include/ "qoriq-qman3.dtsi"
5491e8ed06dSKumar Gala/include/ "qoriq-bman1.dtsi"
550fb734eeeSPrabhakar Kushwaha};
551