1fb734eeeSPrabhakar Kushwaha/*
2fb734eeeSPrabhakar Kushwaha * T1040 Silicon/SoC Device Tree Source (post include)
3fb734eeeSPrabhakar Kushwaha *
41e8ed06dSKumar Gala * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5fb734eeeSPrabhakar Kushwaha *
6fb734eeeSPrabhakar Kushwaha * Redistribution and use in source and binary forms, with or without
7fb734eeeSPrabhakar Kushwaha * modification, are permitted provided that the following conditions are met:
8fb734eeeSPrabhakar Kushwaha *     * Redistributions of source code must retain the above copyright
9fb734eeeSPrabhakar Kushwaha *	 notice, this list of conditions and the following disclaimer.
10fb734eeeSPrabhakar Kushwaha *     * Redistributions in binary form must reproduce the above copyright
11fb734eeeSPrabhakar Kushwaha *	 notice, this list of conditions and the following disclaimer in the
12fb734eeeSPrabhakar Kushwaha *	 documentation and/or other materials provided with the distribution.
13fb734eeeSPrabhakar Kushwaha *     * Neither the name of Freescale Semiconductor nor the
14fb734eeeSPrabhakar Kushwaha *	 names of its contributors may be used to endorse or promote products
15fb734eeeSPrabhakar Kushwaha *	 derived from this software without specific prior written permission.
16fb734eeeSPrabhakar Kushwaha *
17fb734eeeSPrabhakar Kushwaha *
18fb734eeeSPrabhakar Kushwaha * ALTERNATIVELY, this software may be distributed under the terms of the
19fb734eeeSPrabhakar Kushwaha * GNU General Public License ("GPL") as published by the Free Software
20fb734eeeSPrabhakar Kushwaha * Foundation, either version 2 of that License or (at your option) any
21fb734eeeSPrabhakar Kushwaha * later version.
22fb734eeeSPrabhakar Kushwaha *
23fb734eeeSPrabhakar Kushwaha * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24fb734eeeSPrabhakar Kushwaha * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25fb734eeeSPrabhakar Kushwaha * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26fb734eeeSPrabhakar Kushwaha * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27fb734eeeSPrabhakar Kushwaha * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28fb734eeeSPrabhakar Kushwaha * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29fb734eeeSPrabhakar Kushwaha * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30fb734eeeSPrabhakar Kushwaha * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31fb734eeeSPrabhakar Kushwaha * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32fb734eeeSPrabhakar Kushwaha * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33fb734eeeSPrabhakar Kushwaha */
34fb734eeeSPrabhakar Kushwaha
35be489a39SHongtao Jia#include <dt-bindings/thermal/thermal.h>
36be489a39SHongtao Jia
371e8ed06dSKumar Gala&bman_fbpr {
381e8ed06dSKumar Gala	compatible = "fsl,bman-fbpr";
391e8ed06dSKumar Gala	alloc-ranges = <0 0 0x10000 0>;
401e8ed06dSKumar Gala};
411e8ed06dSKumar Gala
427f6972a0SKumar Gala&qman_fqd {
437f6972a0SKumar Gala	compatible = "fsl,qman-fqd";
447f6972a0SKumar Gala	alloc-ranges = <0 0 0x10000 0>;
457f6972a0SKumar Gala};
467f6972a0SKumar Gala
477f6972a0SKumar Gala&qman_pfdr {
487f6972a0SKumar Gala	compatible = "fsl,qman-pfdr";
497f6972a0SKumar Gala	alloc-ranges = <0 0 0x10000 0>;
507f6972a0SKumar Gala};
517f6972a0SKumar Gala
52fb734eeeSPrabhakar Kushwaha&ifc {
53fb734eeeSPrabhakar Kushwaha	#address-cells = <2>;
54fb734eeeSPrabhakar Kushwaha	#size-cells = <1>;
55fb734eeeSPrabhakar Kushwaha	compatible = "fsl,ifc", "simple-bus";
56fb734eeeSPrabhakar Kushwaha	interrupts = <25 2 0 0>;
57fb734eeeSPrabhakar Kushwaha};
58fb734eeeSPrabhakar Kushwaha
59fb734eeeSPrabhakar Kushwaha&pci0 {
60fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
61fb734eeeSPrabhakar Kushwaha	device_type = "pci";
62fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
63fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
64fb734eeeSPrabhakar Kushwaha	bus-range = <0x0 0xff>;
65fb734eeeSPrabhakar Kushwaha	interrupts = <20 2 0 0>;
66fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
67fb734eeeSPrabhakar Kushwaha	pcie@0 {
68fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
69fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
70fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
71fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
72fb734eeeSPrabhakar Kushwaha		device_type = "pci";
73fb734eeeSPrabhakar Kushwaha		interrupts = <20 2 0 0>;
74fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
75fb734eeeSPrabhakar Kushwaha		interrupt-map = <
76fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
77fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 40 1 0 0
78fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 1 1 0 0
79fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 2 1 0 0
80fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 3 1 0 0
81fb734eeeSPrabhakar Kushwaha			>;
82fb734eeeSPrabhakar Kushwaha	};
83fb734eeeSPrabhakar Kushwaha};
84fb734eeeSPrabhakar Kushwaha
85fb734eeeSPrabhakar Kushwaha&pci1 {
86fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
87fb734eeeSPrabhakar Kushwaha	device_type = "pci";
88fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
89fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
90fb734eeeSPrabhakar Kushwaha	bus-range = <0 0xff>;
91fb734eeeSPrabhakar Kushwaha	interrupts = <21 2 0 0>;
92fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
93fb734eeeSPrabhakar Kushwaha	pcie@0 {
94fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
95fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
96fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
97fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
98fb734eeeSPrabhakar Kushwaha		device_type = "pci";
99fb734eeeSPrabhakar Kushwaha		interrupts = <21 2 0 0>;
100fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
101fb734eeeSPrabhakar Kushwaha		interrupt-map = <
102fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
103fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 41 1 0 0
104fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 5 1 0 0
105fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 6 1 0 0
106fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 7 1 0 0
107fb734eeeSPrabhakar Kushwaha			>;
108fb734eeeSPrabhakar Kushwaha	};
109fb734eeeSPrabhakar Kushwaha};
110fb734eeeSPrabhakar Kushwaha
111fb734eeeSPrabhakar Kushwaha&pci2 {
112fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
113fb734eeeSPrabhakar Kushwaha	device_type = "pci";
114fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
115fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
116fb734eeeSPrabhakar Kushwaha	bus-range = <0x0 0xff>;
117fb734eeeSPrabhakar Kushwaha	interrupts = <22 2 0 0>;
118fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
119fb734eeeSPrabhakar Kushwaha	pcie@0 {
120fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
121fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
122fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
123fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
124fb734eeeSPrabhakar Kushwaha		device_type = "pci";
125fb734eeeSPrabhakar Kushwaha		interrupts = <22 2 0 0>;
126fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
127fb734eeeSPrabhakar Kushwaha		interrupt-map = <
128fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
129fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 42 1 0 0
130fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 9 1 0 0
131fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 10 1 0 0
132fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 11 1 0 0
133fb734eeeSPrabhakar Kushwaha			>;
134fb734eeeSPrabhakar Kushwaha	};
135fb734eeeSPrabhakar Kushwaha};
136fb734eeeSPrabhakar Kushwaha
137fb734eeeSPrabhakar Kushwaha&pci3 {
138fb734eeeSPrabhakar Kushwaha	compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
139fb734eeeSPrabhakar Kushwaha	device_type = "pci";
140fb734eeeSPrabhakar Kushwaha	#size-cells = <2>;
141fb734eeeSPrabhakar Kushwaha	#address-cells = <3>;
142fb734eeeSPrabhakar Kushwaha	bus-range = <0x0 0xff>;
143fb734eeeSPrabhakar Kushwaha	interrupts = <23 2 0 0>;
144fb734eeeSPrabhakar Kushwaha	fsl,iommu-parent = <&pamu0>;
145fb734eeeSPrabhakar Kushwaha	pcie@0 {
146fb734eeeSPrabhakar Kushwaha		reg = <0 0 0 0 0>;
147fb734eeeSPrabhakar Kushwaha		#interrupt-cells = <1>;
148fb734eeeSPrabhakar Kushwaha		#size-cells = <2>;
149fb734eeeSPrabhakar Kushwaha		#address-cells = <3>;
150fb734eeeSPrabhakar Kushwaha		device_type = "pci";
151fb734eeeSPrabhakar Kushwaha		interrupts = <23 2 0 0>;
152fb734eeeSPrabhakar Kushwaha		interrupt-map-mask = <0xf800 0 0 7>;
153fb734eeeSPrabhakar Kushwaha		interrupt-map = <
154fb734eeeSPrabhakar Kushwaha			/* IDSEL 0x0 */
155fb734eeeSPrabhakar Kushwaha			0000 0 0 1 &mpic 43 1 0 0
156fb734eeeSPrabhakar Kushwaha			0000 0 0 2 &mpic 0 1 0 0
157fb734eeeSPrabhakar Kushwaha			0000 0 0 3 &mpic 4 1 0 0
158fb734eeeSPrabhakar Kushwaha			0000 0 0 4 &mpic 8 1 0 0
159fb734eeeSPrabhakar Kushwaha			>;
160fb734eeeSPrabhakar Kushwaha	};
161fb734eeeSPrabhakar Kushwaha};
162fb734eeeSPrabhakar Kushwaha
163fb734eeeSPrabhakar Kushwaha&dcsr {
164fb734eeeSPrabhakar Kushwaha	#address-cells = <1>;
165fb734eeeSPrabhakar Kushwaha	#size-cells = <1>;
166fb734eeeSPrabhakar Kushwaha	compatible = "fsl,dcsr", "simple-bus";
167fb734eeeSPrabhakar Kushwaha
168fb734eeeSPrabhakar Kushwaha	dcsr-epu@0 {
169fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu";
170fb734eeeSPrabhakar Kushwaha		interrupts = <52 2 0 0
171fb734eeeSPrabhakar Kushwaha			      84 2 0 0
172fb734eeeSPrabhakar Kushwaha			      85 2 0 0>;
173fb734eeeSPrabhakar Kushwaha		reg = <0x0 0x1000>;
174fb734eeeSPrabhakar Kushwaha	};
175fb734eeeSPrabhakar Kushwaha	dcsr-npc {
176fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc";
177fb734eeeSPrabhakar Kushwaha		reg = <0x1000 0x1000 0x1002000 0x10000>;
178fb734eeeSPrabhakar Kushwaha	};
179fb734eeeSPrabhakar Kushwaha	dcsr-nxc@2000 {
180fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-nxc";
181fb734eeeSPrabhakar Kushwaha		reg = <0x2000 0x1000>;
182fb734eeeSPrabhakar Kushwaha	};
183fb734eeeSPrabhakar Kushwaha	dcsr-corenet {
184fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-corenet";
185fb734eeeSPrabhakar Kushwaha		reg = <0x8000 0x1000 0x1A000 0x1000>;
186fb734eeeSPrabhakar Kushwaha	};
187fb734eeeSPrabhakar Kushwaha	dcsr-dpaa@9000 {
188fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa";
189fb734eeeSPrabhakar Kushwaha		reg = <0x9000 0x1000>;
190fb734eeeSPrabhakar Kushwaha	};
191fb734eeeSPrabhakar Kushwaha	dcsr-ocn@11000 {
192fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn";
193fb734eeeSPrabhakar Kushwaha		reg = <0x11000 0x1000>;
194fb734eeeSPrabhakar Kushwaha	};
195fb734eeeSPrabhakar Kushwaha	dcsr-ddr@12000 {
196fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-ddr";
197fb734eeeSPrabhakar Kushwaha		dev-handle = <&ddr1>;
198fb734eeeSPrabhakar Kushwaha		reg = <0x12000 0x1000>;
199fb734eeeSPrabhakar Kushwaha	};
200fb734eeeSPrabhakar Kushwaha	dcsr-nal@18000 {
201fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal";
202fb734eeeSPrabhakar Kushwaha		reg = <0x18000 0x1000>;
203fb734eeeSPrabhakar Kushwaha	};
204fb734eeeSPrabhakar Kushwaha	dcsr-rcpm@22000 {
205fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm";
206fb734eeeSPrabhakar Kushwaha		reg = <0x22000 0x1000>;
207fb734eeeSPrabhakar Kushwaha	};
208fb734eeeSPrabhakar Kushwaha	dcsr-snpc@30000 {
209fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
210fb734eeeSPrabhakar Kushwaha		reg = <0x30000 0x1000 0x1022000 0x10000>;
211fb734eeeSPrabhakar Kushwaha	};
212fb734eeeSPrabhakar Kushwaha	dcsr-snpc@31000 {
213fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
214fb734eeeSPrabhakar Kushwaha		reg = <0x31000 0x1000 0x1042000 0x10000>;
215fb734eeeSPrabhakar Kushwaha	};
216fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@100000 {
217fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
218fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu0>;
219fb734eeeSPrabhakar Kushwaha		reg = <0x100000 0x1000 0x101000 0x1000>;
220fb734eeeSPrabhakar Kushwaha	};
221fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@108000 {
222fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
223fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu1>;
224fb734eeeSPrabhakar Kushwaha		reg = <0x108000 0x1000 0x109000 0x1000>;
225fb734eeeSPrabhakar Kushwaha	};
226fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@110000 {
227fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
228fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu2>;
229fb734eeeSPrabhakar Kushwaha		reg = <0x110000 0x1000 0x111000 0x1000>;
230fb734eeeSPrabhakar Kushwaha	};
231fb734eeeSPrabhakar Kushwaha	dcsr-cpu-sb-proxy@118000 {
232fb734eeeSPrabhakar Kushwaha		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
233fb734eeeSPrabhakar Kushwaha		cpu-handle = <&cpu3>;
234fb734eeeSPrabhakar Kushwaha		reg = <0x118000 0x1000 0x119000 0x1000>;
235fb734eeeSPrabhakar Kushwaha	};
236fb734eeeSPrabhakar Kushwaha};
237fb734eeeSPrabhakar Kushwaha
2381e8ed06dSKumar Gala&bportals {
2391e8ed06dSKumar Gala	#address-cells = <0x1>;
2401e8ed06dSKumar Gala	#size-cells = <0x1>;
2411e8ed06dSKumar Gala	compatible = "simple-bus";
2421e8ed06dSKumar Gala
2431e8ed06dSKumar Gala	bman-portal@0 {
2441e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2451e8ed06dSKumar Gala		reg = <0x0 0x4000>, <0x1000000 0x1000>;
2461e8ed06dSKumar Gala		interrupts = <105 2 0 0>;
2471e8ed06dSKumar Gala	};
2481e8ed06dSKumar Gala	bman-portal@4000 {
2491e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2501e8ed06dSKumar Gala		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
2511e8ed06dSKumar Gala		interrupts = <107 2 0 0>;
2521e8ed06dSKumar Gala	};
2531e8ed06dSKumar Gala	bman-portal@8000 {
2541e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2551e8ed06dSKumar Gala		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
2561e8ed06dSKumar Gala		interrupts = <109 2 0 0>;
2571e8ed06dSKumar Gala	};
2581e8ed06dSKumar Gala	bman-portal@c000 {
2591e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2601e8ed06dSKumar Gala		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
2611e8ed06dSKumar Gala		interrupts = <111 2 0 0>;
2621e8ed06dSKumar Gala	};
2631e8ed06dSKumar Gala	bman-portal@10000 {
2641e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2651e8ed06dSKumar Gala		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
2661e8ed06dSKumar Gala		interrupts = <113 2 0 0>;
2671e8ed06dSKumar Gala	};
2681e8ed06dSKumar Gala	bman-portal@14000 {
2691e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2701e8ed06dSKumar Gala		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
2711e8ed06dSKumar Gala		interrupts = <115 2 0 0>;
2721e8ed06dSKumar Gala	};
2731e8ed06dSKumar Gala	bman-portal@18000 {
2741e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2751e8ed06dSKumar Gala		reg = <0x18000 0x4000>, <0x1006000 0x1000>;
2761e8ed06dSKumar Gala		interrupts = <117 2 0 0>;
2771e8ed06dSKumar Gala	};
2781e8ed06dSKumar Gala	bman-portal@1c000 {
2791e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2801e8ed06dSKumar Gala		reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
2811e8ed06dSKumar Gala		interrupts = <119 2 0 0>;
2821e8ed06dSKumar Gala	};
2831e8ed06dSKumar Gala	bman-portal@20000 {
2841e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2851e8ed06dSKumar Gala		reg = <0x20000 0x4000>, <0x1008000 0x1000>;
2861e8ed06dSKumar Gala		interrupts = <121 2 0 0>;
2871e8ed06dSKumar Gala	};
2881e8ed06dSKumar Gala	bman-portal@24000 {
2891e8ed06dSKumar Gala		compatible = "fsl,bman-portal";
2901e8ed06dSKumar Gala		reg = <0x24000 0x4000>, <0x1009000 0x1000>;
2911e8ed06dSKumar Gala		interrupts = <123 2 0 0>;
2921e8ed06dSKumar Gala	};
2931e8ed06dSKumar Gala};
2941e8ed06dSKumar Gala
2957f6972a0SKumar Gala&qportals {
2967f6972a0SKumar Gala	#address-cells = <0x1>;
2977f6972a0SKumar Gala	#size-cells = <0x1>;
2987f6972a0SKumar Gala	compatible = "simple-bus";
2997f6972a0SKumar Gala
3007f6972a0SKumar Gala	qportal0: qman-portal@0 {
3017f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3027f6972a0SKumar Gala		reg = <0x0 0x4000>, <0x1000000 0x1000>;
3037f6972a0SKumar Gala		interrupts = <104 0x2 0 0>;
3047f6972a0SKumar Gala		cell-index = <0x0>;
3057f6972a0SKumar Gala	};
3067f6972a0SKumar Gala	qportal1: qman-portal@4000 {
3077f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3087f6972a0SKumar Gala		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
3097f6972a0SKumar Gala		interrupts = <106 0x2 0 0>;
3107f6972a0SKumar Gala		cell-index = <0x1>;
3117f6972a0SKumar Gala	};
3127f6972a0SKumar Gala	qportal2: qman-portal@8000 {
3137f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3147f6972a0SKumar Gala		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
3157f6972a0SKumar Gala		interrupts = <108 0x2 0 0>;
3167f6972a0SKumar Gala		cell-index = <0x2>;
3177f6972a0SKumar Gala	};
3187f6972a0SKumar Gala	qportal3: qman-portal@c000 {
3197f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3207f6972a0SKumar Gala		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
3217f6972a0SKumar Gala		interrupts = <110 0x2 0 0>;
3227f6972a0SKumar Gala		cell-index = <0x3>;
3237f6972a0SKumar Gala	};
3247f6972a0SKumar Gala	qportal4: qman-portal@10000 {
3257f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3267f6972a0SKumar Gala		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
3277f6972a0SKumar Gala		interrupts = <112 0x2 0 0>;
3287f6972a0SKumar Gala		cell-index = <0x4>;
3297f6972a0SKumar Gala	};
3307f6972a0SKumar Gala	qportal5: qman-portal@14000 {
3317f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3327f6972a0SKumar Gala		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
3337f6972a0SKumar Gala		interrupts = <114 0x2 0 0>;
3347f6972a0SKumar Gala		cell-index = <0x5>;
3357f6972a0SKumar Gala	};
3367f6972a0SKumar Gala	qportal6: qman-portal@18000 {
3377f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3387f6972a0SKumar Gala		reg = <0x18000 0x4000>, <0x1006000 0x1000>;
3397f6972a0SKumar Gala		interrupts = <116 0x2 0 0>;
3407f6972a0SKumar Gala		cell-index = <0x6>;
3417f6972a0SKumar Gala	};
3427f6972a0SKumar Gala	qportal7: qman-portal@1c000 {
3437f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3447f6972a0SKumar Gala		reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
3457f6972a0SKumar Gala		interrupts = <118 0x2 0 0>;
3467f6972a0SKumar Gala		cell-index = <0x7>;
3477f6972a0SKumar Gala	};
3487f6972a0SKumar Gala	qportal8: qman-portal@20000 {
3497f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3507f6972a0SKumar Gala		reg = <0x20000 0x4000>, <0x1008000 0x1000>;
3517f6972a0SKumar Gala		interrupts = <120 0x2 0 0>;
3527f6972a0SKumar Gala		cell-index = <0x8>;
3537f6972a0SKumar Gala	};
3547f6972a0SKumar Gala	qportal9: qman-portal@24000 {
3557f6972a0SKumar Gala		compatible = "fsl,qman-portal";
3567f6972a0SKumar Gala		reg = <0x24000 0x4000>, <0x1009000 0x1000>;
3577f6972a0SKumar Gala		interrupts = <122 0x2 0 0>;
3587f6972a0SKumar Gala		cell-index = <0x9>;
3597f6972a0SKumar Gala	};
3607f6972a0SKumar Gala};
3617f6972a0SKumar Gala
362fb734eeeSPrabhakar Kushwaha&soc {
363fb734eeeSPrabhakar Kushwaha	#address-cells = <1>;
364fb734eeeSPrabhakar Kushwaha	#size-cells = <1>;
365fb734eeeSPrabhakar Kushwaha	device_type = "soc";
366fb734eeeSPrabhakar Kushwaha	compatible = "simple-bus";
367fb734eeeSPrabhakar Kushwaha
368fb734eeeSPrabhakar Kushwaha	soc-sram-error {
369fb734eeeSPrabhakar Kushwaha		compatible = "fsl,soc-sram-error";
370fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 29>;
371fb734eeeSPrabhakar Kushwaha	};
372fb734eeeSPrabhakar Kushwaha
373fb734eeeSPrabhakar Kushwaha	corenet-law@0 {
374fb734eeeSPrabhakar Kushwaha		compatible = "fsl,corenet-law";
375fb734eeeSPrabhakar Kushwaha		reg = <0x0 0x1000>;
376fb734eeeSPrabhakar Kushwaha		fsl,num-laws = <16>;
377fb734eeeSPrabhakar Kushwaha	};
378fb734eeeSPrabhakar Kushwaha
379fb734eeeSPrabhakar Kushwaha	ddr1: memory-controller@8000 {
380fb734eeeSPrabhakar Kushwaha		compatible = "fsl,qoriq-memory-controller-v5.0",
381fb734eeeSPrabhakar Kushwaha				"fsl,qoriq-memory-controller";
382fb734eeeSPrabhakar Kushwaha		reg = <0x8000 0x1000>;
383fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 23>;
384fb734eeeSPrabhakar Kushwaha	};
385fb734eeeSPrabhakar Kushwaha
386fb734eeeSPrabhakar Kushwaha	cpc: l3-cache-controller@10000 {
387fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-l3-cache-controller", "cache";
388fb734eeeSPrabhakar Kushwaha		reg = <0x10000 0x1000>;
389fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 27>;
390fb734eeeSPrabhakar Kushwaha	};
391fb734eeeSPrabhakar Kushwaha
392fb734eeeSPrabhakar Kushwaha	corenet-cf@18000 {
393fb734eeeSPrabhakar Kushwaha		compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
394fb734eeeSPrabhakar Kushwaha		reg = <0x18000 0x1000>;
395fb734eeeSPrabhakar Kushwaha		interrupts = <16 2 1 31>;
396fb734eeeSPrabhakar Kushwaha		fsl,ccf-num-csdids = <32>;
397fb734eeeSPrabhakar Kushwaha		fsl,ccf-num-snoopids = <32>;
398fb734eeeSPrabhakar Kushwaha	};
399fb734eeeSPrabhakar Kushwaha
400fb734eeeSPrabhakar Kushwaha	iommu@20000 {
401fb734eeeSPrabhakar Kushwaha		compatible = "fsl,pamu-v1.0", "fsl,pamu";
402fb734eeeSPrabhakar Kushwaha		reg = <0x20000 0x1000>;
403fb734eeeSPrabhakar Kushwaha		ranges = <0 0x20000 0x1000>;
404fb734eeeSPrabhakar Kushwaha		#address-cells = <1>;
405fb734eeeSPrabhakar Kushwaha		#size-cells = <1>;
406fb734eeeSPrabhakar Kushwaha		interrupts = <
407fb734eeeSPrabhakar Kushwaha			24 2 0 0
408fb734eeeSPrabhakar Kushwaha			16 2 1 30>;
409fb734eeeSPrabhakar Kushwaha		pamu0: pamu@0 {
410fb734eeeSPrabhakar Kushwaha			reg = <0 0x1000>;
411fb734eeeSPrabhakar Kushwaha			fsl,primary-cache-geometry = <128 1>;
412fb734eeeSPrabhakar Kushwaha			fsl,secondary-cache-geometry = <16 2>;
413fb734eeeSPrabhakar Kushwaha		};
414fb734eeeSPrabhakar Kushwaha	};
415fb734eeeSPrabhakar Kushwaha
416fb734eeeSPrabhakar Kushwaha/include/ "qoriq-mpic.dtsi"
417fb734eeeSPrabhakar Kushwaha
418fb734eeeSPrabhakar Kushwaha	guts: global-utilities@e0000 {
419fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0";
420fb734eeeSPrabhakar Kushwaha		reg = <0xe0000 0xe00>;
421fb734eeeSPrabhakar Kushwaha		fsl,has-rstcr;
422fb734eeeSPrabhakar Kushwaha		fsl,liodn-bits = <12>;
423fb734eeeSPrabhakar Kushwaha	};
424fb734eeeSPrabhakar Kushwaha
425eaffcb0fSEmil Medve/include/ "qoriq-clockgen2.dtsi"
426eaffcb0fSEmil Medve	global-utilities@e1000 {
427fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
428fb734eeeSPrabhakar Kushwaha	};
429fb734eeeSPrabhakar Kushwaha
430fb734eeeSPrabhakar Kushwaha	rcpm: global-utilities@e2000 {
431d2d79dccSChenhui Zhao		compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.1";
432fb734eeeSPrabhakar Kushwaha		reg = <0xe2000 0x1000>;
433fb734eeeSPrabhakar Kushwaha	};
434fb734eeeSPrabhakar Kushwaha
435fb734eeeSPrabhakar Kushwaha	sfp: sfp@e8000 {
436fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-sfp";
437fb734eeeSPrabhakar Kushwaha		reg	   = <0xe8000 0x1000>;
438fb734eeeSPrabhakar Kushwaha	};
439fb734eeeSPrabhakar Kushwaha
440fb734eeeSPrabhakar Kushwaha	serdes: serdes@ea000 {
441fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-serdes";
442fb734eeeSPrabhakar Kushwaha		reg	   = <0xea000 0x4000>;
443fb734eeeSPrabhakar Kushwaha	};
444fb734eeeSPrabhakar Kushwaha
445be489a39SHongtao Jia	tmu: tmu@f0000 {
446be489a39SHongtao Jia		compatible = "fsl,qoriq-tmu";
447be489a39SHongtao Jia		reg = <0xf0000 0x1000>;
448be489a39SHongtao Jia		interrupts = <18 2 0 0>;
449be489a39SHongtao Jia		fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
450be489a39SHongtao Jia		fsl,tmu-calibration = <0x00000000 0x00000025
451be489a39SHongtao Jia				       0x00000001 0x00000028
452be489a39SHongtao Jia				       0x00000002 0x0000002d
453be489a39SHongtao Jia				       0x00000003 0x00000031
454be489a39SHongtao Jia				       0x00000004 0x00000036
455be489a39SHongtao Jia				       0x00000005 0x0000003a
456be489a39SHongtao Jia				       0x00000006 0x00000040
457be489a39SHongtao Jia				       0x00000007 0x00000044
458be489a39SHongtao Jia				       0x00000008 0x0000004a
459be489a39SHongtao Jia				       0x00000009 0x0000004f
460be489a39SHongtao Jia				       0x0000000a 0x00000054
461be489a39SHongtao Jia
462be489a39SHongtao Jia				       0x00010000 0x0000000d
463be489a39SHongtao Jia				       0x00010001 0x00000013
464be489a39SHongtao Jia				       0x00010002 0x00000019
465be489a39SHongtao Jia				       0x00010003 0x0000001f
466be489a39SHongtao Jia				       0x00010004 0x00000025
467be489a39SHongtao Jia				       0x00010005 0x0000002d
468be489a39SHongtao Jia				       0x00010006 0x00000033
469be489a39SHongtao Jia				       0x00010007 0x00000043
470be489a39SHongtao Jia				       0x00010008 0x0000004b
471be489a39SHongtao Jia				       0x00010009 0x00000053
472be489a39SHongtao Jia
473be489a39SHongtao Jia				       0x00020000 0x00000010
474be489a39SHongtao Jia				       0x00020001 0x00000017
475be489a39SHongtao Jia				       0x00020002 0x0000001f
476be489a39SHongtao Jia				       0x00020003 0x00000029
477be489a39SHongtao Jia				       0x00020004 0x00000031
478be489a39SHongtao Jia				       0x00020005 0x0000003c
479be489a39SHongtao Jia				       0x00020006 0x00000042
480be489a39SHongtao Jia				       0x00020007 0x0000004d
481be489a39SHongtao Jia				       0x00020008 0x00000056
482be489a39SHongtao Jia
483be489a39SHongtao Jia				       0x00030000 0x00000012
484be489a39SHongtao Jia				       0x00030001 0x0000001d>;
485734211cbSHongtao Jia		#thermal-sensor-cells = <1>;
486be489a39SHongtao Jia	};
487be489a39SHongtao Jia
488be489a39SHongtao Jia	thermal-zones {
489be489a39SHongtao Jia		cpu_thermal: cpu-thermal {
490be489a39SHongtao Jia			polling-delay-passive = <1000>;
491be489a39SHongtao Jia			polling-delay = <5000>;
492be489a39SHongtao Jia
493734211cbSHongtao Jia			thermal-sensors = <&tmu 2>;
494be489a39SHongtao Jia
495be489a39SHongtao Jia			trips {
496be489a39SHongtao Jia				cpu_alert: cpu-alert {
497be489a39SHongtao Jia					temperature = <85000>;
498be489a39SHongtao Jia					hysteresis = <2000>;
499be489a39SHongtao Jia					type = "passive";
500be489a39SHongtao Jia				};
501be489a39SHongtao Jia				cpu_crit: cpu-crit {
502be489a39SHongtao Jia					temperature = <95000>;
503be489a39SHongtao Jia					hysteresis = <2000>;
504be489a39SHongtao Jia					type = "critical";
505be489a39SHongtao Jia				};
506be489a39SHongtao Jia			};
507be489a39SHongtao Jia
508be489a39SHongtao Jia			cooling-maps {
509be489a39SHongtao Jia				map0 {
510be489a39SHongtao Jia					trip = <&cpu_alert>;
511be489a39SHongtao Jia					cooling-device =
512be489a39SHongtao Jia						<&cpu0 THERMAL_NO_LIMIT
513be489a39SHongtao Jia							THERMAL_NO_LIMIT>;
514be489a39SHongtao Jia				};
515be489a39SHongtao Jia				map1 {
516be489a39SHongtao Jia					trip = <&cpu_alert>;
517be489a39SHongtao Jia					cooling-device =
518be489a39SHongtao Jia						<&cpu1 THERMAL_NO_LIMIT
519be489a39SHongtao Jia							THERMAL_NO_LIMIT>;
520be489a39SHongtao Jia				};
521be489a39SHongtao Jia				map2 {
522be489a39SHongtao Jia					trip = <&cpu_alert>;
523be489a39SHongtao Jia					cooling-device =
524be489a39SHongtao Jia						<&cpu2 THERMAL_NO_LIMIT
525be489a39SHongtao Jia							THERMAL_NO_LIMIT>;
526be489a39SHongtao Jia				};
527be489a39SHongtao Jia				map3 {
528be489a39SHongtao Jia					trip = <&cpu_alert>;
529be489a39SHongtao Jia					cooling-device =
530be489a39SHongtao Jia						<&cpu3 THERMAL_NO_LIMIT
531be489a39SHongtao Jia							THERMAL_NO_LIMIT>;
532be489a39SHongtao Jia				};
533be489a39SHongtao Jia			};
534be489a39SHongtao Jia		};
535be489a39SHongtao Jia	};
536be489a39SHongtao Jia
537163e60c1SWang Dongsheng	scfg: global-utilities@fc000 {
538163e60c1SWang Dongsheng		compatible = "fsl,t1040-scfg";
539163e60c1SWang Dongsheng		reg = <0xfc000 0x1000>;
540163e60c1SWang Dongsheng	};
541163e60c1SWang Dongsheng
542fb734eeeSPrabhakar Kushwaha/include/ "elo3-dma-0.dtsi"
543fb734eeeSPrabhakar Kushwaha/include/ "elo3-dma-1.dtsi"
544fb734eeeSPrabhakar Kushwaha/include/ "qoriq-espi-0.dtsi"
545fb734eeeSPrabhakar Kushwaha	spi@110000 {
546fb734eeeSPrabhakar Kushwaha		fsl,espi-num-chipselects = <4>;
547fb734eeeSPrabhakar Kushwaha	};
548fb734eeeSPrabhakar Kushwaha
549fb734eeeSPrabhakar Kushwaha/include/ "qoriq-esdhc-0.dtsi"
550fb734eeeSPrabhakar Kushwaha	sdhc@114000 {
551fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-esdhc", "fsl,esdhc";
552fb734eeeSPrabhakar Kushwaha		fsl,iommu-parent = <&pamu0>;
553fb734eeeSPrabhakar Kushwaha		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
554fb734eeeSPrabhakar Kushwaha		sdhci,auto-cmd12;
555fb734eeeSPrabhakar Kushwaha	};
556fb734eeeSPrabhakar Kushwaha/include/ "qoriq-i2c-0.dtsi"
557fb734eeeSPrabhakar Kushwaha/include/ "qoriq-i2c-1.dtsi"
558fb734eeeSPrabhakar Kushwaha/include/ "qoriq-duart-0.dtsi"
559fb734eeeSPrabhakar Kushwaha/include/ "qoriq-duart-1.dtsi"
560fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-0.dtsi"
561fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-1.dtsi"
562fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-2.dtsi"
563fb734eeeSPrabhakar Kushwaha/include/ "qoriq-gpio-3.dtsi"
564fb734eeeSPrabhakar Kushwaha/include/ "qoriq-usb2-mph-0.dtsi"
565fb734eeeSPrabhakar Kushwaha		usb0: usb@210000 {
5663dde3176SSriram Dash			compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
567fb734eeeSPrabhakar Kushwaha			fsl,iommu-parent = <&pamu0>;
568fb734eeeSPrabhakar Kushwaha			fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
569fb734eeeSPrabhakar Kushwaha			phy_type = "utmi";
570fb734eeeSPrabhakar Kushwaha			port0;
571fb734eeeSPrabhakar Kushwaha		};
572fb734eeeSPrabhakar Kushwaha/include/ "qoriq-usb2-dr-0.dtsi"
573fb734eeeSPrabhakar Kushwaha		usb1: usb@211000 {
5743dde3176SSriram Dash			compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
575fb734eeeSPrabhakar Kushwaha			fsl,iommu-parent = <&pamu0>;
576fb734eeeSPrabhakar Kushwaha			fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
577fb734eeeSPrabhakar Kushwaha			dr_mode = "host";
578fb734eeeSPrabhakar Kushwaha			phy_type = "utmi";
579fb734eeeSPrabhakar Kushwaha		};
580fb734eeeSPrabhakar Kushwaha
581fb734eeeSPrabhakar Kushwaha	display@180000 {
582fb734eeeSPrabhakar Kushwaha		compatible = "fsl,t1040-diu", "fsl,diu";
583fb734eeeSPrabhakar Kushwaha		reg = <0x180000 1000>;
584fb734eeeSPrabhakar Kushwaha		interrupts = <74 2 0 0>;
585fb734eeeSPrabhakar Kushwaha	};
586fb734eeeSPrabhakar Kushwaha
587fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sata2-0.dtsi"
588fb734eeeSPrabhakar Kushwaha	sata@220000 {
589fb734eeeSPrabhakar Kushwaha		fsl,iommu-parent = <&pamu0>;
590fb734eeeSPrabhakar Kushwaha		fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
591fb734eeeSPrabhakar Kushwaha	};
592fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sata2-1.dtsi"
593fb734eeeSPrabhakar Kushwaha	sata@221000 {
594fb734eeeSPrabhakar Kushwaha		fsl,iommu-parent = <&pamu0>;
595fb734eeeSPrabhakar Kushwaha		fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
596fb734eeeSPrabhakar Kushwaha	};
597fb734eeeSPrabhakar Kushwaha/include/ "qoriq-sec5.0-0.dtsi"
5987f6972a0SKumar Gala/include/ "qoriq-qman3.dtsi"
5991e8ed06dSKumar Gala/include/ "qoriq-bman1.dtsi"
600da414bb9SIgal Liberman
601da414bb9SIgal Liberman/include/ "qoriq-fman3l-0.dtsi"
602da414bb9SIgal Liberman/include/ "qoriq-fman3-0-1g-0.dtsi"
603da414bb9SIgal Liberman/include/ "qoriq-fman3-0-1g-1.dtsi"
604da414bb9SIgal Liberman/include/ "qoriq-fman3-0-1g-2.dtsi"
605da414bb9SIgal Liberman/include/ "qoriq-fman3-0-1g-3.dtsi"
606da414bb9SIgal Liberman/include/ "qoriq-fman3-0-1g-4.dtsi"
607da414bb9SIgal Liberman	fman@400000 {
608da414bb9SIgal Liberman		enet0: ethernet@e0000 {
609da414bb9SIgal Liberman		};
610da414bb9SIgal Liberman
611da414bb9SIgal Liberman		enet1: ethernet@e2000 {
612da414bb9SIgal Liberman		};
613da414bb9SIgal Liberman
614da414bb9SIgal Liberman		enet2: ethernet@e4000 {
615da414bb9SIgal Liberman		};
616da414bb9SIgal Liberman
617da414bb9SIgal Liberman		enet3: ethernet@e6000 {
618da414bb9SIgal Liberman		};
619da414bb9SIgal Liberman
620da414bb9SIgal Liberman		enet4: ethernet@e8000 {
621da414bb9SIgal Liberman		};
622da414bb9SIgal Liberman
623da414bb9SIgal Liberman		mdio@fc000 {
624da414bb9SIgal Liberman			interrupts = <100 1 0 0>;
625da414bb9SIgal Liberman		};
626da414bb9SIgal Liberman
627da414bb9SIgal Liberman		mdio@fd000 {
628da414bb9SIgal Liberman			status = "disabled";
629da414bb9SIgal Liberman		};
630da414bb9SIgal Liberman	};
631aa309867SVladimir Oltean
632aa309867SVladimir Oltean	seville_switch: ethernet-switch@800000 {
633aa309867SVladimir Oltean		compatible = "mscc,vsc9953-switch";
634aa309867SVladimir Oltean		reg = <0x800000 0x290000>;
635aa309867SVladimir Oltean		interrupts = <26 2 0 0>;
636aa309867SVladimir Oltean		interrupt-names = "xtr";
637aa309867SVladimir Oltean		little-endian;
638aa309867SVladimir Oltean		#address-cells = <1>;
639aa309867SVladimir Oltean		#size-cells = <0>;
640aa309867SVladimir Oltean		status = "disabled";
641aa309867SVladimir Oltean
642aa309867SVladimir Oltean		ports {
643aa309867SVladimir Oltean			#address-cells = <1>;
644aa309867SVladimir Oltean			#size-cells = <0>;
645aa309867SVladimir Oltean
646aa309867SVladimir Oltean			seville_port0: port@0 {
647aa309867SVladimir Oltean				reg = <0>;
648aa309867SVladimir Oltean				status = "disabled";
649aa309867SVladimir Oltean			};
650aa309867SVladimir Oltean
651aa309867SVladimir Oltean			seville_port1: port@1 {
652aa309867SVladimir Oltean				reg = <1>;
653aa309867SVladimir Oltean				status = "disabled";
654aa309867SVladimir Oltean			};
655aa309867SVladimir Oltean
656aa309867SVladimir Oltean			seville_port2: port@2 {
657aa309867SVladimir Oltean				reg = <2>;
658aa309867SVladimir Oltean				status = "disabled";
659aa309867SVladimir Oltean			};
660aa309867SVladimir Oltean
661aa309867SVladimir Oltean			seville_port3: port@3 {
662aa309867SVladimir Oltean				reg = <3>;
663aa309867SVladimir Oltean				status = "disabled";
664aa309867SVladimir Oltean			};
665aa309867SVladimir Oltean
666aa309867SVladimir Oltean			seville_port4: port@4 {
667aa309867SVladimir Oltean				reg = <4>;
668aa309867SVladimir Oltean				status = "disabled";
669aa309867SVladimir Oltean			};
670aa309867SVladimir Oltean
671aa309867SVladimir Oltean			seville_port5: port@5 {
672aa309867SVladimir Oltean				reg = <5>;
673aa309867SVladimir Oltean				status = "disabled";
674aa309867SVladimir Oltean			};
675aa309867SVladimir Oltean
676aa309867SVladimir Oltean			seville_port6: port@6 {
677aa309867SVladimir Oltean				reg = <6>;
678aa309867SVladimir Oltean				status = "disabled";
679aa309867SVladimir Oltean			};
680aa309867SVladimir Oltean
681aa309867SVladimir Oltean			seville_port7: port@7 {
682aa309867SVladimir Oltean				reg = <7>;
683aa309867SVladimir Oltean				status = "disabled";
684aa309867SVladimir Oltean			};
685aa309867SVladimir Oltean
686aa309867SVladimir Oltean			seville_port8: port@8 {
687aa309867SVladimir Oltean				reg = <8>;
688aa309867SVladimir Oltean				phy-mode = "internal";
689*8b322f9fSVladimir Oltean				ethernet = <&enet0>;
690aa309867SVladimir Oltean				status = "disabled";
691aa309867SVladimir Oltean
692aa309867SVladimir Oltean				fixed-link {
693aa309867SVladimir Oltean					speed = <2500>;
694aa309867SVladimir Oltean					full-duplex;
695aa309867SVladimir Oltean				};
696aa309867SVladimir Oltean			};
697aa309867SVladimir Oltean
698aa309867SVladimir Oltean			seville_port9: port@9 {
699aa309867SVladimir Oltean				reg = <9>;
700aa309867SVladimir Oltean				phy-mode = "internal";
701*8b322f9fSVladimir Oltean				ethernet = <&enet1>;
702aa309867SVladimir Oltean				status = "disabled";
703aa309867SVladimir Oltean
704aa309867SVladimir Oltean				fixed-link {
705aa309867SVladimir Oltean					speed = <2500>;
706aa309867SVladimir Oltean					full-duplex;
707aa309867SVladimir Oltean				};
708aa309867SVladimir Oltean			};
709aa309867SVladimir Oltean		};
710aa309867SVladimir Oltean	};
711fb734eeeSPrabhakar Kushwaha};
712b7a70852SZhao Qiang
713b7a70852SZhao Qiang&qe {
714b7a70852SZhao Qiang	#address-cells = <1>;
715b7a70852SZhao Qiang	#size-cells = <1>;
716b7a70852SZhao Qiang	device_type = "qe";
717b7a70852SZhao Qiang	compatible = "fsl,qe";
718b7a70852SZhao Qiang	fsl,qe-num-riscs = <1>;
719b7a70852SZhao Qiang	fsl,qe-num-snums = <28>;
720b7a70852SZhao Qiang
721b7a70852SZhao Qiang	qeic: interrupt-controller@80 {
722b7a70852SZhao Qiang		interrupt-controller;
723b7a70852SZhao Qiang		compatible = "fsl,qe-ic";
724b7a70852SZhao Qiang		#address-cells = <0>;
725b7a70852SZhao Qiang		#interrupt-cells = <1>;
726b7a70852SZhao Qiang		reg = <0x80 0x80>;
727b7a70852SZhao Qiang		interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
728b7a70852SZhao Qiang	};
729b7a70852SZhao Qiang
730b7a70852SZhao Qiang	ucc@2000 {
731b7a70852SZhao Qiang		cell-index = <1>;
732b7a70852SZhao Qiang		reg = <0x2000 0x200>;
733b7a70852SZhao Qiang		interrupts = <32>;
734b7a70852SZhao Qiang		interrupt-parent = <&qeic>;
735b7a70852SZhao Qiang	};
736b7a70852SZhao Qiang
737b7a70852SZhao Qiang	ucc@2200 {
738b7a70852SZhao Qiang		cell-index = <3>;
739b7a70852SZhao Qiang		reg = <0x2200 0x200>;
740b7a70852SZhao Qiang		interrupts = <34>;
741b7a70852SZhao Qiang		interrupt-parent = <&qeic>;
742b7a70852SZhao Qiang	};
743b7a70852SZhao Qiang
744b7a70852SZhao Qiang	muram@10000 {
745b7a70852SZhao Qiang		#address-cells = <1>;
746b7a70852SZhao Qiang		#size-cells = <1>;
747b7a70852SZhao Qiang		compatible = "fsl,qe-muram", "fsl,cpm-muram";
748b7a70852SZhao Qiang		ranges = <0x0 0x10000 0x6000>;
749b7a70852SZhao Qiang
750b7a70852SZhao Qiang		data-only@0 {
751b7a70852SZhao Qiang			compatible = "fsl,qe-muram-data",
752b7a70852SZhao Qiang			"fsl,cpm-muram-data";
753b7a70852SZhao Qiang			reg = <0x0 0x6000>;
754b7a70852SZhao Qiang		};
755b7a70852SZhao Qiang	};
756b7a70852SZhao Qiang};
757