1/* 2 * T1023 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2014 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35&ifc { 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 39 interrupts = <25 2 0 0>; 40}; 41 42&pci0 { 43 compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 44 device_type = "pci"; 45 #size-cells = <2>; 46 #address-cells = <3>; 47 bus-range = <0x0 0xff>; 48 interrupts = <20 2 0 0>; 49 fsl,iommu-parent = <&pamu0>; 50 pcie@0 { 51 reg = <0 0 0 0 0>; 52 #interrupt-cells = <1>; 53 #size-cells = <2>; 54 #address-cells = <3>; 55 device_type = "pci"; 56 interrupts = <20 2 0 0>; 57 interrupt-map-mask = <0xf800 0 0 7>; 58 interrupt-map = < 59 /* IDSEL 0x0 */ 60 0000 0 0 1 &mpic 40 1 0 0 61 0000 0 0 2 &mpic 1 1 0 0 62 0000 0 0 3 &mpic 2 1 0 0 63 0000 0 0 4 &mpic 3 1 0 0 64 >; 65 }; 66}; 67 68&pci1 { 69 compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 70 device_type = "pci"; 71 #size-cells = <2>; 72 #address-cells = <3>; 73 bus-range = <0 0xff>; 74 interrupts = <21 2 0 0>; 75 fsl,iommu-parent = <&pamu0>; 76 pcie@0 { 77 reg = <0 0 0 0 0>; 78 #interrupt-cells = <1>; 79 #size-cells = <2>; 80 #address-cells = <3>; 81 device_type = "pci"; 82 interrupts = <21 2 0 0>; 83 interrupt-map-mask = <0xf800 0 0 7>; 84 interrupt-map = < 85 /* IDSEL 0x0 */ 86 0000 0 0 1 &mpic 41 1 0 0 87 0000 0 0 2 &mpic 5 1 0 0 88 0000 0 0 3 &mpic 6 1 0 0 89 0000 0 0 4 &mpic 7 1 0 0 90 >; 91 }; 92}; 93 94&pci2 { 95 compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 96 device_type = "pci"; 97 #size-cells = <2>; 98 #address-cells = <3>; 99 bus-range = <0x0 0xff>; 100 interrupts = <22 2 0 0>; 101 fsl,iommu-parent = <&pamu0>; 102 pcie@0 { 103 reg = <0 0 0 0 0>; 104 #interrupt-cells = <1>; 105 #size-cells = <2>; 106 #address-cells = <3>; 107 device_type = "pci"; 108 interrupts = <22 2 0 0>; 109 interrupt-map-mask = <0xf800 0 0 7>; 110 interrupt-map = < 111 /* IDSEL 0x0 */ 112 0000 0 0 1 &mpic 42 1 0 0 113 0000 0 0 2 &mpic 9 1 0 0 114 0000 0 0 3 &mpic 10 1 0 0 115 0000 0 0 4 &mpic 11 1 0 0 116 >; 117 }; 118}; 119 120&dcsr { 121 #address-cells = <1>; 122 #size-cells = <1>; 123 compatible = "fsl,dcsr", "simple-bus"; 124 125 dcsr-epu@0 { 126 compatible = "fsl,t1023-dcsr-epu", "fsl,dcsr-epu"; 127 interrupts = <52 2 0 0 128 84 2 0 0 129 85 2 0 0>; 130 reg = <0x0 0x1000>; 131 }; 132 dcsr-npc { 133 compatible = "fsl,t1023-dcsr-cnpc", "fsl,dcsr-cnpc"; 134 reg = <0x1000 0x1000 0x1002000 0x10000>; 135 }; 136 dcsr-nxc@2000 { 137 compatible = "fsl,dcsr-nxc"; 138 reg = <0x2000 0x1000>; 139 }; 140 dcsr-corenet { 141 compatible = "fsl,dcsr-corenet"; 142 reg = <0x8000 0x1000 0x1A000 0x1000>; 143 }; 144 dcsr-ocn@11000 { 145 compatible = "fsl,t1023-dcsr-ocn", "fsl,dcsr-ocn"; 146 reg = <0x11000 0x1000>; 147 }; 148 dcsr-ddr@12000 { 149 compatible = "fsl,dcsr-ddr"; 150 dev-handle = <&ddr1>; 151 reg = <0x12000 0x1000>; 152 }; 153 dcsr-nal@18000 { 154 compatible = "fsl,t1023-dcsr-nal", "fsl,dcsr-nal"; 155 reg = <0x18000 0x1000>; 156 }; 157 dcsr-rcpm@22000 { 158 compatible = "fsl,t1023-dcsr-rcpm", "fsl,dcsr-rcpm"; 159 reg = <0x22000 0x1000>; 160 }; 161 dcsr-snpc@30000 { 162 compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc"; 163 reg = <0x30000 0x1000 0x1022000 0x10000>; 164 }; 165 dcsr-snpc@31000 { 166 compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc"; 167 reg = <0x31000 0x1000 0x1042000 0x10000>; 168 }; 169 dcsr-cpu-sb-proxy@100000 { 170 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 171 cpu-handle = <&cpu0>; 172 reg = <0x100000 0x1000 0x101000 0x1000>; 173 }; 174 dcsr-cpu-sb-proxy@108000 { 175 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 176 cpu-handle = <&cpu1>; 177 reg = <0x108000 0x1000 0x109000 0x1000>; 178 }; 179}; 180 181&soc { 182 #address-cells = <1>; 183 #size-cells = <1>; 184 device_type = "soc"; 185 compatible = "simple-bus"; 186 187 soc-sram-error { 188 compatible = "fsl,soc-sram-error"; 189 interrupts = <16 2 1 29>; 190 }; 191 192 corenet-law@0 { 193 compatible = "fsl,corenet-law"; 194 reg = <0x0 0x1000>; 195 fsl,num-laws = <16>; 196 }; 197 198 ddr1: memory-controller@8000 { 199 compatible = "fsl,qoriq-memory-controller-v5.0", 200 "fsl,qoriq-memory-controller"; 201 reg = <0x8000 0x1000>; 202 interrupts = <16 2 1 23>; 203 }; 204 205 cpc: l3-cache-controller@10000 { 206 compatible = "fsl,t1023-l3-cache-controller", "cache"; 207 reg = <0x10000 0x1000>; 208 interrupts = <16 2 1 27>; 209 }; 210 211 corenet-cf@18000 { 212 compatible = "fsl,corenet2-cf"; 213 reg = <0x18000 0x1000>; 214 interrupts = <16 2 1 31>; 215 }; 216 217 iommu@20000 { 218 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 219 reg = <0x20000 0x1000>; 220 ranges = <0 0x20000 0x1000>; 221 #address-cells = <1>; 222 #size-cells = <1>; 223 interrupts = < 224 24 2 0 0 225 16 2 1 30>; 226 pamu0: pamu@0 { 227 reg = <0 0x1000>; 228 fsl,primary-cache-geometry = <128 1>; 229 fsl,secondary-cache-geometry = <32 2>; 230 }; 231 }; 232 233/include/ "qoriq-mpic.dtsi" 234 235 guts: global-utilities@e0000 { 236 compatible = "fsl,t1023-device-config", "fsl,qoriq-device-config-2.0"; 237 reg = <0xe0000 0xe00>; 238 fsl,has-rstcr; 239 fsl,liodn-bits = <12>; 240 }; 241 242/include/ "qoriq-clockgen2.dtsi" 243 global-utilities@e1000 { 244 compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0"; 245 mux0: mux0@0 { 246 #clock-cells = <0>; 247 reg = <0x0 4>; 248 compatible = "fsl,core-mux-clock"; 249 clocks = <&pll0 0>, <&pll0 1>; 250 clock-names = "pll0_0", "pll0_1"; 251 clock-output-names = "cmux0"; 252 }; 253 mux1: mux1@20 { 254 #clock-cells = <0>; 255 reg = <0x20 4>; 256 compatible = "fsl,core-mux-clock"; 257 clocks = <&pll0 0>, <&pll0 1>; 258 clock-names = "pll0_0", "pll0_1"; 259 clock-output-names = "cmux1"; 260 }; 261 }; 262 263 rcpm: global-utilities@e2000 { 264 compatible = "fsl,t1023-rcpm", "fsl,qoriq-rcpm-2.0"; 265 reg = <0xe2000 0x1000>; 266 }; 267 268 sfp: sfp@e8000 { 269 compatible = "fsl,t1023-sfp"; 270 reg = <0xe8000 0x1000>; 271 }; 272 273 serdes: serdes@ea000 { 274 compatible = "fsl,t1023-serdes"; 275 reg = <0xea000 0x4000>; 276 }; 277 278 scfg: global-utilities@fc000 { 279 compatible = "fsl,t1023-scfg"; 280 reg = <0xfc000 0x1000>; 281 }; 282 283/include/ "elo3-dma-0.dtsi" 284/include/ "elo3-dma-1.dtsi" 285 286/include/ "qoriq-espi-0.dtsi" 287 spi@110000 { 288 fsl,espi-num-chipselects = <4>; 289 }; 290 291/include/ "qoriq-esdhc-0.dtsi" 292 sdhc@114000 { 293 compatible = "fsl,t1023-esdhc", "fsl,esdhc"; 294 fsl,iommu-parent = <&pamu0>; 295 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */ 296 sdhci,auto-cmd12; 297 no-1-8-v; 298 }; 299/include/ "qoriq-i2c-0.dtsi" 300/include/ "qoriq-i2c-1.dtsi" 301/include/ "qoriq-duart-0.dtsi" 302/include/ "qoriq-duart-1.dtsi" 303/include/ "qoriq-gpio-0.dtsi" 304/include/ "qoriq-gpio-1.dtsi" 305/include/ "qoriq-gpio-2.dtsi" 306/include/ "qoriq-gpio-3.dtsi" 307/include/ "qoriq-usb2-mph-0.dtsi" 308 usb0: usb@210000 { 309 compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph"; 310 fsl,iommu-parent = <&pamu0>; 311 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 312 phy_type = "utmi"; 313 port0; 314 }; 315/include/ "qoriq-usb2-dr-0.dtsi" 316 usb1: usb@211000 { 317 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; 318 fsl,iommu-parent = <&pamu0>; 319 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ 320 dr_mode = "host"; 321 phy_type = "utmi"; 322 }; 323/include/ "qoriq-sata2-0.dtsi" 324sata@220000 { 325 fsl,iommu-parent = <&pamu0>; 326 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */ 327}; 328 329/include/ "qoriq-sec5.0-0.dtsi" 330}; 331