1/*
2 * T1023 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *	 notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *	 notice, this list of conditions and the following disclaimer in the
12 *	 documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *	 names of its contributors may be used to endorse or promote products
15 *	 derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <dt-bindings/thermal/thermal.h>
36
37&ifc {
38	#address-cells = <2>;
39	#size-cells = <1>;
40	compatible = "fsl,ifc", "simple-bus";
41	interrupts = <25 2 0 0>;
42};
43
44&pci0 {
45	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
46	device_type = "pci";
47	#size-cells = <2>;
48	#address-cells = <3>;
49	bus-range = <0x0 0xff>;
50	interrupts = <20 2 0 0>;
51	fsl,iommu-parent = <&pamu0>;
52	pcie@0 {
53		reg = <0 0 0 0 0>;
54		#interrupt-cells = <1>;
55		#size-cells = <2>;
56		#address-cells = <3>;
57		device_type = "pci";
58		interrupts = <20 2 0 0>;
59		interrupt-map-mask = <0xf800 0 0 7>;
60		interrupt-map = <
61			/* IDSEL 0x0 */
62			0000 0 0 1 &mpic 40 1 0 0
63			0000 0 0 2 &mpic 1 1 0 0
64			0000 0 0 3 &mpic 2 1 0 0
65			0000 0 0 4 &mpic 3 1 0 0
66			>;
67	};
68};
69
70&pci1 {
71	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
72	device_type = "pci";
73	#size-cells = <2>;
74	#address-cells = <3>;
75	bus-range = <0 0xff>;
76	interrupts = <21 2 0 0>;
77	fsl,iommu-parent = <&pamu0>;
78	pcie@0 {
79		reg = <0 0 0 0 0>;
80		#interrupt-cells = <1>;
81		#size-cells = <2>;
82		#address-cells = <3>;
83		device_type = "pci";
84		interrupts = <21 2 0 0>;
85		interrupt-map-mask = <0xf800 0 0 7>;
86		interrupt-map = <
87			/* IDSEL 0x0 */
88			0000 0 0 1 &mpic 41 1 0 0
89			0000 0 0 2 &mpic 5 1 0 0
90			0000 0 0 3 &mpic 6 1 0 0
91			0000 0 0 4 &mpic 7 1 0 0
92			>;
93	};
94};
95
96&pci2 {
97	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
98	device_type = "pci";
99	#size-cells = <2>;
100	#address-cells = <3>;
101	bus-range = <0x0 0xff>;
102	interrupts = <22 2 0 0>;
103	fsl,iommu-parent = <&pamu0>;
104	pcie@0 {
105		reg = <0 0 0 0 0>;
106		#interrupt-cells = <1>;
107		#size-cells = <2>;
108		#address-cells = <3>;
109		device_type = "pci";
110		interrupts = <22 2 0 0>;
111		interrupt-map-mask = <0xf800 0 0 7>;
112		interrupt-map = <
113			/* IDSEL 0x0 */
114			0000 0 0 1 &mpic 42 1 0 0
115			0000 0 0 2 &mpic 9 1 0 0
116			0000 0 0 3 &mpic 10 1 0 0
117			0000 0 0 4 &mpic 11 1 0 0
118			>;
119	};
120};
121
122&dcsr {
123	#address-cells = <1>;
124	#size-cells = <1>;
125	compatible = "fsl,dcsr", "simple-bus";
126
127	dcsr-epu@0 {
128		compatible = "fsl,t1023-dcsr-epu", "fsl,dcsr-epu";
129		interrupts = <52 2 0 0
130			      84 2 0 0
131			      85 2 0 0>;
132		reg = <0x0 0x1000>;
133	};
134	dcsr-npc {
135		compatible = "fsl,t1023-dcsr-cnpc", "fsl,dcsr-cnpc";
136		reg = <0x1000 0x1000 0x1002000 0x10000>;
137	};
138	dcsr-nxc@2000 {
139		compatible = "fsl,dcsr-nxc";
140		reg = <0x2000 0x1000>;
141	};
142	dcsr-corenet {
143		compatible = "fsl,dcsr-corenet";
144		reg = <0x8000 0x1000 0x1A000 0x1000>;
145	};
146	dcsr-ocn@11000 {
147		compatible = "fsl,t1023-dcsr-ocn", "fsl,dcsr-ocn";
148		reg = <0x11000 0x1000>;
149	};
150	dcsr-ddr@12000 {
151		compatible = "fsl,dcsr-ddr";
152		dev-handle = <&ddr1>;
153		reg = <0x12000 0x1000>;
154	};
155	dcsr-nal@18000 {
156		compatible = "fsl,t1023-dcsr-nal", "fsl,dcsr-nal";
157		reg = <0x18000 0x1000>;
158	};
159	dcsr-rcpm@22000 {
160		compatible = "fsl,t1023-dcsr-rcpm", "fsl,dcsr-rcpm";
161		reg = <0x22000 0x1000>;
162	};
163	dcsr-snpc@30000 {
164		compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";
165		reg = <0x30000 0x1000 0x1022000 0x10000>;
166	};
167	dcsr-snpc@31000 {
168		compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";
169		reg = <0x31000 0x1000 0x1042000 0x10000>;
170	};
171	dcsr-cpu-sb-proxy@100000 {
172		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
173		cpu-handle = <&cpu0>;
174		reg = <0x100000 0x1000 0x101000 0x1000>;
175	};
176	dcsr-cpu-sb-proxy@108000 {
177		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
178		cpu-handle = <&cpu1>;
179		reg = <0x108000 0x1000 0x109000 0x1000>;
180	};
181};
182
183&soc {
184	#address-cells = <1>;
185	#size-cells = <1>;
186	device_type = "soc";
187	compatible = "simple-bus";
188
189	soc-sram-error {
190		compatible = "fsl,soc-sram-error";
191		interrupts = <16 2 1 29>;
192	};
193
194	corenet-law@0 {
195		compatible = "fsl,corenet-law";
196		reg = <0x0 0x1000>;
197		fsl,num-laws = <16>;
198	};
199
200	ddr1: memory-controller@8000 {
201		compatible = "fsl,qoriq-memory-controller-v5.0",
202				"fsl,qoriq-memory-controller";
203		reg = <0x8000 0x1000>;
204		interrupts = <16 2 1 23>;
205	};
206
207	cpc: l3-cache-controller@10000 {
208		compatible = "fsl,t1023-l3-cache-controller", "cache";
209		reg = <0x10000 0x1000>;
210		interrupts = <16 2 1 27>;
211	};
212
213	corenet-cf@18000 {
214		compatible = "fsl,corenet2-cf";
215		reg = <0x18000 0x1000>;
216		interrupts = <16 2 1 31>;
217	};
218
219	iommu@20000 {
220		compatible = "fsl,pamu-v1.0", "fsl,pamu";
221		reg = <0x20000 0x1000>;
222		ranges = <0 0x20000 0x1000>;
223		#address-cells = <1>;
224		#size-cells = <1>;
225		interrupts = <
226			24 2 0 0
227			16 2 1 30>;
228		pamu0: pamu@0 {
229			reg = <0 0x1000>;
230			fsl,primary-cache-geometry = <128 1>;
231			fsl,secondary-cache-geometry = <32 2>;
232		};
233	};
234
235/include/ "qoriq-mpic.dtsi"
236
237	guts: global-utilities@e0000 {
238		compatible = "fsl,t1023-device-config", "fsl,qoriq-device-config-2.0";
239		reg = <0xe0000 0xe00>;
240		fsl,has-rstcr;
241		fsl,liodn-bits = <12>;
242	};
243
244/include/ "qoriq-clockgen2.dtsi"
245	global-utilities@e1000 {
246		compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0";
247		mux0: mux0@0 {
248			#clock-cells = <0>;
249			reg = <0x0 4>;
250			compatible = "fsl,core-mux-clock";
251			clocks = <&pll0 0>, <&pll0 1>;
252			clock-names = "pll0_0", "pll0_1";
253			clock-output-names = "cmux0";
254		};
255		mux1: mux1@20 {
256			#clock-cells = <0>;
257			reg = <0x20 4>;
258			compatible = "fsl,core-mux-clock";
259			clocks = <&pll0 0>, <&pll0 1>;
260			clock-names = "pll0_0", "pll0_1";
261			clock-output-names = "cmux1";
262		};
263	};
264
265	rcpm: global-utilities@e2000 {
266		compatible = "fsl,t1023-rcpm", "fsl,qoriq-rcpm-2.0";
267		reg = <0xe2000 0x1000>;
268	};
269
270	sfp: sfp@e8000 {
271		compatible = "fsl,t1023-sfp";
272		reg = <0xe8000 0x1000>;
273	};
274
275	serdes: serdes@ea000 {
276		compatible = "fsl,t1023-serdes";
277		reg = <0xea000 0x4000>;
278	};
279
280	tmu: tmu@f0000 {
281		compatible = "fsl,qoriq-tmu";
282		reg = <0xf0000 0x1000>;
283		interrupts = <18 2 0 0>;
284		fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
285		fsl,tmu-calibration = <0x00000000 0x0000000f
286				       0x00000001 0x00000017
287				       0x00000002 0x0000001e
288				       0x00000003 0x00000026
289				       0x00000004 0x0000002e
290				       0x00000005 0x00000035
291				       0x00000006 0x0000003d
292				       0x00000007 0x00000044
293				       0x00000008 0x0000004c
294				       0x00000009 0x00000053
295				       0x0000000a 0x0000005b
296				       0x0000000b 0x00000064
297
298				       0x00010000 0x00000011
299				       0x00010001 0x0000001c
300				       0x00010002 0x00000024
301				       0x00010003 0x0000002b
302				       0x00010004 0x00000034
303				       0x00010005 0x00000039
304				       0x00010006 0x00000042
305				       0x00010007 0x0000004c
306				       0x00010008 0x00000051
307				       0x00010009 0x0000005a
308				       0x0001000a 0x00000063
309
310				       0x00020000 0x00000013
311				       0x00020001 0x00000019
312				       0x00020002 0x00000024
313				       0x00020003 0x0000002c
314				       0x00020004 0x00000035
315				       0x00020005 0x0000003d
316				       0x00020006 0x00000046
317				       0x00020007 0x00000050
318				       0x00020008 0x00000059
319
320				       0x00030000 0x00000002
321				       0x00030001 0x0000000d
322				       0x00030002 0x00000019
323				       0x00030003 0x00000024>;
324		#thermal-sensor-cells = <0>;
325	};
326
327	thermal-zones {
328		cpu_thermal: cpu-thermal {
329			polling-delay-passive = <1000>;
330			polling-delay = <5000>;
331
332			thermal-sensors = <&tmu>;
333
334			trips {
335				cpu_alert: cpu-alert {
336					temperature = <85000>;
337					hysteresis = <2000>;
338					type = "passive";
339				};
340				cpu_crit: cpu-crit {
341					temperature = <95000>;
342					hysteresis = <2000>;
343					type = "critical";
344				};
345			};
346
347			cooling-maps {
348				map0 {
349					trip = <&cpu_alert>;
350					cooling-device =
351						<&cpu0 THERMAL_NO_LIMIT
352							THERMAL_NO_LIMIT>;
353				};
354				map1 {
355					trip = <&cpu_alert>;
356					cooling-device =
357						<&cpu1 THERMAL_NO_LIMIT
358							THERMAL_NO_LIMIT>;
359				};
360			};
361		};
362	};
363
364	scfg: global-utilities@fc000 {
365		compatible = "fsl,t1023-scfg";
366		reg = <0xfc000 0x1000>;
367	};
368
369/include/ "elo3-dma-0.dtsi"
370/include/ "elo3-dma-1.dtsi"
371
372/include/ "qoriq-espi-0.dtsi"
373	spi@110000 {
374		fsl,espi-num-chipselects = <4>;
375	};
376
377/include/ "qoriq-esdhc-0.dtsi"
378	sdhc@114000 {
379		compatible = "fsl,t1023-esdhc", "fsl,esdhc";
380		fsl,iommu-parent = <&pamu0>;
381		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
382		sdhci,auto-cmd12;
383		no-1-8-v;
384	};
385/include/ "qoriq-i2c-0.dtsi"
386/include/ "qoriq-i2c-1.dtsi"
387/include/ "qoriq-duart-0.dtsi"
388/include/ "qoriq-duart-1.dtsi"
389/include/ "qoriq-gpio-0.dtsi"
390/include/ "qoriq-gpio-1.dtsi"
391/include/ "qoriq-gpio-2.dtsi"
392/include/ "qoriq-gpio-3.dtsi"
393/include/ "qoriq-usb2-mph-0.dtsi"
394	usb0: usb@210000 {
395		compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
396		fsl,iommu-parent = <&pamu0>;
397		fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
398		phy_type = "utmi";
399		port0;
400	};
401/include/ "qoriq-usb2-dr-0.dtsi"
402	usb1: usb@211000 {
403		compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
404		fsl,iommu-parent = <&pamu0>;
405		fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
406		dr_mode = "host";
407		phy_type = "utmi";
408	};
409/include/ "qoriq-sata2-0.dtsi"
410	sata@220000 {
411		fsl,iommu-parent = <&pamu0>;
412		fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
413	};
414
415/include/ "qoriq-sec5.0-0.dtsi"
416
417/include/ "qoriq-fman3l-0.dtsi"
418/include/ "qoriq-fman3-0-10g-0-best-effort.dtsi"
419/include/ "qoriq-fman3-0-1g-1.dtsi"
420/include/ "qoriq-fman3-0-1g-2.dtsi"
421/include/ "qoriq-fman3-0-1g-3.dtsi"
422	fman@400000 {
423		enet0: ethernet@e0000 {
424		};
425
426		enet1: ethernet@e2000 {
427		};
428
429		enet2: ethernet@e4000 {
430		};
431
432		enet3: ethernet@e6000 {
433		};
434	};
435};
436