1cdc3c44cSVakul Garg/* 2cdc3c44cSVakul Garg * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ] 3cdc3c44cSVakul Garg * 4cdc3c44cSVakul Garg * Copyright 2012 Freescale Semiconductor Inc. 5cdc3c44cSVakul Garg * 6cdc3c44cSVakul Garg * Redistribution and use in source and binary forms, with or without 7cdc3c44cSVakul Garg * modification, are permitted provided that the following conditions are met: 8cdc3c44cSVakul Garg * * Redistributions of source code must retain the above copyright 9cdc3c44cSVakul Garg * notice, this list of conditions and the following disclaimer. 10cdc3c44cSVakul Garg * * Redistributions in binary form must reproduce the above copyright 11cdc3c44cSVakul Garg * notice, this list of conditions and the following disclaimer in the 12cdc3c44cSVakul Garg * documentation and/or other materials provided with the distribution. 13cdc3c44cSVakul Garg * * Neither the name of Freescale Semiconductor nor the 14cdc3c44cSVakul Garg * names of its contributors may be used to endorse or promote products 15cdc3c44cSVakul Garg * derived from this software without specific prior written permission. 16cdc3c44cSVakul Garg * 17cdc3c44cSVakul Garg * 18cdc3c44cSVakul Garg * ALTERNATIVELY, this software may be distributed under the terms of the 19cdc3c44cSVakul Garg * GNU General Public License ("GPL") as published by the Free Software 20cdc3c44cSVakul Garg * Foundation, either version 2 of that License or (at your option) any 21cdc3c44cSVakul Garg * later version. 22cdc3c44cSVakul Garg * 23cdc3c44cSVakul Garg * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24cdc3c44cSVakul Garg * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25cdc3c44cSVakul Garg * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26cdc3c44cSVakul Garg * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27cdc3c44cSVakul Garg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28cdc3c44cSVakul Garg * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29cdc3c44cSVakul Garg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30cdc3c44cSVakul Garg * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31cdc3c44cSVakul Garg * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32cdc3c44cSVakul Garg * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33cdc3c44cSVakul Garg */ 34cdc3c44cSVakul Garg 35cdc3c44cSVakul Gargcrypto: crypto@300000 { 36cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; 37a2adb1aeSVakul Garg fsl,sec-era = <5>; 38cdc3c44cSVakul Garg #address-cells = <1>; 39cdc3c44cSVakul Garg #size-cells = <1>; 40cdc3c44cSVakul Garg reg = <0x300000 0x10000>; 41cdc3c44cSVakul Garg ranges = <0 0x300000 0x10000>; 42cdc3c44cSVakul Garg interrupts = <92 2 0 0>; 43cdc3c44cSVakul Garg 44cdc3c44cSVakul Garg sec_jr0: jr@1000 { 45cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-job-ring", 46cdc3c44cSVakul Garg "fsl,sec-v4.0-job-ring"; 47cdc3c44cSVakul Garg reg = <0x1000 0x1000>; 48cdc3c44cSVakul Garg interrupts = <88 2 0 0>; 49cdc3c44cSVakul Garg }; 50cdc3c44cSVakul Garg 51cdc3c44cSVakul Garg sec_jr1: jr@2000 { 52cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-job-ring", 53cdc3c44cSVakul Garg "fsl,sec-v4.0-job-ring"; 54cdc3c44cSVakul Garg reg = <0x2000 0x1000>; 55cdc3c44cSVakul Garg interrupts = <89 2 0 0>; 56cdc3c44cSVakul Garg }; 57cdc3c44cSVakul Garg 58cdc3c44cSVakul Garg sec_jr2: jr@3000 { 59cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-job-ring", 60cdc3c44cSVakul Garg "fsl,sec-v4.0-job-ring"; 61cdc3c44cSVakul Garg reg = <0x3000 0x1000>; 62cdc3c44cSVakul Garg interrupts = <90 2 0 0>; 63cdc3c44cSVakul Garg }; 64cdc3c44cSVakul Garg 65cdc3c44cSVakul Garg sec_jr3: jr@4000 { 66cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-job-ring", 67cdc3c44cSVakul Garg "fsl,sec-v4.0-job-ring"; 68cdc3c44cSVakul Garg reg = <0x4000 0x1000>; 69cdc3c44cSVakul Garg interrupts = <91 2 0 0>; 70cdc3c44cSVakul Garg }; 71cdc3c44cSVakul Garg 72cdc3c44cSVakul Garg rtic@6000 { 73cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-rtic", 74cdc3c44cSVakul Garg "fsl,sec-v4.0-rtic"; 75cdc3c44cSVakul Garg #address-cells = <1>; 76cdc3c44cSVakul Garg #size-cells = <1>; 77cdc3c44cSVakul Garg reg = <0x6000 0x100>; 78cdc3c44cSVakul Garg ranges = <0x0 0x6100 0xe00>; 79cdc3c44cSVakul Garg 80cdc3c44cSVakul Garg rtic_a: rtic-a@0 { 81cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-rtic-memory", 82cdc3c44cSVakul Garg "fsl,sec-v4.0-rtic-memory"; 83cdc3c44cSVakul Garg reg = <0x00 0x20 0x100 0x80>; 84cdc3c44cSVakul Garg }; 85cdc3c44cSVakul Garg 86cdc3c44cSVakul Garg rtic_b: rtic-b@20 { 87cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-rtic-memory", 88cdc3c44cSVakul Garg "fsl,sec-v4.0-rtic-memory"; 89cdc3c44cSVakul Garg reg = <0x20 0x20 0x200 0x80>; 90cdc3c44cSVakul Garg }; 91cdc3c44cSVakul Garg 92cdc3c44cSVakul Garg rtic_c: rtic-c@40 { 93cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-rtic-memory", 94cdc3c44cSVakul Garg "fsl,sec-v4.0-rtic-memory"; 95cdc3c44cSVakul Garg reg = <0x40 0x20 0x300 0x80>; 96cdc3c44cSVakul Garg }; 97cdc3c44cSVakul Garg 98cdc3c44cSVakul Garg rtic_d: rtic-d@60 { 99cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-rtic-memory", 100cdc3c44cSVakul Garg "fsl,sec-v4.0-rtic-memory"; 101cdc3c44cSVakul Garg reg = <0x60 0x20 0x500 0x80>; 102cdc3c44cSVakul Garg }; 103cdc3c44cSVakul Garg }; 104cdc3c44cSVakul Garg}; 105cdc3c44cSVakul Garg 106cdc3c44cSVakul Gargsec_mon: sec_mon@314000 { 107cdc3c44cSVakul Garg compatible = "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon"; 108cdc3c44cSVakul Garg reg = <0x314000 0x1000>; 109cdc3c44cSVakul Garg interrupts = <93 2 0 0>; 110cdc3c44cSVakul Garg}; 111