1/* 2 * P1023/P1017 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2011 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35&lbc { 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus"; 39 interrupts = <19 2 0 0>; 40}; 41 42/* controller at 0xa000 */ 43&pci0 { 44 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 45 device_type = "pci"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0x0 0xff>; 49 clock-frequency = <33333333>; 50 interrupts = <16 2 0 0>; 51 pcie@0 { 52 reg = <0 0 0 0 0>; 53 #interrupt-cells = <1>; 54 #size-cells = <2>; 55 #address-cells = <3>; 56 device_type = "pci"; 57 interrupts = <16 2 0 0>; 58 }; 59}; 60 61/* controller at 0x9000 */ 62&pci1 { 63 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 64 device_type = "pci"; 65 #size-cells = <2>; 66 #address-cells = <3>; 67 bus-range = <0 0xff>; 68 clock-frequency = <33333333>; 69 interrupts = <16 2 0 0>; 70 pcie@0 { 71 reg = <0 0 0 0 0>; 72 #interrupt-cells = <1>; 73 #size-cells = <2>; 74 #address-cells = <3>; 75 device_type = "pci"; 76 interrupts = <16 2 0 0>; 77 }; 78}; 79 80/* controller at 0xb000 */ 81&pci2 { 82 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 83 device_type = "pci"; 84 #size-cells = <2>; 85 #address-cells = <3>; 86 bus-range = <0x0 0xff>; 87 clock-frequency = <33333333>; 88 interrupts = <16 2 0 0>; 89 pcie@0 { 90 reg = <0 0 0 0 0>; 91 #interrupt-cells = <1>; 92 #size-cells = <2>; 93 #address-cells = <3>; 94 device_type = "pci"; 95 interrupts = <16 2 0 0>; 96 }; 97}; 98 99&soc { 100 #address-cells = <1>; 101 #size-cells = <1>; 102 device_type = "soc"; 103 compatible = "fsl,p1023-immr", "simple-bus"; 104 bus-frequency = <0>; // Filled out by uboot. 105 106 ecm-law@0 { 107 compatible = "fsl,ecm-law"; 108 reg = <0x0 0x1000>; 109 fsl,num-laws = <12>; 110 }; 111 112 ecm@1000 { 113 compatible = "fsl,p1023-ecm", "fsl,ecm"; 114 reg = <0x1000 0x1000>; 115 interrupts = <16 2 0 0>; 116 }; 117 118 memory-controller@2000 { 119 compatible = "fsl,p1023-memory-controller"; 120 reg = <0x2000 0x1000>; 121 interrupts = <16 2 0 0>; 122 }; 123 124/include/ "pq3-i2c-0.dtsi" 125/include/ "pq3-i2c-1.dtsi" 126/include/ "pq3-duart-0.dtsi" 127 128/include/ "pq3-espi-0.dtsi" 129 spi@7000 { 130 fsl,espi-num-chipselects = <4>; 131 }; 132 133/include/ "pq3-gpio-0.dtsi" 134 135 L2: l2-cache-controller@20000 { 136 compatible = "fsl,p1023-l2-cache-controller"; 137 reg = <0x20000 0x1000>; 138 cache-line-size = <32>; // 32 bytes 139 cache-size = <0x40000>; // L2,256K 140 interrupts = <16 2 0 0>; 141 }; 142 143/include/ "pq3-dma-0.dtsi" 144/include/ "pq3-usb2-dr-0.dtsi" 145 usb@22000 { 146 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; 147 }; 148 149 crypto: crypto@300000 { 150 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 151 fsl,sec-era = <3>; 152 #address-cells = <1>; 153 #size-cells = <1>; 154 reg = <0x30000 0x10000>; 155 ranges = <0 0x30000 0x10000>; 156 interrupts = <58 2 0 0>; 157 158 sec_jr0: jr@1000 { 159 compatible = "fsl,sec-v4.2-job-ring", 160 "fsl,sec-v4.0-job-ring"; 161 reg = <0x1000 0x1000>; 162 interrupts = <45 2 0 0>; 163 }; 164 165 sec_jr1: jr@2000 { 166 compatible = "fsl,sec-v4.2-job-ring", 167 "fsl,sec-v4.0-job-ring"; 168 reg = <0x2000 0x1000>; 169 interrupts = <45 2 0 0>; 170 }; 171 172 sec_jr2: jr@3000 { 173 compatible = "fsl,sec-v4.2-job-ring", 174 "fsl,sec-v4.0-job-ring"; 175 reg = <0x3000 0x1000>; 176 interrupts = <57 2 0 0>; 177 }; 178 179 sec_jr3: jr@4000 { 180 compatible = "fsl,sec-v4.2-job-ring", 181 "fsl,sec-v4.0-job-ring"; 182 reg = <0x4000 0x1000>; 183 interrupts = <57 2 0 0>; 184 }; 185 186 rtic@6000 { 187 compatible = "fsl,sec-v4.2-rtic", 188 "fsl,sec-v4.0-rtic"; 189 #address-cells = <1>; 190 #size-cells = <1>; 191 reg = <0x6000 0x100>; 192 ranges = <0x0 0x6100 0xe00>; 193 194 rtic_a: rtic-a@0 { 195 compatible = "fsl,sec-v4.2-rtic-memory", 196 "fsl,sec-v4.0-rtic-memory"; 197 reg = <0x00 0x20 0x100 0x80>; 198 }; 199 200 rtic_b: rtic-b@20 { 201 compatible = "fsl,sec-v4.2-rtic-memory", 202 "fsl,sec-v4.0-rtic-memory"; 203 reg = <0x20 0x20 0x200 0x80>; 204 }; 205 206 rtic_c: rtic-c@40 { 207 compatible = "fsl,sec-v4.2-rtic-memory", 208 "fsl,sec-v4.0-rtic-memory"; 209 reg = <0x40 0x20 0x300 0x80>; 210 }; 211 212 rtic_d: rtic-d@60 { 213 compatible = "fsl,sec-v4.2-rtic-memory", 214 "fsl,sec-v4.0-rtic-memory"; 215 reg = <0x60 0x20 0x500 0x80>; 216 }; 217 }; 218 }; 219 220/include/ "pq3-mpic.dtsi" 221/include/ "pq3-mpic-timer-B.dtsi" 222 223 global-utilities@e0000 { 224 compatible = "fsl,p1023-guts"; 225 reg = <0xe0000 0x1000>; 226 fsl,has-rstcr; 227 }; 228}; 229