1/* 2 * P1023/P1017 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35&bman_fbpr { 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 38}; 39 40&lbc { 41 #address-cells = <2>; 42 #size-cells = <1>; 43 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus"; 44 interrupts = <19 2 0 0>, 45 <16 2 0 0>; 46}; 47 48/* controller at 0xa000 */ 49&pci0 { 50 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 51 device_type = "pci"; 52 #size-cells = <2>; 53 #address-cells = <3>; 54 bus-range = <0x0 0xff>; 55 clock-frequency = <33333333>; 56 interrupts = <16 2 0 0>; 57 pcie@0 { 58 reg = <0 0 0 0 0>; 59 #interrupt-cells = <1>; 60 #size-cells = <2>; 61 #address-cells = <3>; 62 device_type = "pci"; 63 interrupts = <16 2 0 0>; 64 }; 65}; 66 67/* controller at 0x9000 */ 68&pci1 { 69 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 70 device_type = "pci"; 71 #size-cells = <2>; 72 #address-cells = <3>; 73 bus-range = <0 0xff>; 74 clock-frequency = <33333333>; 75 interrupts = <16 2 0 0>; 76 pcie@0 { 77 reg = <0 0 0 0 0>; 78 #interrupt-cells = <1>; 79 #size-cells = <2>; 80 #address-cells = <3>; 81 device_type = "pci"; 82 interrupts = <16 2 0 0>; 83 }; 84}; 85 86/* controller at 0xb000 */ 87&pci2 { 88 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 89 device_type = "pci"; 90 #size-cells = <2>; 91 #address-cells = <3>; 92 bus-range = <0x0 0xff>; 93 clock-frequency = <33333333>; 94 interrupts = <16 2 0 0>; 95 pcie@0 { 96 reg = <0 0 0 0 0>; 97 #interrupt-cells = <1>; 98 #size-cells = <2>; 99 #address-cells = <3>; 100 device_type = "pci"; 101 interrupts = <16 2 0 0>; 102 }; 103}; 104 105&bportals { 106 #address-cells = <1>; 107 #size-cells = <1>; 108 compatible = "simple-bus"; 109 110 bman-portal@0 { 111 compatible = "fsl,bman-portal"; 112 reg = <0x0 0x4000>, <0x100000 0x1000>; 113 interrupts = <30 2 0 0>; 114 }; 115 bman-portal@4000 { 116 compatible = "fsl,bman-portal"; 117 reg = <0x4000 0x4000>, <0x101000 0x1000>; 118 interrupts = <32 2 0 0>; 119 }; 120 bman-portal@8000 { 121 compatible = "fsl,bman-portal"; 122 reg = <0x8000 0x4000>, <0x102000 0x1000>; 123 interrupts = <34 2 0 0>; 124 }; 125}; 126 127&soc { 128 #address-cells = <1>; 129 #size-cells = <1>; 130 device_type = "soc"; 131 compatible = "fsl,p1023-immr", "simple-bus"; 132 bus-frequency = <0>; // Filled out by uboot. 133 134 ecm-law@0 { 135 compatible = "fsl,ecm-law"; 136 reg = <0x0 0x1000>; 137 fsl,num-laws = <12>; 138 }; 139 140 ecm@1000 { 141 compatible = "fsl,p1023-ecm", "fsl,ecm"; 142 reg = <0x1000 0x1000>; 143 interrupts = <16 2 0 0>; 144 }; 145 146 memory-controller@2000 { 147 compatible = "fsl,p1023-memory-controller"; 148 reg = <0x2000 0x1000>; 149 interrupts = <16 2 0 0>; 150 }; 151 152/include/ "pq3-i2c-0.dtsi" 153/include/ "pq3-i2c-1.dtsi" 154/include/ "pq3-duart-0.dtsi" 155 156/include/ "pq3-espi-0.dtsi" 157 spi@7000 { 158 fsl,espi-num-chipselects = <4>; 159 }; 160 161/include/ "pq3-gpio-0.dtsi" 162 163 L2: l2-cache-controller@20000 { 164 compatible = "fsl,p1023-l2-cache-controller"; 165 reg = <0x20000 0x1000>; 166 cache-line-size = <32>; // 32 bytes 167 cache-size = <0x40000>; // L2,256K 168 interrupts = <16 2 0 0>; 169 }; 170 171/include/ "pq3-dma-0.dtsi" 172/include/ "pq3-usb2-dr-0.dtsi" 173 usb@22000 { 174 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; 175 }; 176 177 crypto: crypto@300000 { 178 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 179 fsl,sec-era = <3>; 180 #address-cells = <1>; 181 #size-cells = <1>; 182 reg = <0x30000 0x10000>; 183 ranges = <0 0x30000 0x10000>; 184 interrupts = <58 2 0 0>; 185 186 sec_jr0: jr@1000 { 187 compatible = "fsl,sec-v4.2-job-ring", 188 "fsl,sec-v4.0-job-ring"; 189 reg = <0x1000 0x1000>; 190 interrupts = <45 2 0 0>; 191 }; 192 193 sec_jr1: jr@2000 { 194 compatible = "fsl,sec-v4.2-job-ring", 195 "fsl,sec-v4.0-job-ring"; 196 reg = <0x2000 0x1000>; 197 interrupts = <45 2 0 0>; 198 }; 199 200 sec_jr2: jr@3000 { 201 compatible = "fsl,sec-v4.2-job-ring", 202 "fsl,sec-v4.0-job-ring"; 203 reg = <0x3000 0x1000>; 204 interrupts = <57 2 0 0>; 205 }; 206 207 sec_jr3: jr@4000 { 208 compatible = "fsl,sec-v4.2-job-ring", 209 "fsl,sec-v4.0-job-ring"; 210 reg = <0x4000 0x1000>; 211 interrupts = <57 2 0 0>; 212 }; 213 214 rtic@6000 { 215 compatible = "fsl,sec-v4.2-rtic", 216 "fsl,sec-v4.0-rtic"; 217 #address-cells = <1>; 218 #size-cells = <1>; 219 reg = <0x6000 0x100>; 220 ranges = <0x0 0x6100 0xe00>; 221 222 rtic_a: rtic-a@0 { 223 compatible = "fsl,sec-v4.2-rtic-memory", 224 "fsl,sec-v4.0-rtic-memory"; 225 reg = <0x00 0x20 0x100 0x80>; 226 }; 227 228 rtic_b: rtic-b@20 { 229 compatible = "fsl,sec-v4.2-rtic-memory", 230 "fsl,sec-v4.0-rtic-memory"; 231 reg = <0x20 0x20 0x200 0x80>; 232 }; 233 234 rtic_c: rtic-c@40 { 235 compatible = "fsl,sec-v4.2-rtic-memory", 236 "fsl,sec-v4.0-rtic-memory"; 237 reg = <0x40 0x20 0x300 0x80>; 238 }; 239 240 rtic_d: rtic-d@60 { 241 compatible = "fsl,sec-v4.2-rtic-memory", 242 "fsl,sec-v4.0-rtic-memory"; 243 reg = <0x60 0x20 0x500 0x80>; 244 }; 245 }; 246 }; 247 248/include/ "pq3-mpic.dtsi" 249/include/ "pq3-mpic-timer-B.dtsi" 250 251 bman: bman@8a000 { 252 compatible = "fsl,bman"; 253 reg = <0x8a000 0x1000>; 254 interrupts = <16 2 0 0>; 255 fsl,bman-portals = <&bportals>; 256 memory-region = <&bman_fbpr>; 257 }; 258 259 global-utilities@e0000 { 260 compatible = "fsl,p1023-guts"; 261 reg = <0xe0000 0x1000>; 262 fsl,has-rstcr; 263 }; 264}; 265