1fdc8c4adSValentin Longchamp/* 2fdc8c4adSValentin Longchamp * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS 3fdc8c4adSValentin Longchamp * 4fdc8c4adSValentin Longchamp * (C) Copyright 2016 5fdc8c4adSValentin Longchamp * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com 6fdc8c4adSValentin Longchamp * 7fdc8c4adSValentin Longchamp * Copyright 2014 - 2015 Freescale Semiconductor Inc. 8fdc8c4adSValentin Longchamp * 9fdc8c4adSValentin Longchamp * This program is free software; you can redistribute it and/or modify it 10fdc8c4adSValentin Longchamp * under the terms of the GNU General Public License as published by the 11fdc8c4adSValentin Longchamp * Free Software Foundation; either version 2 of the License, or (at your 12fdc8c4adSValentin Longchamp * option) any later version. 13fdc8c4adSValentin Longchamp */ 14fdc8c4adSValentin Longchamp 15fdc8c4adSValentin Longchamp/include/ "t104xsi-pre.dtsi" 16fdc8c4adSValentin Longchamp 17fdc8c4adSValentin Longchamp/ { 18fdc8c4adSValentin Longchamp model = "keymile,kmcent2"; 19fdc8c4adSValentin Longchamp compatible = "keymile,kmcent2"; 20fdc8c4adSValentin Longchamp 21fdc8c4adSValentin Longchamp aliases { 22fdc8c4adSValentin Longchamp front_phy = &front_phy; 23fdc8c4adSValentin Longchamp }; 24fdc8c4adSValentin Longchamp 25fdc8c4adSValentin Longchamp reserved-memory { 26fdc8c4adSValentin Longchamp #address-cells = <2>; 27fdc8c4adSValentin Longchamp #size-cells = <2>; 28fdc8c4adSValentin Longchamp ranges; 29fdc8c4adSValentin Longchamp 30fdc8c4adSValentin Longchamp bman_fbpr: bman-fbpr { 31fdc8c4adSValentin Longchamp size = <0 0x1000000>; 32fdc8c4adSValentin Longchamp alignment = <0 0x1000000>; 33fdc8c4adSValentin Longchamp }; 34fdc8c4adSValentin Longchamp qman_fqd: qman-fqd { 35fdc8c4adSValentin Longchamp size = <0 0x400000>; 36fdc8c4adSValentin Longchamp alignment = <0 0x400000>; 37fdc8c4adSValentin Longchamp }; 38fdc8c4adSValentin Longchamp qman_pfdr: qman-pfdr { 39fdc8c4adSValentin Longchamp size = <0 0x2000000>; 40fdc8c4adSValentin Longchamp alignment = <0 0x2000000>; 41fdc8c4adSValentin Longchamp }; 42fdc8c4adSValentin Longchamp }; 43fdc8c4adSValentin Longchamp 44fdc8c4adSValentin Longchamp ifc: localbus@ffe124000 { 45fdc8c4adSValentin Longchamp reg = <0xf 0xfe124000 0 0x2000>; 46fdc8c4adSValentin Longchamp ranges = <0 0 0xf 0xe8000000 0x04000000 47fdc8c4adSValentin Longchamp 1 0 0xf 0xfa000000 0x00010000 48fdc8c4adSValentin Longchamp 2 0 0xf 0xfb000000 0x00010000 49fdc8c4adSValentin Longchamp 4 0 0xf 0xc0000000 0x08000000 50fdc8c4adSValentin Longchamp 6 0 0xf 0xd0000000 0x08000000 51fdc8c4adSValentin Longchamp 7 0 0xf 0xd8000000 0x08000000>; 52fdc8c4adSValentin Longchamp 53fdc8c4adSValentin Longchamp nor@0,0 { 54fdc8c4adSValentin Longchamp #address-cells = <1>; 55fdc8c4adSValentin Longchamp #size-cells = <1>; 56fdc8c4adSValentin Longchamp compatible = "cfi-flash"; 57fdc8c4adSValentin Longchamp reg = <0x0 0x0 0x04000000>; 58fdc8c4adSValentin Longchamp bank-width = <2>; 59fdc8c4adSValentin Longchamp device-width = <2>; 60fdc8c4adSValentin Longchamp }; 61fdc8c4adSValentin Longchamp 62fdc8c4adSValentin Longchamp nand@1,0 { 63fdc8c4adSValentin Longchamp #address-cells = <1>; 64fdc8c4adSValentin Longchamp #size-cells = <1>; 65fdc8c4adSValentin Longchamp compatible = "fsl,ifc-nand"; 66fdc8c4adSValentin Longchamp reg = <0x1 0x0 0x10000>; 67fdc8c4adSValentin Longchamp }; 68fdc8c4adSValentin Longchamp 69fdc8c4adSValentin Longchamp board-control@2,0 { 70fdc8c4adSValentin Longchamp compatible = "keymile,qriox"; 71fdc8c4adSValentin Longchamp reg = <0x2 0x0 0x80>; 72fdc8c4adSValentin Longchamp }; 73fdc8c4adSValentin Longchamp 74fdc8c4adSValentin Longchamp chassis-mgmt@6,0 { 75fdc8c4adSValentin Longchamp compatible = "keymile,bfticu"; 76fdc8c4adSValentin Longchamp reg = <6 0 0x100>; 77fdc8c4adSValentin Longchamp interrupt-controller; 78fdc8c4adSValentin Longchamp interrupt-parent = <&mpic>; 79fdc8c4adSValentin Longchamp interrupts = <11 1 0 0>; 80fdc8c4adSValentin Longchamp #interrupt-cells = <1>; 81fdc8c4adSValentin Longchamp }; 82fdc8c4adSValentin Longchamp 83fdc8c4adSValentin Longchamp }; 84fdc8c4adSValentin Longchamp 85fdc8c4adSValentin Longchamp memory { 86fdc8c4adSValentin Longchamp device_type = "memory"; 87fdc8c4adSValentin Longchamp }; 88fdc8c4adSValentin Longchamp 89fdc8c4adSValentin Longchamp dcsr: dcsr@f00000000 { 90fdc8c4adSValentin Longchamp ranges = <0x00000000 0xf 0x00000000 0x01072000>; 91fdc8c4adSValentin Longchamp }; 92fdc8c4adSValentin Longchamp 93fdc8c4adSValentin Longchamp bportals: bman-portals@ff4000000 { 94fdc8c4adSValentin Longchamp ranges = <0x0 0xf 0xf4000000 0x2000000>; 95fdc8c4adSValentin Longchamp }; 96fdc8c4adSValentin Longchamp 97fdc8c4adSValentin Longchamp qportals: qman-portals@ff6000000 { 98fdc8c4adSValentin Longchamp ranges = <0x0 0xf 0xf6000000 0x2000000>; 99fdc8c4adSValentin Longchamp }; 100fdc8c4adSValentin Longchamp 101fdc8c4adSValentin Longchamp soc: soc@ffe000000 { 102fdc8c4adSValentin Longchamp ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 103fdc8c4adSValentin Longchamp reg = <0xf 0xfe000000 0 0x00001000>; 104fdc8c4adSValentin Longchamp 105fdc8c4adSValentin Longchamp spi@110000 { 106fdc8c4adSValentin Longchamp network-clock@1 { 107fdc8c4adSValentin Longchamp compatible = "zarlink,zl30364"; 108fdc8c4adSValentin Longchamp reg = <1>; 109fdc8c4adSValentin Longchamp spi-max-frequency = <1000000>; 110fdc8c4adSValentin Longchamp }; 111fdc8c4adSValentin Longchamp }; 112fdc8c4adSValentin Longchamp 113fdc8c4adSValentin Longchamp sdhc@114000 { 114fdc8c4adSValentin Longchamp status = "disabled"; 115fdc8c4adSValentin Longchamp }; 116fdc8c4adSValentin Longchamp 117fdc8c4adSValentin Longchamp i2c@118000 { 118fdc8c4adSValentin Longchamp clock-frequency = <100000>; 119fdc8c4adSValentin Longchamp 120fdc8c4adSValentin Longchamp mux@70 { 121fdc8c4adSValentin Longchamp compatible = "nxp,pca9547"; 122fdc8c4adSValentin Longchamp reg = <0x70>; 123fdc8c4adSValentin Longchamp #address-cells = <1>; 124fdc8c4adSValentin Longchamp #size-cells = <0>; 125fdc8c4adSValentin Longchamp i2c-mux-idle-disconnect; 126fdc8c4adSValentin Longchamp 127fdc8c4adSValentin Longchamp i2c@0 { 128fdc8c4adSValentin Longchamp reg = <0>; 129fdc8c4adSValentin Longchamp #address-cells = <1>; 130fdc8c4adSValentin Longchamp #size-cells = <0>; 131fdc8c4adSValentin Longchamp 132fdc8c4adSValentin Longchamp eeprom@54 { 133fdc8c4adSValentin Longchamp compatible = "24c02"; 134fdc8c4adSValentin Longchamp reg = <0x54>; 135fdc8c4adSValentin Longchamp pagesize = <2>; 136fdc8c4adSValentin Longchamp read-only; 137fdc8c4adSValentin Longchamp label = "ddr3-spd"; 138fdc8c4adSValentin Longchamp }; 139fdc8c4adSValentin Longchamp }; 140fdc8c4adSValentin Longchamp 141fdc8c4adSValentin Longchamp i2c@7 { 142fdc8c4adSValentin Longchamp reg = <7>; 143fdc8c4adSValentin Longchamp #address-cells = <1>; 144fdc8c4adSValentin Longchamp #size-cells = <0>; 145fdc8c4adSValentin Longchamp 146fdc8c4adSValentin Longchamp temp-sensor@48 { 147fdc8c4adSValentin Longchamp compatible = "national,lm75"; 148fdc8c4adSValentin Longchamp reg = <0x48>; 149fdc8c4adSValentin Longchamp label = "SENSOR_0"; 150fdc8c4adSValentin Longchamp }; 151fdc8c4adSValentin Longchamp temp-sensor@4a { 152fdc8c4adSValentin Longchamp compatible = "national,lm75"; 153fdc8c4adSValentin Longchamp reg = <0x4a>; 154fdc8c4adSValentin Longchamp label = "SENSOR_2"; 155fdc8c4adSValentin Longchamp }; 156fdc8c4adSValentin Longchamp temp-sensor@4b { 157fdc8c4adSValentin Longchamp compatible = "national,lm75"; 158fdc8c4adSValentin Longchamp reg = <0x4b>; 159fdc8c4adSValentin Longchamp label = "SENSOR_3"; 160fdc8c4adSValentin Longchamp }; 161fdc8c4adSValentin Longchamp }; 162fdc8c4adSValentin Longchamp }; 163fdc8c4adSValentin Longchamp }; 164fdc8c4adSValentin Longchamp 165fdc8c4adSValentin Longchamp i2c@118100 { 166fdc8c4adSValentin Longchamp clock-frequency = <100000>; 167fdc8c4adSValentin Longchamp 168fdc8c4adSValentin Longchamp eeprom@50 { 169fdc8c4adSValentin Longchamp compatible = "atmel,24c08"; 170fdc8c4adSValentin Longchamp reg = <0x50>; 171fdc8c4adSValentin Longchamp pagesize = <16>; 172fdc8c4adSValentin Longchamp }; 173fdc8c4adSValentin Longchamp 174fdc8c4adSValentin Longchamp eeprom@54 { 175fdc8c4adSValentin Longchamp compatible = "atmel,24c08"; 176fdc8c4adSValentin Longchamp reg = <0x54>; 177fdc8c4adSValentin Longchamp pagesize = <16>; 178fdc8c4adSValentin Longchamp }; 179fdc8c4adSValentin Longchamp }; 180fdc8c4adSValentin Longchamp 181fdc8c4adSValentin Longchamp i2c@119000 { 182fdc8c4adSValentin Longchamp status = "disabled"; 183fdc8c4adSValentin Longchamp }; 184fdc8c4adSValentin Longchamp 185fdc8c4adSValentin Longchamp i2c@119100 { 186fdc8c4adSValentin Longchamp status = "disabled"; 187fdc8c4adSValentin Longchamp }; 188fdc8c4adSValentin Longchamp 189fdc8c4adSValentin Longchamp serial2: serial@11d500 { 190fdc8c4adSValentin Longchamp status = "disabled"; 191fdc8c4adSValentin Longchamp }; 192fdc8c4adSValentin Longchamp 193fdc8c4adSValentin Longchamp serial3: serial@11d600 { 194fdc8c4adSValentin Longchamp status = "disabled"; 195fdc8c4adSValentin Longchamp }; 196fdc8c4adSValentin Longchamp 197fdc8c4adSValentin Longchamp usb0: usb@210000 { 198fdc8c4adSValentin Longchamp status = "disabled"; 199fdc8c4adSValentin Longchamp }; 200fdc8c4adSValentin Longchamp usb1: usb@211000 { 201fdc8c4adSValentin Longchamp status = "disabled"; 202fdc8c4adSValentin Longchamp }; 203fdc8c4adSValentin Longchamp 204fdc8c4adSValentin Longchamp display@180000 { 205fdc8c4adSValentin Longchamp status = "disabled"; 206fdc8c4adSValentin Longchamp }; 207fdc8c4adSValentin Longchamp 208fdc8c4adSValentin Longchamp sata@220000 { 209fdc8c4adSValentin Longchamp status = "disabled"; 210fdc8c4adSValentin Longchamp }; 211fdc8c4adSValentin Longchamp sata@221000 { 212fdc8c4adSValentin Longchamp status = "disabled"; 213fdc8c4adSValentin Longchamp }; 214fdc8c4adSValentin Longchamp 215fdc8c4adSValentin Longchamp fman@400000 { 216fdc8c4adSValentin Longchamp ethernet@e0000 { 217fdc8c4adSValentin Longchamp fixed-link = <0 1 1000 0 0>; 218fdc8c4adSValentin Longchamp phy-connection-type = "sgmii"; 219fdc8c4adSValentin Longchamp }; 220fdc8c4adSValentin Longchamp 221fdc8c4adSValentin Longchamp ethernet@e2000 { 222fdc8c4adSValentin Longchamp fixed-link = <1 1 1000 0 0>; 223fdc8c4adSValentin Longchamp phy-connection-type = "sgmii"; 224fdc8c4adSValentin Longchamp }; 225fdc8c4adSValentin Longchamp 226fdc8c4adSValentin Longchamp ethernet@e4000 { 227fdc8c4adSValentin Longchamp status = "disabled"; 228fdc8c4adSValentin Longchamp }; 229fdc8c4adSValentin Longchamp 230fdc8c4adSValentin Longchamp ethernet@e6000 { 231fdc8c4adSValentin Longchamp status = "disabled"; 232fdc8c4adSValentin Longchamp }; 233fdc8c4adSValentin Longchamp 234fdc8c4adSValentin Longchamp ethernet@e8000 { 235fdc8c4adSValentin Longchamp phy-handle = <&front_phy>; 236fdc8c4adSValentin Longchamp phy-connection-type = "rgmii"; 237fdc8c4adSValentin Longchamp }; 238fdc8c4adSValentin Longchamp 239fdc8c4adSValentin Longchamp mdio0: mdio@fc000 { 240fdc8c4adSValentin Longchamp front_phy: ethernet-phy@11 { 241fdc8c4adSValentin Longchamp reg = <0x11>; 242fdc8c4adSValentin Longchamp }; 243fdc8c4adSValentin Longchamp }; 244fdc8c4adSValentin Longchamp }; 245fdc8c4adSValentin Longchamp }; 246fdc8c4adSValentin Longchamp 247fdc8c4adSValentin Longchamp 248fdc8c4adSValentin Longchamp pci0: pcie@ffe240000 { 249fdc8c4adSValentin Longchamp reg = <0xf 0xfe240000 0 0x10000>; 250fdc8c4adSValentin Longchamp ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 251fdc8c4adSValentin Longchamp 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 252fdc8c4adSValentin Longchamp pcie@0 { 253fdc8c4adSValentin Longchamp ranges = <0x02000000 0 0xe0000000 254fdc8c4adSValentin Longchamp 0x02000000 0 0xe0000000 255fdc8c4adSValentin Longchamp 0 0x20000000 256fdc8c4adSValentin Longchamp 257fdc8c4adSValentin Longchamp 0x01000000 0 0x00000000 258fdc8c4adSValentin Longchamp 0x01000000 0 0x00000000 259fdc8c4adSValentin Longchamp 0 0x00010000>; 260fdc8c4adSValentin Longchamp }; 261fdc8c4adSValentin Longchamp }; 262fdc8c4adSValentin Longchamp 263fdc8c4adSValentin Longchamp pci1: pcie@ffe250000 { 264fdc8c4adSValentin Longchamp status = "disabled"; 265fdc8c4adSValentin Longchamp }; 266fdc8c4adSValentin Longchamp 267fdc8c4adSValentin Longchamp pci2: pcie@ffe260000 { 268fdc8c4adSValentin Longchamp status = "disabled"; 269fdc8c4adSValentin Longchamp }; 270fdc8c4adSValentin Longchamp 271fdc8c4adSValentin Longchamp pci3: pcie@ffe270000 { 272fdc8c4adSValentin Longchamp status = "disabled"; 273fdc8c4adSValentin Longchamp }; 274fdc8c4adSValentin Longchamp 275fdc8c4adSValentin Longchamp qe: qe@ffe140000 { 276fdc8c4adSValentin Longchamp ranges = <0x0 0xf 0xfe140000 0x40000>; 277fdc8c4adSValentin Longchamp reg = <0xf 0xfe140000 0 0x480>; 278fdc8c4adSValentin Longchamp brg-frequency = <0>; 279fdc8c4adSValentin Longchamp bus-frequency = <0>; 280fdc8c4adSValentin Longchamp 281fdc8c4adSValentin Longchamp si1: si@700 { 282fdc8c4adSValentin Longchamp compatible = "fsl,t1040-qe-si"; 283fdc8c4adSValentin Longchamp reg = <0x700 0x80>; 284fdc8c4adSValentin Longchamp }; 285fdc8c4adSValentin Longchamp 286fdc8c4adSValentin Longchamp siram1: siram@1000 { 287fdc8c4adSValentin Longchamp compatible = "fsl,t1040-qe-siram"; 288fdc8c4adSValentin Longchamp reg = <0x1000 0x800>; 289fdc8c4adSValentin Longchamp }; 290fdc8c4adSValentin Longchamp 291fdc8c4adSValentin Longchamp ucc_hdlc: ucc@2000 { 292fdc8c4adSValentin Longchamp device_type = "hdlc"; 293fdc8c4adSValentin Longchamp compatible = "fsl,ucc-hdlc"; 294fdc8c4adSValentin Longchamp rx-clock-name = "clk9"; 295fdc8c4adSValentin Longchamp tx-clock-name = "clk9"; 2961f6753d6SHolger Brunck fsl,hdlc-bus; 297fdc8c4adSValentin Longchamp }; 298fdc8c4adSValentin Longchamp }; 299fdc8c4adSValentin Longchamp}; 300fdc8c4adSValentin Longchamp 301fdc8c4adSValentin Longchamp#include "t1040si-post.dtsi" 302