1/*
2 * B4860 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *       notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *       notice, this list of conditions and the following disclaimer in the
12 *       documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *       names of its contributors may be used to endorse or promote products
15 *       derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/ {
38	compatible = "fsl,B4860";
39	#address-cells = <2>;
40	#size-cells = <2>;
41	interrupt-parent = <&mpic>;
42
43	aliases {
44		ccsr = &soc;
45		dcsr = &dcsr;
46
47		serial0 = &serial0;
48		serial1 = &serial1;
49		serial2 = &serial2;
50		serial3 = &serial3;
51		pci0 = &pci0;
52		dma0 = &dma0;
53		dma1 = &dma1;
54		sdhc = &sdhc;
55	};
56
57
58	cpus {
59		#address-cells = <1>;
60		#size-cells = <0>;
61
62		cpu0: PowerPC,e6500@0 {
63			device_type = "cpu";
64			reg = <0 1>;
65			next-level-cache = <&L2>;
66		};
67		cpu1: PowerPC,e6500@2 {
68			device_type = "cpu";
69			reg = <2 3>;
70			next-level-cache = <&L2>;
71		};
72		cpu2: PowerPC,e6500@4 {
73			device_type = "cpu";
74			reg = <4 5>;
75			next-level-cache = <&L2>;
76		};
77		cpu3: PowerPC,e6500@6 {
78			device_type = "cpu";
79			reg = <6 7>;
80			next-level-cache = <&L2>;
81		};
82	};
83};
84