1/*
2 * B4860 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *       notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *       notice, this list of conditions and the following disclaimer in the
12 *       documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *       names of its contributors may be used to endorse or promote products
15 *       derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "b4si-post.dtsi"
36
37/* controller at 0x200000 */
38&pci0 {
39	compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
40};
41
42&rio {
43	compatible = "fsl,srio";
44	interrupts = <16 2 1 20>;
45	#address-cells = <2>;
46	#size-cells = <2>;
47	fsl,iommu-parent = <&pamu0>;
48	ranges;
49
50	port1 {
51		#address-cells = <2>;
52		#size-cells = <2>;
53		cell-index = <1>;
54		fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
55	};
56
57	port2 {
58		#address-cells = <2>;
59		#size-cells = <2>;
60		cell-index = <2>;
61		fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
62	};
63};
64
65&dcsr {
66	dcsr-epu@0 {
67		compatible = "fsl,b4860-dcsr-epu", "fsl,dcsr-epu";
68	};
69	dcsr-npc {
70		compatible = "fsl,b4860-dcsr-cnpc", "fsl,dcsr-cnpc";
71	};
72	dcsr-dpaa@9000 {
73		compatible = "fsl,b4860-dcsr-dpaa", "fsl,dcsr-dpaa";
74	};
75	dcsr-ocn@11000 {
76		compatible = "fsl,b4860-dcsr-ocn", "fsl,dcsr-ocn";
77	};
78	dcsr-ddr@13000 {
79		compatible = "fsl,dcsr-ddr";
80		dev-handle = <&ddr2>;
81		reg = <0x13000 0x1000>;
82	};
83	dcsr-nal@18000 {
84		compatible = "fsl,b4860-dcsr-nal", "fsl,dcsr-nal";
85	};
86	dcsr-rcpm@22000 {
87		compatible = "fsl,b4860-dcsr-rcpm", "fsl,dcsr-rcpm";
88	};
89	dcsr-snpc@30000 {
90		compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
91	};
92	dcsr-snpc@31000 {
93		compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
94	};
95	dcsr-cpu-sb-proxy@108000 {
96		compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
97		cpu-handle = <&cpu1>;
98		reg = <0x108000 0x1000 0x109000 0x1000>;
99	};
100	dcsr-cpu-sb-proxy@110000 {
101		compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
102		cpu-handle = <&cpu2>;
103		reg = <0x110000 0x1000 0x111000 0x1000>;
104	};
105	dcsr-cpu-sb-proxy@118000 {
106		compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
107		cpu-handle = <&cpu3>;
108		reg = <0x118000 0x1000 0x119000 0x1000>;
109	};
110};
111
112&soc {
113	ddr2: memory-controller@9000 {
114		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
115		reg = <0x9000 0x1000>;
116		interrupts = <16 2 1 9>;
117	};
118
119	cpc: l3-cache-controller@10000 {
120		compatible = "fsl,b4860-l3-cache-controller", "cache";
121	};
122
123	guts: global-utilities@e0000 {
124		compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
125	};
126
127	clockgen: global-utilities@e1000 {
128		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
129		ranges = <0x0 0xe1000 0x1000>;
130		#address-cells = <1>;
131		#size-cells = <1>;
132
133		sysclk: sysclk {
134			#clock-cells = <0>;
135			compatible = "fsl,qoriq-sysclk-2.0";
136			clock-output-names = "sysclk";
137		};
138
139		pll0: pll0@800 {
140			#clock-cells = <1>;
141			reg = <0x800 0x4>;
142			compatible = "fsl,qoriq-core-pll-2.0";
143			clocks = <&sysclk>;
144			clock-output-names = "pll0", "pll0-div2", "pll0-div4";
145		};
146
147		pll1: pll1@820 {
148			#clock-cells = <1>;
149			reg = <0x820 0x4>;
150			compatible = "fsl,qoriq-core-pll-2.0";
151			clocks = <&sysclk>;
152			clock-output-names = "pll1", "pll1-div2", "pll1-div4";
153		};
154
155		mux0: mux0@0 {
156			#clock-cells = <0>;
157			reg = <0x0 0x4>;
158			compatible = "fsl,qoriq-core-mux-2.0";
159			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
160				<&pll1 0>, <&pll1 1>, <&pll1 2>;
161			clock-names = "pll0", "pll0-div2", "pll0-div4",
162				"pll1", "pll1-div2", "pll1-div4";
163			clock-output-names = "cmux0";
164		};
165	};
166
167	rcpm: global-utilities@e2000 {
168		compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
169	};
170
171	L2: l2-cache-controller@c20000 {
172		compatible = "fsl,b4860-l2-cache-controller";
173	};
174};
175