1ea20ff5dSDavid Gibson/*
2ea20ff5dSDavid Gibson * Device Tree Source for IBM Ebony
3ea20ff5dSDavid Gibson *
4ea20ff5dSDavid Gibson * Copyright (c) 2006, 2007 IBM Corp.
5ea20ff5dSDavid Gibson * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
6ea20ff5dSDavid Gibson *
7ea20ff5dSDavid Gibson * FIXME: Draft only!
8ea20ff5dSDavid Gibson *
9ea20ff5dSDavid Gibson * This file is licensed under the terms of the GNU General Public
10ea20ff5dSDavid Gibson * License version 2.  This program is licensed "as is" without
11ea20ff5dSDavid Gibson * any warranty of any kind, whether express or implied.
12ea20ff5dSDavid Gibson */
13ea20ff5dSDavid Gibson
14ea20ff5dSDavid Gibson/ {
15ea20ff5dSDavid Gibson	#address-cells = <2>;
16ea20ff5dSDavid Gibson	#size-cells = <1>;
17ea20ff5dSDavid Gibson	model = "ibm,ebony";
18ea20ff5dSDavid Gibson	compatible = "ibm,ebony";
1972fda114SJosh Boyer	dcr-parent = <&/cpus/cpu@0>;
20ea20ff5dSDavid Gibson
218aaed98cSStefan Roese	aliases {
228aaed98cSStefan Roese		ethernet0 = &EMAC0;
238aaed98cSStefan Roese		ethernet1 = &EMAC1;
248aaed98cSStefan Roese		serial0 = &UART0;
258aaed98cSStefan Roese		serial1 = &UART1;
268aaed98cSStefan Roese	};
278aaed98cSStefan Roese
28ea20ff5dSDavid Gibson	cpus {
29ea20ff5dSDavid Gibson		#address-cells = <1>;
30ea20ff5dSDavid Gibson		#size-cells = <0>;
31ea20ff5dSDavid Gibson
3272fda114SJosh Boyer		cpu@0 {
33ea20ff5dSDavid Gibson			device_type = "cpu";
3472fda114SJosh Boyer			model = "PowerPC,440GP";
35ea20ff5dSDavid Gibson			reg = <0>;
36ea20ff5dSDavid Gibson			clock-frequency = <0>; // Filled in by zImage
37ea20ff5dSDavid Gibson			timebase-frequency = <0>; // Filled in by zImage
388203c17eSLi Yang			i-cache-line-size = <20>;
398203c17eSLi Yang			d-cache-line-size = <20>;
40c72ea777SDavid Gibson			i-cache-size = <8000>; /* 32 kB */
41c72ea777SDavid Gibson			d-cache-size = <8000>; /* 32 kB */
42ea20ff5dSDavid Gibson			dcr-controller;
43ea20ff5dSDavid Gibson			dcr-access-method = "native";
44ea20ff5dSDavid Gibson		};
45ea20ff5dSDavid Gibson	};
46ea20ff5dSDavid Gibson
47ea20ff5dSDavid Gibson	memory {
48ea20ff5dSDavid Gibson		device_type = "memory";
49ea20ff5dSDavid Gibson		reg = <0 0 0>; // Filled in by zImage
50ea20ff5dSDavid Gibson	};
51ea20ff5dSDavid Gibson
52ea20ff5dSDavid Gibson	UIC0: interrupt-controller0 {
53ea20ff5dSDavid Gibson		compatible = "ibm,uic-440gp", "ibm,uic";
54ea20ff5dSDavid Gibson		interrupt-controller;
55ea20ff5dSDavid Gibson		cell-index = <0>;
56ea20ff5dSDavid Gibson		dcr-reg = <0c0 009>;
57ea20ff5dSDavid Gibson		#address-cells = <0>;
58ea20ff5dSDavid Gibson		#size-cells = <0>;
59ea20ff5dSDavid Gibson		#interrupt-cells = <2>;
60ea20ff5dSDavid Gibson
61ea20ff5dSDavid Gibson	};
62ea20ff5dSDavid Gibson
63ea20ff5dSDavid Gibson	UIC1: interrupt-controller1 {
64ea20ff5dSDavid Gibson		compatible = "ibm,uic-440gp", "ibm,uic";
65ea20ff5dSDavid Gibson		interrupt-controller;
66ea20ff5dSDavid Gibson		cell-index = <1>;
67ea20ff5dSDavid Gibson		dcr-reg = <0d0 009>;
68ea20ff5dSDavid Gibson		#address-cells = <0>;
69ea20ff5dSDavid Gibson		#size-cells = <0>;
70ea20ff5dSDavid Gibson		#interrupt-cells = <2>;
71ea20ff5dSDavid Gibson		interrupts = <1e 4 1f 4>; /* cascade */
72ea20ff5dSDavid Gibson		interrupt-parent = <&UIC0>;
73ea20ff5dSDavid Gibson	};
74ea20ff5dSDavid Gibson
75ea20ff5dSDavid Gibson	CPC0: cpc {
76ea20ff5dSDavid Gibson		compatible = "ibm,cpc-440gp";
77ea20ff5dSDavid Gibson		dcr-reg = <0b0 003 0e0 010>;
78ea20ff5dSDavid Gibson		// FIXME: anything else?
79ea20ff5dSDavid Gibson	};
80ea20ff5dSDavid Gibson
81ea20ff5dSDavid Gibson	plb {
82ea20ff5dSDavid Gibson		compatible = "ibm,plb-440gp", "ibm,plb4";
83ea20ff5dSDavid Gibson		#address-cells = <2>;
84ea20ff5dSDavid Gibson		#size-cells = <1>;
85ea20ff5dSDavid Gibson		ranges;
86ea20ff5dSDavid Gibson		clock-frequency = <0>; // Filled in by zImage
87ea20ff5dSDavid Gibson
88c72ea777SDavid Gibson		SDRAM0: memory-controller {
89c72ea777SDavid Gibson			compatible = "ibm,sdram-440gp";
90ea20ff5dSDavid Gibson			dcr-reg = <010 2>;
91ea20ff5dSDavid Gibson			// FIXME: anything else?
92ea20ff5dSDavid Gibson		};
93ea20ff5dSDavid Gibson
94c72ea777SDavid Gibson		SRAM0: sram {
95c72ea777SDavid Gibson			compatible = "ibm,sram-440gp";
96c72ea777SDavid Gibson			dcr-reg = <020 8 00a 1>;
97c72ea777SDavid Gibson		};
98c72ea777SDavid Gibson
99ea20ff5dSDavid Gibson		DMA0: dma {
100ea20ff5dSDavid Gibson			// FIXME: ???
101c72ea777SDavid Gibson			compatible = "ibm,dma-440gp";
102ea20ff5dSDavid Gibson			dcr-reg = <100 027>;
103ea20ff5dSDavid Gibson		};
104ea20ff5dSDavid Gibson
105ea20ff5dSDavid Gibson		MAL0: mcmal {
106ea20ff5dSDavid Gibson			compatible = "ibm,mcmal-440gp", "ibm,mcmal";
107ea20ff5dSDavid Gibson			dcr-reg = <180 62>;
108ea20ff5dSDavid Gibson			num-tx-chans = <4>;
109ea20ff5dSDavid Gibson			num-rx-chans = <4>;
110ea20ff5dSDavid Gibson			interrupt-parent = <&MAL0>;
111ea20ff5dSDavid Gibson			interrupts = <0 1 2 3 4>;
112ea20ff5dSDavid Gibson			#interrupt-cells = <1>;
113ea20ff5dSDavid Gibson			#address-cells = <0>;
114ea20ff5dSDavid Gibson			#size-cells = <0>;
115ea20ff5dSDavid Gibson			interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
116ea20ff5dSDavid Gibson					 /*RXEOB*/ 1 &UIC0 b 4
117ea20ff5dSDavid Gibson					 /*SERR*/  2 &UIC1 0 4
118ea20ff5dSDavid Gibson					 /*TXDE*/  3 &UIC1 1 4
119ea20ff5dSDavid Gibson					 /*RXDE*/  4 &UIC1 2 4>;
120ea20ff5dSDavid Gibson			interrupt-map-mask = <ffffffff>;
121ea20ff5dSDavid Gibson		};
122ea20ff5dSDavid Gibson
123ea20ff5dSDavid Gibson		POB0: opb {
124ea20ff5dSDavid Gibson			compatible = "ibm,opb-440gp", "ibm,opb";
125ea20ff5dSDavid Gibson			#address-cells = <1>;
126ea20ff5dSDavid Gibson			#size-cells = <1>;
127ea20ff5dSDavid Gibson			/* Wish there was a nicer way of specifying a full 32-bit
128ea20ff5dSDavid Gibson			   range */
129ea20ff5dSDavid Gibson			ranges = <00000000 1 00000000 80000000
130ea20ff5dSDavid Gibson				  80000000 1 80000000 80000000>;
131ea20ff5dSDavid Gibson			dcr-reg = <090 00b>;
132ea20ff5dSDavid Gibson			interrupt-parent = <&UIC1>;
133ea20ff5dSDavid Gibson			interrupts = <7 4>;
134ea20ff5dSDavid Gibson			clock-frequency = <0>; // Filled in by zImage
135ea20ff5dSDavid Gibson
136ea20ff5dSDavid Gibson			EBC0: ebc {
137c72ea777SDavid Gibson				compatible = "ibm,ebc-440gp", "ibm,ebc";
138ea20ff5dSDavid Gibson				dcr-reg = <012 2>;
139ea20ff5dSDavid Gibson				#address-cells = <2>;
140ea20ff5dSDavid Gibson				#size-cells = <1>;
141ea20ff5dSDavid Gibson				clock-frequency = <0>; // Filled in by zImage
142b2ba34f3SDavid Gibson				// ranges property is supplied by zImage
143b2ba34f3SDavid Gibson				// based on firmware's configuration of the
144b2ba34f3SDavid Gibson				// EBC bridge
145ea20ff5dSDavid Gibson				interrupts = <5 4>;
146ea20ff5dSDavid Gibson				interrupt-parent = <&UIC1>;
147ea20ff5dSDavid Gibson
148c72ea777SDavid Gibson				small-flash@0,80000 {
1492099172dSDavid Gibson					compatible = "jedec-flash";
150ea20ff5dSDavid Gibson					bank-width = <1>;
151ea20ff5dSDavid Gibson					reg = <0 80000 80000>;
1522099172dSDavid Gibson					#address-cells = <1>;
1532099172dSDavid Gibson					#size-cells = <1>;
1542099172dSDavid Gibson					partition@0 {
1552099172dSDavid Gibson						label = "OpenBIOS";
1562099172dSDavid Gibson						reg = <0 80000>;
1572099172dSDavid Gibson						read-only;
1582099172dSDavid Gibson					};
159ea20ff5dSDavid Gibson				};
160ea20ff5dSDavid Gibson
161ea20ff5dSDavid Gibson				ds1743@1,0 {
162ea20ff5dSDavid Gibson					/* NVRAM & RTC */
163ea20ff5dSDavid Gibson					compatible = "ds1743";
164ea20ff5dSDavid Gibson					reg = <1 0 2000>;
165ea20ff5dSDavid Gibson				};
166ea20ff5dSDavid Gibson
167ea20ff5dSDavid Gibson				large-flash@2,0 {
1682099172dSDavid Gibson					compatible = "jedec-flash";
169ea20ff5dSDavid Gibson					bank-width = <1>;
170ea20ff5dSDavid Gibson					reg = <2 0 400000>;
1712099172dSDavid Gibson					#address-cells = <1>;
1722099172dSDavid Gibson					#size-cells = <1>;
1732099172dSDavid Gibson					partition@0 {
1742099172dSDavid Gibson						label = "fs";
1752099172dSDavid Gibson						reg = <0 380000>;
1762099172dSDavid Gibson					};
1772099172dSDavid Gibson					partition@380000 {
1782099172dSDavid Gibson						label = "firmware";
1792099172dSDavid Gibson						reg = <380000 80000>;
1802099172dSDavid Gibson					};
181ea20ff5dSDavid Gibson				};
182ea20ff5dSDavid Gibson
183ea20ff5dSDavid Gibson				ir@3,0 {
184ea20ff5dSDavid Gibson					reg = <3 0 10>;
185ea20ff5dSDavid Gibson				};
186ea20ff5dSDavid Gibson
187ea20ff5dSDavid Gibson				fpga@7,0 {
188ea20ff5dSDavid Gibson					compatible = "Ebony-FPGA";
189ea20ff5dSDavid Gibson					reg = <7 0 10>;
1900d279d47SDavid Gibson					virtual-reg = <e8300000>;
191ea20ff5dSDavid Gibson				};
192ea20ff5dSDavid Gibson			};
193ea20ff5dSDavid Gibson
194ea20ff5dSDavid Gibson			UART0: serial@40000200 {
195ea20ff5dSDavid Gibson				device_type = "serial";
196ea20ff5dSDavid Gibson				compatible = "ns16550";
197ea20ff5dSDavid Gibson				reg = <40000200 8>;
198ea20ff5dSDavid Gibson				virtual-reg = <e0000200>;
199ea20ff5dSDavid Gibson				clock-frequency = <A8C000>;
200ea20ff5dSDavid Gibson				current-speed = <2580>;
201ea20ff5dSDavid Gibson				interrupt-parent = <&UIC0>;
202ea20ff5dSDavid Gibson				interrupts = <0 4>;
203ea20ff5dSDavid Gibson			};
204ea20ff5dSDavid Gibson
205ea20ff5dSDavid Gibson			UART1: serial@40000300 {
206ea20ff5dSDavid Gibson				device_type = "serial";
207ea20ff5dSDavid Gibson				compatible = "ns16550";
208ea20ff5dSDavid Gibson				reg = <40000300 8>;
209ea20ff5dSDavid Gibson				virtual-reg = <e0000300>;
210ea20ff5dSDavid Gibson				clock-frequency = <A8C000>;
211ea20ff5dSDavid Gibson				current-speed = <2580>;
212ea20ff5dSDavid Gibson				interrupt-parent = <&UIC0>;
213ea20ff5dSDavid Gibson				interrupts = <1 4>;
214ea20ff5dSDavid Gibson			};
215ea20ff5dSDavid Gibson
216ea20ff5dSDavid Gibson			IIC0: i2c@40000400 {
217ea20ff5dSDavid Gibson				/* FIXME */
218ea20ff5dSDavid Gibson				device_type = "i2c";
219ea20ff5dSDavid Gibson				compatible = "ibm,iic-440gp", "ibm,iic";
220ea20ff5dSDavid Gibson				reg = <40000400 14>;
221ea20ff5dSDavid Gibson				interrupt-parent = <&UIC0>;
222ea20ff5dSDavid Gibson				interrupts = <2 4>;
223ea20ff5dSDavid Gibson			};
224ea20ff5dSDavid Gibson			IIC1: i2c@40000500 {
225ea20ff5dSDavid Gibson				/* FIXME */
226ea20ff5dSDavid Gibson				device_type = "i2c";
227ea20ff5dSDavid Gibson				compatible = "ibm,iic-440gp", "ibm,iic";
228ea20ff5dSDavid Gibson				reg = <40000500 14>;
229ea20ff5dSDavid Gibson				interrupt-parent = <&UIC0>;
230ea20ff5dSDavid Gibson				interrupts = <3 4>;
231ea20ff5dSDavid Gibson			};
232ea20ff5dSDavid Gibson
233ea20ff5dSDavid Gibson			GPIO0: gpio@40000700 {
234ea20ff5dSDavid Gibson				/* FIXME */
235ea20ff5dSDavid Gibson				compatible = "ibm,gpio-440gp";
236ea20ff5dSDavid Gibson				reg = <40000700 20>;
237ea20ff5dSDavid Gibson			};
238ea20ff5dSDavid Gibson
239ea20ff5dSDavid Gibson			ZMII0: emac-zmii@40000780 {
240ea20ff5dSDavid Gibson				compatible = "ibm,zmii-440gp", "ibm,zmii";
241ea20ff5dSDavid Gibson				reg = <40000780 c>;
242ea20ff5dSDavid Gibson			};
243ea20ff5dSDavid Gibson
244ea20ff5dSDavid Gibson			EMAC0: ethernet@40000800 {
245ea20ff5dSDavid Gibson				linux,network-index = <0>;
246ea20ff5dSDavid Gibson				device_type = "network";
247ea20ff5dSDavid Gibson				compatible = "ibm,emac-440gp", "ibm,emac";
248ea20ff5dSDavid Gibson				interrupt-parent = <&UIC1>;
249ea20ff5dSDavid Gibson				interrupts = <1c 4 1d 4>;
250ea20ff5dSDavid Gibson				reg = <40000800 70>;
251ea20ff5dSDavid Gibson				local-mac-address = [000000000000]; // Filled in by zImage
252ea20ff5dSDavid Gibson				mal-device = <&MAL0>;
253ea20ff5dSDavid Gibson				mal-tx-channel = <0 1>;
254ea20ff5dSDavid Gibson				mal-rx-channel = <0>;
255ea20ff5dSDavid Gibson				cell-index = <0>;
256ea20ff5dSDavid Gibson				max-frame-size = <5dc>;
257ea20ff5dSDavid Gibson				rx-fifo-size = <1000>;
258ea20ff5dSDavid Gibson				tx-fifo-size = <800>;
259ea20ff5dSDavid Gibson				phy-mode = "rmii";
260ea20ff5dSDavid Gibson				phy-map = <00000001>;
261ea20ff5dSDavid Gibson				zmii-device = <&ZMII0>;
262ea20ff5dSDavid Gibson				zmii-channel = <0>;
263ea20ff5dSDavid Gibson			};
264ea20ff5dSDavid Gibson			EMAC1: ethernet@40000900 {
265ea20ff5dSDavid Gibson				linux,network-index = <1>;
266ea20ff5dSDavid Gibson				device_type = "network";
267ea20ff5dSDavid Gibson				compatible = "ibm,emac-440gp", "ibm,emac";
268ea20ff5dSDavid Gibson				interrupt-parent = <&UIC1>;
269ea20ff5dSDavid Gibson				interrupts = <1e 4 1f 4>;
270ea20ff5dSDavid Gibson				reg = <40000900 70>;
271ea20ff5dSDavid Gibson				local-mac-address = [000000000000]; // Filled in by zImage
272ea20ff5dSDavid Gibson				mal-device = <&MAL0>;
273ea20ff5dSDavid Gibson				mal-tx-channel = <2 3>;
274ea20ff5dSDavid Gibson				mal-rx-channel = <1>;
275ea20ff5dSDavid Gibson				cell-index = <1>;
276ea20ff5dSDavid Gibson				max-frame-size = <5dc>;
277ea20ff5dSDavid Gibson				rx-fifo-size = <1000>;
278ea20ff5dSDavid Gibson				tx-fifo-size = <800>;
279ea20ff5dSDavid Gibson				phy-mode = "rmii";
280ea20ff5dSDavid Gibson				phy-map = <00000001>;
281ea20ff5dSDavid Gibson				zmii-device = <&ZMII0>;
282ea20ff5dSDavid Gibson				zmii-channel = <1>;
283ea20ff5dSDavid Gibson			};
284ea20ff5dSDavid Gibson
285ea20ff5dSDavid Gibson
286ea20ff5dSDavid Gibson			GPT0: gpt@40000a00 {
287ea20ff5dSDavid Gibson				/* FIXME */
288ea20ff5dSDavid Gibson				reg = <40000a00 d4>;
289ea20ff5dSDavid Gibson				interrupt-parent = <&UIC0>;
290ea20ff5dSDavid Gibson				interrupts = <12 4 13 4 14 4 15 4 16 4>;
291ea20ff5dSDavid Gibson			};
292ea20ff5dSDavid Gibson
293ea20ff5dSDavid Gibson		};
294ea20ff5dSDavid Gibson
29569c07851SBenjamin Herrenschmidt		PCIX0: pci@20ec00000 {
296ea20ff5dSDavid Gibson			device_type = "pci";
29769c07851SBenjamin Herrenschmidt			#interrupt-cells = <1>;
29869c07851SBenjamin Herrenschmidt			#size-cells = <2>;
29969c07851SBenjamin Herrenschmidt			#address-cells = <3>;
30069c07851SBenjamin Herrenschmidt			compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
30169c07851SBenjamin Herrenschmidt			primary;
30269c07851SBenjamin Herrenschmidt			reg = <2 0ec00000 8	/* Config space access */
30369c07851SBenjamin Herrenschmidt			       0 0 0		/* no IACK cycles */
30469c07851SBenjamin Herrenschmidt			       2 0ed00000 4     /* Special cycles */
30569c07851SBenjamin Herrenschmidt			       2 0ec80000 f0	/* Internal registers */
30669c07851SBenjamin Herrenschmidt			       2 0ec80100 fc>;	/* Internal messaging registers */
30769c07851SBenjamin Herrenschmidt
30869c07851SBenjamin Herrenschmidt			/* Outbound ranges, one memory and one IO,
30969c07851SBenjamin Herrenschmidt			 * later cannot be changed
31069c07851SBenjamin Herrenschmidt			 */
31169c07851SBenjamin Herrenschmidt			ranges = <02000000 0 80000000 00000003 80000000 0 80000000
31269c07851SBenjamin Herrenschmidt				  01000000 0 00000000 00000002 08000000 0 00010000>;
31369c07851SBenjamin Herrenschmidt
31469c07851SBenjamin Herrenschmidt			/* Inbound 2GB range starting at 0 */
31569c07851SBenjamin Herrenschmidt			dma-ranges = <42000000 0 0 0 0 0 80000000>;
31669c07851SBenjamin Herrenschmidt
31769c07851SBenjamin Herrenschmidt			/* Ebony has all 4 IRQ pins tied together per slot */
31869c07851SBenjamin Herrenschmidt			interrupt-map-mask = <f800 0 0 0>;
31969c07851SBenjamin Herrenschmidt			interrupt-map = <
32069c07851SBenjamin Herrenschmidt				/* IDSEL 1 */
32169c07851SBenjamin Herrenschmidt				0800 0 0 0 &UIC0 17 8
32269c07851SBenjamin Herrenschmidt
32369c07851SBenjamin Herrenschmidt				/* IDSEL 2 */
32469c07851SBenjamin Herrenschmidt				1000 0 0 0 &UIC0 18 8
32569c07851SBenjamin Herrenschmidt
32669c07851SBenjamin Herrenschmidt				/* IDSEL 3 */
32769c07851SBenjamin Herrenschmidt				1800 0 0 0 &UIC0 19 8
32869c07851SBenjamin Herrenschmidt
32969c07851SBenjamin Herrenschmidt				/* IDSEL 4 */
33069c07851SBenjamin Herrenschmidt				2000 0 0 0 &UIC0 1a 8
33169c07851SBenjamin Herrenschmidt			>;
332ea20ff5dSDavid Gibson		};
333ea20ff5dSDavid Gibson	};
334ea20ff5dSDavid Gibson
335ea20ff5dSDavid Gibson	chosen {
336ea20ff5dSDavid Gibson		linux,stdout-path = "/plb/opb/serial@40000200";
337ea20ff5dSDavid Gibson	};
338ea20ff5dSDavid Gibson};
339